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    • 1. 发明授权
    • Connector assembly
    • 连接器组件
    • US6095853A
    • 2000-08-01
    • US859
    • 1997-12-30
    • Wayne HuangYao-Hao ChangGordon Lok
    • Wayne HuangYao-Hao ChangGordon Lok
    • H01R13/40H01R13/502H01R13/60H01R13/73H01R27/00
    • H01R12/727
    • A connector assembly includes an insulative unitary housing defining an upper section and a lower section wherein each section defines a plurality of passageways for allowing a corresponding number of contacts extending therethrough for receipt within the mating port thereof. A pair of side walls are provided on two lengthwise opposite ends of the housing wherein the upper portion of each side wall is shorter than the lower portion thereof. The upper portion defines an upper boardlock receiving region and the lower portion defines a lower boardlock receiving region whereby both of the upper boardlock and the lower boardlock have mounting legs extending downward out of the bottom surface of the housing for reaching the PC board on which the connector assembly is mounted and wherein the leg of the lower boardlock is aligned with and in front of that of the upper boardlock in a front-to-end direction. A spacer is positioned in a space defined between such pair of side walls and includes a plurality of apertures for vertical alignment of the contact tails of both the upper section and the lower section.
    • 连接器组件包括限定上部部分和下部部分的绝缘整体壳体,其中每个部分限定多个通道,用于允许延伸穿过其中的相应数量的触头以在其配合端口内接收。 一对侧壁设置在壳体的两个纵向相对端上,其中每个侧壁的上部比其下部短。 上部限定了上板锁接收区域,下部限定了下板板接收区域,由此上板锁和下板板都具有从壳体的底表面向下延伸的安装脚,以到达PC板, 连接器组件被安装,并且其中下板锁的腿部在前板到前端方向上与上板锁的腿部对准并在其前面。 间隔件定位在限定在该对侧壁之间的空间中,并且包括用于上部和下部两者的接触尾部垂直对准的多个孔。
    • 3. 发明授权
    • Compact flash card
    • 紧凑型闪存卡
    • US06472595B1
    • 2002-10-29
    • US09351426
    • 1999-07-12
    • Wayne Huang
    • Wayne Huang
    • H05K900
    • H05K5/026
    • A compact flash card includes a lower half defining a receiving space by peripheral wall thereof. A pair of posts is arranged diagonally on the lower half. An upper half is assembled to the lower half defining at least a pair. of holes corresponding to the posts. The upper and lower halves each includes a metal panel. A gap is defined between the lower and upper halves for receiving a printed circuit board. The printed circuit board includes a pair of holes corresponding to the posts. The posts extend through the holes of the printed circuit board and establish a grounding path between the upper and lower metal panels.
    • 紧凑型闪存卡包括通过其周围壁限定接收空间的下半部。 一对柱子在下半部对角布置。 上半部分被组装到限定至少一对的下半部。 的孔对应于柱。 上半部和下半部分均包括金属板。 在用于接收印刷电路板的下半部和上半部之间限定间隙。 印刷电路板包括对应于柱的一对孔。 柱延伸穿过印刷电路板的孔,并在上下金属板之间建立接地路径。
    • 4. 发明授权
    • Connector assembly comprising coarse pitch connector and fine pitch connector
    • 连接器组件包括粗节距连接器和细间距连接器
    • US06244895B1
    • 2001-06-12
    • US09454527
    • 1999-12-06
    • Wayne Huang
    • Wayne Huang
    • H01R1360
    • H01R43/0263H01R12/724H01R43/0256
    • An electric connector assembly includes a bracket having a pair of upward-extending arms fixedly receiving a D-sub connector therebetween and a pair of downward-extending legs defining a space for accommodating an ultra-SCSI connector therein. The D-sub connector has first conductive pins of a coarse pitch extending beyond a lower face of the bracket. The bracket forms a pair of first guide posts on the lower face thereof for being inserted into corresponding holes defined in a circuit board to properly align the first pins with corresponding apertures defined in the circuit board. The ultra-SCSI connector has a plurality of second conductive pins extending beyond the lower face. A pair of metallic projections is fixed to the ultra-SCSI connector and extends beyond the lower face for being received in corresponding holes defined in the circuit board to align the second pins with corresponding apertures defined in the circuit board independent of the bracket and the D-sub connector. The projections of the ultra-SCSI connector have a size greater than board locks of a conventional ultra-SCSI connector thereby being capable to sustain an excessive force in mounting the connector assembly to the circuit board. Furthermore, the projections interferentially engage with the corresponding holes for retaining the ultra-SCSI connector on the circuit board preventing the ultra-SCSI connector from floating during a dipping soldering process.
    • 电连接器组件包括具有一对向上延伸的臂的支架,该对支架固定地容纳在其间的D-sub连接器,以及一对向下延伸的支腿,其限定用于在其中容纳超SCSI连接器的空间。 D-sub连接器具有延伸超过支架的下表面的粗略间距的第一导电销。 支架在其下表面上形成一对第一引导柱,用于插入到限定在电路板中的对应的孔中,以使第一销与电路板中限定的相应孔对准。 超SCSI连接器具有延伸超过下表面的多个第二导电销。 一对金属突起固定在超SCSI连接器上并延伸超过下表面,以便接收在电路板中限定的对应孔中,以将第二个引脚与电路板中定义的对应的孔对准,独立于支架和D -sub连接器。 超SCSI连接器的突起的尺寸大于常规超SCSI连接器的板锁,因此能够在将连接器组件安装到电路板上时承受过大的力。 此外,突起与相应的孔相接合,用于将超SCSI连接器保持在电路板上,防止超SCSI连接器在浸渍焊接过程期间浮动。
    • 10. 发明授权
    • Method and apparatus for detecting conditions for blocking a CPU's receipt of signals returned from a peripheral device
    • 用于检测阻挡CPU从外围设备返回的信号的接收的条件的方法和装置
    • US07353312B2
    • 2008-04-01
    • US11267126
    • 2005-11-07
    • Ray WeiWayne Huang
    • Ray WeiWayne Huang
    • G06F13/24
    • G06F13/24
    • A method for determining blocking signals is used to judge whether to block a return signal transmitted to a CPU or not when a system management interrupt (SMI) signal is transmitted to the CPU, wherein the return signal is a signal transmitted by a system chip in response to a triggering command transmitted to the system chip by the CPU. The blocking method includes detecting whether the CPU has transmitted the triggering command to the system chip, and detecting whether the system management interrupt signal is transmitted to the CPU. When the CPU has transmitted the triggering command to the system chip, and subsequently the system management interrupt signal has been transmitted to the CPU, it is judged that the system management interrupt signal is used to extract the values in registers of a computer system. Thereby the return signal transmitted to the CPU is blocked.
    • 当将系统管理中断(SMI)信号发送到CPU时,用于确定阻塞信号的方法用于判断是否阻止发送到CPU的返回信号,其中返回信号是由系统芯片发送的信号 响应CPU发送到系统芯片的触发命令。 阻塞方法包括检测CPU是否已将触发命令发送到系统芯片,以及检测系统管理中断信号是否传送到CPU。 当CPU向系统芯片发送了触发命令,并且随后将系统管理中断信号发送到CPU时,判断系统管理中断信号用于提取计算机系统的寄存器中的值。 从而传输到CPU的返回信号被阻止。