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1. 发明授权

US07018933B2 Method of forming a metal-insulator-metal capacitor 有权
公开(公告)号：US07018933B2
公开(公告)日：2006-03-28
申请号：US10426743
申请日：2003-04-30
申请人： Wan-don Kim , Jin-won Kim , Seok-jun Won , Cha-young Yoo
发明人： Wan-don Kim , Jin-won Kim , Seok-jun Won , Cha-young Yoo
IPC分类号： H01L21/302 , H01L21/8242
CPC分类号： H01L21/02183 , H01L21/0228 , H01L21/02337 , H01L21/02348 , H01L21/31604 , H01L28/91
摘要： A metal-insulator-metal (MIM) capacitor of a semiconductor device, and a manufacturing method thereof, includes a lower electrode formed of a refractory metal or a conductive compound including the refractory metal, a dielectric film formed of a high dielectric material, and an upper electrode formed of a platinum-family metal or a platinum-family metal oxide. Accordingly, the MIM capacitor satisfies the criteria of step coverage, electrical characteristics and manufacturing costs, as compared to a conventional MIM capacitor in which the upper and lower electrodes are formed of the same material such as a platinum-family metal, a refractory metal or a conductive compound including the refractory metal. The capacitor is especially suitable for mass production in semiconductor fabrication processes.

2. 发明授权

US06580111B2 Metal-insulator-metal capacitor 有权
标题翻译：金属绝缘体金属电容器
公开(公告)号：US06580111B2
公开(公告)日：2003-06-17
申请号：US09863679
申请日：2001-05-23
申请人： Wan-don Kim , Jin-won Kim , Seok-jun Won , Cha-young Yoo
发明人： Wan-don Kim , Jin-won Kim , Seok-jun Won , Cha-young Yoo
IPC分类号： H01L27108
CPC分类号： H01L21/02183 , H01L21/0228 , H01L21/02337 , H01L21/02348 , H01L21/31604 , H01L28/91
摘要： A metal-insulator-metal (MIM) capacitor of a semiconductor device, and a manufacturing method thereof, includes a lower electrode formed of a refractory metal or a conductive compound including the refractory metal, a dielectric film formed of a high dielectric material, and an upper electrode formed of a platinum-family metal or a platinum-family metal oxide. Accordingly, the MIM capacitor satisfies the criteria of step coverage, electrical characteristics and manufacturing costs, as compared to a conventional MIM capacitor in which the upper and lower electrodes are formed of the same material such as a platinum-family metal, a refractory metal or a conductive compound including the refractory metal. The capacitor is especially suitable for mass production in semiconductor fabrication processes.
摘要翻译：半导体器件的金属 - 绝缘体 - 金属（MIM）电容器及其制造方法包括由难熔金属形成的下电极或包含难熔金属的导电化合物，由高电介质材料形成的电介质膜，以及由铂族金属或铂族金属氧化物形成的上电极。因此，与常规的MIM电容器相比，MIM电容器满足阶梯覆盖，电特性和制造成本的标准，其中上电极和下电极由相同的材料形成，例如铂族金属，难熔金属或包括难熔金属的导电化合物。电容器特别适用于半导体制造工艺中的批量生产。

3. 发明授权

US06472319B2 Method for manufacturing capacitor of semiconductor memory device by two-step thermal treatment 失效
标题翻译：通过两步热处理制造半导体存储器件电容器的方法
公开(公告)号：US06472319B2
公开(公告)日：2002-10-29
申请号：US09851910
申请日：2001-05-09
申请人： Seok-jun Won , Yun-jung Lee , Soon-yeon Park , Cha-young Yoo , Doo-sup Hwang , Eun-ae Chung , Wan-don Kim
发明人： Seok-jun Won , Yun-jung Lee , Soon-yeon Park , Cha-young Yoo , Doo-sup Hwang , Eun-ae Chung , Wan-don Kim
IPC分类号： H01L2144
CPC分类号： H01L28/55 , H01L28/65
摘要： A method for manufacturing a capacitor of a semiconductor memory device by a two-step thermal treatment is provided. A lower electrode is formed on a semiconductor substrate. A dielectric layer is formed over the lower electrode. An upper electrode formed of a noble metal is formed over the dielectric layer. The resultant having the upper electrode undergoes a first thermal treatment under a first atmosphere including oxygen at a first temperature which is selected to be within a range of 200-600° C., which is lower than the oxidation temperature of the upper electrode. The first thermally treated resultant undergoes a second thermal treatment under a second atmosphere without oxygen at a second temperature which is selected to be within a range of 300-900° C., which is higher than the first temperature.
摘要翻译：提供了通过两步热处理制造半导体存储器件的电容器的方法。在半导体衬底上形成下电极。在下电极上形成电介质层。在电介质层上形成由贵金属形成的上电极。具有上电极的所得物在包含氧的第一气氛下进行第一热处理，所述第一气氛在第一温度下被选择在低于上电极的氧化温度的200-600℃的范围内。第一热处理产物在第二温度下在没有氧的第二气氛下进行第二热处理，第二温度选择在比第一温度高的300-900℃的范围内。

4. 发明授权

US06649502B2 Methods of forming multilayer dielectric regions using varied deposition parameters 失效
公开(公告)号：US06649502B2
公开(公告)日：2003-11-18
申请号：US09859168
申请日：2001-05-16
申请人： Cha-young Yoo , Han-jin Lim , Wan-don Kim , Se-jin Lee , Soon-yeon Park , Yong-kuk Jeong , Han-mei Choi , Gyung-hoon Hong , Seok-jun Won
发明人： Cha-young Yoo , Han-jin Lim , Wan-don Kim , Se-jin Lee , Soon-yeon Park , Yong-kuk Jeong , Han-mei Choi , Gyung-hoon Hong , Seok-jun Won
IPC分类号： H01L213205
CPC分类号： H01L21/02183 , C23C16/405 , C23C16/45557 , H01L21/02337 , H01L21/02348 , H01L21/31604 , H01L28/40 , H01L28/56
摘要： A dielectric region for a device such as a memory cell capacitor is formed by depositing a metal oxide, such as tantalum oxide, on a substrate at a first deposition rate in a first atmosphere maintained within a first temperature range and a first pressure range that produce a first tantalum oxide layer with a desirable step coverage. Metal oxide is subsequently deposited on the first metal oxide layer in a second atmosphere maintained within a second temperature range and a second pressure range that produce a second deposition rate greater than the first deposition rate to form a second tantalum oxide layer on the first tantalum oxide layer. For example, the first atmosphere may be maintained at a temperature in a range from about 350° C. to about 460° C. and a pressure in a range from about 0.01 Torr to about 2.0 Torr during formation of a first tantalum oxide layer, and the second atmosphere may be maintained at a temperature in a range from about 400° C. to about 500° C. and a pressure in a range from about 0.1 Torr to about 10.0 Torr during formation of a second tantalum oxide layer.

5. 发明授权

US06613629B2 Methods for manufacturing storage nodes of stacked capacitors 有权
公开(公告)号：US06613629B2
公开(公告)日：2003-09-02
申请号：US10213856
申请日：2002-08-07
申请人： Wan-don Kim , Cha-young Yoo , Jae-hyun Joo , Seok-jun Won
发明人： Wan-don Kim , Cha-young Yoo , Jae-hyun Joo , Seok-jun Won
IPC分类号： H01L218242
CPC分类号： H01L28/60 , H01L27/10852 , H01L28/55
摘要： Methods for manufacturing a node of a stacked capacitor are provided. A first dielectric layer having a contact plug therein is formed on an integrated circuit substrate. A second dielectric layer including a storage node hole adjacent the contact plug is formed on the first dielectric layer. A conductive layer is deposited into the storage node hole and on the second dielectric layer. The conductive layer on the second dielectric layer is removed to provide a conductive storage node in the storage node hole. After the conductive layer on the second dielectric layer is removed, the conductive storage node is heat treated to reflow the conductive storage node before additional layers are formed on the conductive storage node.

6. 发明授权

US07042042B2 Integrated circuit capacitors having a dielectric layer between a U-shaped lower electrode and a support layer 失效
标题翻译：具有在U形下电极和支撑层之间的介电层的集成电路电容器
公开(公告)号：US07042042B2
公开(公告)日：2006-05-09
申请号：US10665093
申请日：2003-09-17
申请人： Seok-jun Won , Cha-young Yoo
发明人： Seok-jun Won , Cha-young Yoo
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852
摘要： Integrated circuit capacitors are provided having an electrically insulating electrode support layer having an opening therein on an integrated circuit substrate. A U-shaped lower electrode is provided in the opening and a first capacitor dielectric layer extends on an inner surface and an outer portion of the U-shaped lower electrode. A second capacitor dielectric layer extends between the outer portion of the U-shaped lower electrode and the first capacitor dielectric and also extends between the outer portion of the U-shaped lower electrode and an inner sidewall of the opening. An upper electrode extends on the first dielectric layer.
摘要翻译：提供集成电路电容器，其具有在集成电路基板上具有开口的电绝缘电极支撑层。 U形下电极设置在开口中，第一电容器电介质层在U形下电极的内表面和外部部分上延伸。第二电容器电介质层在U形下电极的外部部分和第一电容器电介质之间延伸并且还在U形下电极的外部部分和开口的内侧壁之间延伸。上电极在第一电介质层上延伸。

7. 发明授权

US06692795B2 Method for fabricating semiconductor device having ruthenium layer and equipment for fabricating the same 有权
标题翻译：制造具有钌层的半导体器件的方法及其制造方法
公开(公告)号：US06692795B2
公开(公告)日：2004-02-17
申请号：US10026205
申请日：2001-12-21
申请人： Seok-jun Won , Soon-yeon Park , Cha-young Yoo
发明人： Seok-jun Won , Soon-yeon Park , Cha-young Yoo
IPC分类号： C23C800
CPC分类号： H01L28/60 , C23C16/0281 , C23C16/18 , H01L21/28556 , H01L28/55
摘要： A method for fabricating a semiconductor device is provided. The method includes the steps of: forming an insulating layer having an opening region on a semiconductor substrate; forming a first ruthenium layer on the insulating layer and the opening region by sputtering at a first pressure; forming a second ruthenium layer on the first ruthenium layer by first chemical vapor deposition (CVD) at a first flow rate of oxygen gas and at a second pressure, wherein the second pressure is greater than the first pressure; and forming a third ruthenium layer on the second ruthenium layer by second CVD at a second flow rate of oxygen gas and at a third pressure, wherein the third pressure is greater than the first pressure.
摘要翻译：提供一种制造半导体器件的方法。该方法包括以下步骤：在半导体衬底上形成具有开口区域的绝缘层; 在第一压力下通过溅射在绝缘层和开口区域上形成第一钌层; 通过第一化学气相沉积（CVD）以第一氧气流量和第二压力在第一钌层上形成第二钌层，其中第二压力大于第一压力; 以及在所述第二钌层上通过第二CVD以第二流量的氧气和在第三压力下形成第三钌层，其中所述第三压力大于所述第一压力。

8. 发明授权

US06750092B2 Methods of forming ruthenium film by changing process conditions during chemical vapor deposition and ruthenium films formed thereby 有权
公开(公告)号：US06750092B2
公开(公告)日：2004-06-15
申请号：US09742647
申请日：2000-12-21
申请人： Seok-jun Won , Cha-young Yoo
发明人： Seok-jun Won , Cha-young Yoo
IPC分类号： H01L218242
CPC分类号： C23C16/0281 , C23C16/18 , C23C16/45523 , C23C16/45557 , H01L28/55 , H01L28/60 , H01L28/65
摘要： A ruthenium (Ru) film is formed on a substrate as part of a two-stage methodology. During the first stage, the Ru film is formed on the substrate in a manner in which the Ru nucleation rate is greater than the Ru growth rate. During the second stage, the Ru film is formed on the substrate in a manner in which the Ru growth rate is greater than the Ru nucleation rate.

9. 发明授权

US06680251B2 Methods of chemical vapor depositing ruthenium by varying chemical vapor deposition parameters 有权
标题翻译：通过改变化学气相沉积参数化学气相沉积钌的方法
公开(公告)号：US06680251B2
公开(公告)日：2004-01-20
申请号：US10080000
申请日：2002-02-21
申请人： Seok-jun Won , Cha-young Yoo , Sung-tae Kim , Young-wook Park , Yun-jung Lee , Soon-yeon Park
发明人： Seok-jun Won , Cha-young Yoo , Sung-tae Kim , Young-wook Park , Yun-jung Lee , Soon-yeon Park
IPC分类号： H01L2144
CPC分类号： H01L21/28556 , C23C16/0272 , C23C16/40 , H01L21/28568 , H01L28/55 , H01L28/60
摘要： A layer is formed by chemical vapor depositing a seeding layer of ruthenium oxide on a substrate at a chemical vapor deposition flow rate ratio of a ruthenium source to oxygen gas. A main layer of ruthenium is chemical vapor deposited on the seeding layer by increasing the chemical vapor deposition flow rate ratio of the ruthenium source to the oxygen gas.
摘要翻译：通过以钌源与氧气的化学气相沉积流速比在化学气相沉积基底上的氧化钌晶面层形成层。钌的主层通过提高钌源与氧气的化学气相沉积流速比化学气相沉积在接种层上。

10. 发明申请

US20080017950A1 METHODS OF FORMING RUTHENIUM FILM BY CHANGING PROCESS CONDITIONS DURING CHEMICAL VAPOR DEPOSITION AND RUTHENIUM FILMS FORMED THEREBY 审中-公开
标题翻译：通过在化学气相沉积过程中改变工艺条件形成薄膜的方法和形成的薄膜
公开(公告)号：US20080017950A1
公开(公告)日：2008-01-24
申请号：US11835481
申请日：2007-08-08
申请人： Seok-jun Won , Cha-young Yoo
发明人： Seok-jun Won , Cha-young Yoo
IPC分类号： H01L29/00 , C23C16/06
CPC分类号： C23C16/0281 , C23C16/18 , C23C16/45523 , C23C16/45557 , H01L28/55 , H01L28/60 , H01L28/65
摘要： A ruthenium (Ru) film is formed on a substrate as part of a two-stage methodology. During the first stage, the Ru film is formed on the substrate in a manner in which the Ru nucleation rate is greater than the Ru growth rate. During the second stage, the Ru film is formed on the substrate in a manner in which the Ru growth rate is greater than the Ru nucleation rate.
摘要翻译：作为两阶段方法的一部分，在基板上形成钌（Ru）膜。在第一阶段中，以Ru成核速度大于Ru生长速率的方式在基板上形成Ru膜。在第二阶段期间，以Ru生长速率大于Ru成核速率的方式在基板上形成Ru膜。

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