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1. 发明授权

US09305581B2 Systems and methods for memory efficient repeatable run out processing 有权
标题翻译：用于存储器高效可重复耗尽处理的系统和方法
公开(公告)号：US09305581B2
公开(公告)日：2016-04-05
申请号：US12328024
申请日：2008-12-04
申请人： Viswanath Annampedu , Terence Karanink , Xun Zhang , Jeffrey P. Grundvig
发明人： Viswanath Annampedu , Terence Karanink , Xun Zhang , Jeffrey P. Grundvig
IPC分类号： G11B5/596
CPC分类号： G11B5/59627
摘要： Various embodiments of the present invention provide systems and methods for low overhead disk wobble compensation. As an example, a method for performing synchronous wobble compensation processing is disclosed. The method includes providing a medium that includes a servo data region and a user data region. The servo data region includes a clock recovery pattern and a location pattern. A detectable pattern is written to the user data region a known number of bit periods from the location pattern. The detectable pattern is read back, and a fractional processing delay is calculated. Based at least on the fractional processing delay and a known number of bit periods from the location pattern to the end of the servo data region, a wobble compensation pattern is written an integral number of bit periods from the location pattern.
摘要翻译：本发明的各种实施例提供了用于低架空磁盘摆动补偿的系统和方法。作为示例，公开了一种用于执行同步摆动补偿处理的方法。该方法包括提供包括伺服数据区和用户数据区的介质。伺服数据区域包括时钟恢复模式和位置模式。将可检测图案从位置图案写入用户数据区域已知数量的位周期。读取可检测图案，并计算分数处理延迟。至少基于分数处理延迟和从位置模式到伺服数据区域的结束的已知数量的位周期，摆动补偿模式从位置模式写入整数个位周期。

2. 发明申请

US20100142078A1 Systems and Methods for Memory Efficient Repeatable Run Out Processing 有权
标题翻译：用于存储器高效重复运行处理的系统和方法
公开(公告)号：US20100142078A1
公开(公告)日：2010-06-10
申请号：US12328024
申请日：2008-12-04
申请人： Viswanath Annampedu , Terence Karanink , Xun Zhang , Jeffrey P. Grundvig
发明人： Viswanath Annampedu , Terence Karanink , Xun Zhang , Jeffrey P. Grundvig
IPC分类号： G11B5/09
CPC分类号： G11B5/59627
摘要： Various embodiments of the present invention provide systems and methods for low overhead disk wobble compensation. As an example, a method for performing synchronous wobble compensation processing is disclosed. The method includes providing a medium that includes a servo data region and a user data region. The servo data region includes a clock recovery pattern and a location pattern. A detectable pattern is written to the user data region a known number of bit periods from the location pattern. The detectable pattern is read back, and a fractional processing delay is calculated. Based at least on the fractional processing delay and a known number of bit periods from the location pattern to the end of the servo data region, a wobble compensation pattern is written an integral number of bit periods from the location pattern.
摘要翻译：本发明的各种实施例提供了用于低架空磁盘摆动补偿的系统和方法。作为示例，公开了一种用于执行同步摆动补偿处理的方法。该方法包括提供包括伺服数据区和用户数据区的介质。伺服数据区域包括时钟恢复模式和位置模式。将可检测图案从位置图案写入用户数据区域已知数量的位周期。读取可检测图案，并计算分数处理延迟。至少基于分数处理延迟和从位置模式到伺服数据区域的结束的已知数量的位周期，摆动补偿模式从位置模式写入整数个位周期。

3. 发明授权

US08699160B2 Methods and apparatus for validating detection of RRO address marks 有权
标题翻译：验证RRO地址标记检测的方法和装置
公开(公告)号：US08699160B2
公开(公告)日：2014-04-15
申请号：US13281923
申请日：2011-10-26
申请人： Viswanath Annampedu , Xun Zhang , Jeffrey P. Grundvig
发明人： Viswanath Annampedu , Xun Zhang , Jeffrey P. Grundvig
IPC分类号： G11B20/10 , G11B5/596
CPC分类号： G11B27/36 , G11B5/59627 , G11B5/59688 , G11B20/10009 , G11B20/18 , G11B27/3072 , G11B2220/2516
摘要： Methods and apparatus are provided for validating a detection of RRO address marks. After a potential RRO address mark is detected, a disclosed RROAM validation metric evaluates the energy of the remaining RRO data bits in the servo sector, relative to a predefined energy threshold. In addition, the number of remaining RRO data bits in the servo sector is compared to an expected value. The detected RRO address mark is validated in an exemplary embodiment if the RROAM validation metric satisfies the predefined energy threshold and the proper number of remaining RRO data bits is detected in the servo sector. The potential RRO address mark can optionally be discarded if the potential RRO address mark is not validated.
摘要翻译：提供了用于验证RRO地址标记检测的方法和装置。在检测到潜在的RRO地址标记之后，所公开的RROAM验证度量相对于预定义的能量阈值来评估伺服扇区中的剩余RRO数据位的能量。此外，将伺服扇区中的剩余RRO数据位的数量与预期值进行比较。如果RROAM验证度量满足预定能量阈值并且在伺服扇区中检测到适当数量的剩余RRO数据位，则在示例性实施例中验证检测到的RRO地址标记。如果潜在的RRO地址标记未被验证，则可以可选地丢弃潜在的RRO地址标记。

4. 发明申请

US20130107687A1 METHODS AND APPARATUS FOR VALIDATING DETECTION OF RRO ADDRESS MARKS 有权
标题翻译：用于检查RRO地址标记的方法和装置
公开(公告)号：US20130107687A1
公开(公告)日：2013-05-02
申请号：US13281923
申请日：2011-10-26
申请人： Viswanath Annampedu , Xun Zhang , Jeffrey P. Grundvig
发明人： Viswanath Annampedu , Xun Zhang , Jeffrey P. Grundvig
IPC分类号： G11B27/36
CPC分类号： G11B27/36 , G11B5/59627 , G11B5/59688 , G11B20/10009 , G11B20/18 , G11B27/3072 , G11B2220/2516
摘要： Methods and apparatus are provided for validating a detection of RRO address marks. After a potential RRO address mark is detected, a disclosed RROAM validation metric evaluates the energy of the remaining RRO data bits in the servo sector, relative to a predefined energy threshold. In addition, the number of remaining RRO data bits in the servo sector is compared to an expected value. The detected RRO address mark is validated in an exemplary embodiment if the RROAM validation metric satisfies the predefined energy threshold and the proper number of remaining RRO data bits is detected in the servo sector. The potential RRO address mark can optionally be discarded if the potential RRO address mark is not validated.
摘要翻译：提供了用于验证RRO地址标记检测的方法和装置。在检测到潜在的RRO地址标记之后，所公开的RROAM验证度量相对于预定义的能量阈值来评估伺服扇区中的剩余RRO数据位的能量。此外，将伺服扇区中的剩余RRO数据位的数量与预期值进行比较。如果RROAM验证度量满足预定能量阈值并且在伺服扇区中检测到适当数量的剩余RRO数据位，则在示例性实施例中验证检测到的RRO地址标记。如果潜在的RRO地址标记未被验证，则可以可选地丢弃潜在的RRO地址标记。

5. 发明授权

US08049982B1 Methods and apparatus for measuring servo address mark distance in a read channel using selective fine phase estimate 有权
标题翻译：使用选择性精细相位估计在读通道中测量伺服地址标记距离的方法和装置
公开(公告)号：US08049982B1
公开(公告)日：2011-11-01
申请号：US12847676
申请日：2010-07-30
申请人： Jeffrey P. Grundvig , Viswanath Annampedu , Xun Zhang
发明人： Jeffrey P. Grundvig , Viswanath Annampedu , Xun Zhang
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10074 , G11B20/1024 , G11B20/10277 , G11B20/14 , G11B2020/10916 , G11B2020/1281 , G11B2020/1484 , G11B2220/2516
摘要： Methods and apparatus are provided for measuring servo address mark distance in a read channel using selective fine phase estimates. A distance between servo address marks (SAMs) in servo data of a magnetic recording media can be computed by obtaining a count of a number of time intervals between SAM patterns; obtaining a plurality of fractional phase estimates; selecting at least one of the plurality of fractional phase estimates as a selected fractional phase estimate based on a selection criteria; and combining the count and the selected fractional phase estimate to compute the distance. The fractional phase estimates can include a first fractional phase estimate having a lower resolution and higher accuracy in the presence of frequency errors relative to a second fractional phase estimate and wherein the second fractional phase estimate has more resolution and lower accuracy in the presence of the frequency errors relative to the first fractional phase estimate. The selection criteria can comprise a frequency error threshold.
摘要翻译：提供了使用选择性精细相位估计来测量读取通道中的伺服地址标记距离的方法和装置。可以通过获得SAM图案之间的时间间隔数的计数来计算磁记录介质的伺服数据中的伺服地址标记（SAM）之间的距离; 获得多个分数阶段估计; 基于选择标准来选择所述多个分数阶段估计中的至少一个作为选择的分数阶段估计; 并结合计数和所选择的分数相位估计来计算距离。分数阶段估计可以包括在存在相对于第二分数阶段估计的频率误差的情况下具有较低分辨率和较高精度的第一分数相位估计，并且其中第二分数相位估计在频率存在的情况下具有更高的分辨率和更低的精度相对于第一分数阶段估计的误差。选择标准可以包括频率误差阈值。

6. 发明申请

US20120182643A1 Systems and Methods for Reduced Format Data Processing 有权
标题翻译：减少格式数据处理的系统和方法
公开(公告)号：US20120182643A1
公开(公告)日：2012-07-19
申请号：US13009067
申请日：2011-01-19
申请人： Xun Zhang , Jeffrey Grundvig , Viswanath Annampedu
发明人： Xun Zhang , Jeffrey Grundvig , Viswanath Annampedu
IPC分类号： G11B5/596
CPC分类号： G11B20/10037 , G11B20/10027 , G11B20/10222 , G11B20/14 , G11B2020/1232 , G11B2020/1267 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include a variable gain amplifier circuit, an analog to digital conversion circuit, a cosine component calculation circuit, a sine calculation circuit, and a zero gain start calculation circuit. The variable gain amplifier circuit is operable to apply a gain to a data input corresponding to a gain feedback value and providing an amplified output. The analog to digital conversion circuit is operable to convert the amplified output to a corresponding series of digital samples. The cosine component calculation circuit is operable to calculate a cosine component from the series of digital samples, and the sine component calculation circuit operable to calculate a sine component from the series of digital samples. The zero gain start calculation circuit is operable to calculate a raw gain error value based on the cosine component and the sine component, where the gain feedback value is derived from the raw gain error value.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，本发明的一些实施例提供包括可变增益放大器电路，模数转换电路，余弦分量计算电路，正弦计算电路和零增益开始计算电路的数据处理电路。可变增益放大器电路可操作以将增益应用于对应于增益反馈值的数据输入并提供放大的输出。模数转换电路可操作以将放大的输出转换成相应的一系列数字采样。余弦分量计算电路可操作以从该系列数字采样中计算余弦分量，并且正弦分量计算电路用于从该系列数字样本计算正弦分量。零增益开始计算电路可操作以基于余弦分量和正弦分量来计算原始增益误差值，其中增益反馈值从原始增益误差值导出。

7. 发明申请

US20120026620A1 METHODS AND APPARATUS FOR GAIN ESTIMATION USING SERVO DATA WITH IMPROVED BIAS CORRECTION 有权
标题翻译：使用伺服数据进行增益估计的方法和装置改进偏差校正
公开(公告)号：US20120026620A1
公开(公告)日：2012-02-02
申请号：US12847661
申请日：2010-07-30
申请人： Viswanath Annampedu , Xun Zhang
发明人： Viswanath Annampedu , Xun Zhang
IPC分类号： G11B27/36
CPC分类号： G11B20/10305 , G11B20/10009
摘要： Methods and apparatus are provided for gain estimation using servo data with improved bias correction. The gain is estimated using a preamble in a servo sector by obtaining a first gain estimate using a first gain estimation algorithm (such as a Zero Gain Start Algorithm) and a first portion of the preamble; storing the first portion of the preamble in a memory buffer; obtaining a second gain estimate using a second gain estimation algorithm (such as a Zero Forcing algorithm) and the first portion of the preamble; and processing Servo Address Mark (SAM) and Gray data in the servo sector using the first gain estimate substantially simultaneous to the step of obtaining the second gain estimate. A gain error can be obtained by calculating a difference between the first gain estimate and the second gain estimate. The gain error can be used in burst processing of the servo data.
摘要翻译：提供了使用改进的偏差校正的伺服数据进行增益估计的方法和装置。通过使用第一增益估计算法（例如零增益启动算法）和前同步码的第一部分获得第一增益估计，使用伺服扇区中的前导码估计增益; 将前导码的第一部分存储在存储器缓冲器中; 使用第二增益估计算法（例如零强制算法）和前导码的第一部分获得第二增益估计; 以及基本上与获得第二增益估计的步骤同时使用第一增益估计来处理伺服扇区中的伺服地址标记（SAM）和灰数据。可以通过计算第一增益估计和第二增益估计之间的差来获得增益误差。增益误差可用于伺服数据的突发处理。

8. 发明授权

US08199422B2 Methods and apparatus for gain estimation using servo data with improved bias correction 有权
标题翻译：使用改进的偏差校正的伺服数据进行增益估计的方法和装置
公开(公告)号：US08199422B2
公开(公告)日：2012-06-12
申请号：US12847661
申请日：2010-07-30
申请人： Viswanath Annampedu , Xun Zhang
发明人： Viswanath Annampedu , Xun Zhang
IPC分类号： G11B20/10
CPC分类号： G11B20/10305 , G11B20/10009
摘要： Methods and apparatus are provided for gain estimation using servo data with improved bias correction. The gain is estimated using a preamble in a servo sector by obtaining a first gain estimate using a first gain estimation algorithm (such as a Zero Gain Start Algorithm) and a first portion of the preamble; storing the first portion of the preamble in a memory buffer; obtaining a second gain estimate using a second gain estimation algorithm (such as a Zero Forcing algorithm) and the first portion of the preamble; and processing Servo Address Mark (SAM) and Gray data in the servo sector using the first gain estimate substantially simultaneous to the step of obtaining the second gain estimate. A gain error can be obtained by calculating a difference between the first gain estimate and the second gain estimate. The gain error can be used in burst processing of the servo data.
摘要翻译：提供了使用改进的偏差校正的伺服数据进行增益估计的方法和装置。通过使用第一增益估计算法（例如零增益启动算法）和前同步码的第一部分获得第一增益估计，使用伺服扇区中的前导码估计增益; 将前导码的第一部分存储在存储器缓冲器中; 使用第二增益估计算法（例如零强制算法）和前导码的第一部分获得第二增益估计; 以及基本上与获得第二增益估计的步骤同时使用第一增益估计来处理伺服扇区中的伺服地址标记（SAM）和灰数据。可以通过计算第一增益估计和第二增益估计之间的差来获得增益误差。增益误差可用于伺服数据的突发处理。

9. 发明申请

US20120303327A1 Systems and Methods for Pattern Detection 有权
标题翻译：模式检测系统与方法
公开(公告)号：US20120303327A1
公开(公告)日：2012-11-29
申请号：US13113210
申请日：2011-05-23
申请人： Xun Zhang , Mark D. Thornley , Viswanath Annampedu , Peter J. Windler
发明人： Xun Zhang , Mark D. Thornley , Viswanath Annampedu , Peter J. Windler
IPC分类号： G06F15/00
CPC分类号： H04L7/0334 , G11B20/10222 , H04L7/046 , H04L2007/047
摘要： Various embodiments of the present invention provide systems and methods related to pattern detection. As an example, a system for sample selection is disclosed that includes a difference calculation circuit, a comparator circuit, and an output selector circuit. The difference calculation circuit is operable to calculate a first difference between a first value corresponding to a first digital sample and a second value corresponding to a second digital sample, and to calculate a second difference between a third value corresponding to a third digital sample and a fourth value corresponding to a fourth digital sample. The comparator circuit is operable to compare the first difference with the second difference to yield a comparison output. The output selector circuit is operable to select one of the second value and the fourth value as an output based at least upon the comparison output.
摘要翻译：本发明的各种实施例提供了与模式检测有关的系统和方法。作为示例，公开了一种用于样本选择的系统，其包括差分计算电路，比较器电路和输出选择器电路。差分计算电路可操作以计算对应于第一数字样本的第一值与对应于第二数字样本的第二值之间的第一差，并计算与第三数字样本相对应的第三值和第四值对应于第四数字样本。比较器电路可操作以将第一差异与第二差值进行比较以产生比较输出。输出选择器电路可操作以至少基于比较输出来选择第二值和第四值之一作为输出。

10. 发明授权

US08874410B2 Systems and methods for pattern detection 有权
标题翻译：模式检测的系统和方法
公开(公告)号：US08874410B2
公开(公告)日：2014-10-28
申请号：US13113210
申请日：2011-05-23
申请人： Xun Zhang , Mark D. Thornley , Viswanath Annampedu , Peter J. Windler
发明人： Xun Zhang , Mark D. Thornley , Viswanath Annampedu , Peter J. Windler
IPC分类号： H03F1/26 , H04B15/00 , G11B5/09 , G11B20/10 , H04L7/04 , H04L7/033
CPC分类号： H04L7/0334 , G11B20/10222 , H04L7/046 , H04L2007/047
摘要： Various embodiments of the present invention provide systems and methods related to pattern detection. As an example, a system for sample selection is disclosed that includes a difference calculation circuit, a comparator circuit, and an output selector circuit. The difference calculation circuit is operable to calculate a first difference between a first value corresponding to a first digital sample and a second value corresponding to a second digital sample, and to calculate a second difference between a third value corresponding to a third digital sample and a fourth value corresponding to a fourth digital sample. The comparator circuit is operable to compare the first difference with the second difference to yield a comparison output. The output selector circuit is operable to select one of the second value and the fourth value as an output based at least upon the comparison output.
摘要翻译：本发明的各种实施例提供了与模式检测有关的系统和方法。作为示例，公开了一种用于样本选择的系统，其包括差分计算电路，比较器电路和输出选择器电路。差分计算电路可操作以计算对应于第一数字样本的第一值与对应于第二数字样本的第二值之间的第一差，并计算与第三数字样本相对应的第三值和第四值对应于第四数字样本。比较器电路可操作以将第一差异与第二差值进行比较以产生比较输出。输出选择器电路可操作以至少基于比较输出来选择第二值和第四值之一作为输出。

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