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1. 发明授权

US06930537B1 Band-gap reference circuit with averaged current mirror offsets and method 有权
标题翻译：带平均电流镜偏移和方法的带隙参考电路
公开(公告)号：US06930537B1
公开(公告)日：2005-08-16
申请号：US10061939
申请日：2002-02-01
申请人： Vijaya G. Ceekala , James B. Wieser , Devnath Varadarajan , Laurence D. Lewicki , Jitendra Mohan
发明人： Vijaya G. Ceekala , James B. Wieser , Devnath Varadarajan , Laurence D. Lewicki , Jitendra Mohan
IPC分类号： G05F1/10 , G05F3/02 , G05F3/30
CPC分类号： G05F3/30
摘要： A band-gap reference circuit with averaged current mirror offsets is provided that includes a differential amplifier circuit, a low current transistor circuit, a high current transistor circuit, and a configuration circuit. The differential amplifier circuit includes a first input node operable to receive a first input signal, a second input node operable to receive a second input signal, and an output node operable to generate an output signal based on the input signal difference. The low current transistor circuit is coupled to the differential amplifier circuit and is operable to receive the output signal and to generate the first input signal based on the output signal. The high current transistor circuit is coupled to the differential amplifier circuit and is operable to receive the output signal and to generate the second input signal based on the output signal. The configuration circuit is coupled to the low current transistor circuit and to the high current transistor circuit. The configuration circuit is operable to configure the band-gap reference circuit for a plurality of states by switching a plurality of components between the low current transistor circuit and the high current transistor circuit at specified intervals.
摘要翻译：提供了具有平均电流镜偏移的带隙参考电路，其包括差分放大器电路，低电流晶体管电路，高电流晶体管电路和配置电路。差分放大器电路包括可操作以接收第一输入信号的第一输入节点，可操作以接收第二输入信号的第二输入节点和可用于基于输入信号差产生输出信号的输出节点。低电流晶体管电路耦合到差分放大器电路，并且可操作以接收输出信号并且基于输出信号产生第一输入信号。高电流晶体管电路耦合到差分放大器电路并且可操作以接收输出信号并且基于输出信号产生第二输入信号。配置电路耦合到低电流晶体管电路和高电流晶体管电路。配置电路可操作以通过以指定的间隔切换低电流晶体管电路和高电流晶体管电路之间的多个分量来配置多个状态的带隙基准电路。

2. 发明授权

US06624704B1 High speed high current gain operational amplifier 有权
标题翻译：高速大电流增益运算放大器
公开(公告)号：US06624704B1
公开(公告)日：2003-09-23
申请号：US10000194
申请日：2001-10-25
申请人： Devnath Varadarajan , Laurence D. Lewicki
发明人： Devnath Varadarajan , Laurence D. Lewicki
IPC分类号： H03F304
CPC分类号： H03F3/68 , H03F3/345 , H03F3/347 , H03F2200/72
摘要： An operational amplifier having a low impedance input and a high current gain output. The operational amplifier comprises: 1) a first N-channel transistor having a source coupled to the low impedance input of the operational amplifier; 2) a first constant current source coupled between the source of the first N-channel transistor and ground; 3) a first amplifier stage having an input coupled to the first N-channel transistor source and an inverting output coupled to a gate of the first N-channel transistor; 4) a second amplifier stage having an input coupled to a drain of the first N-channel transistor and an output coupled to the high current gain output of the operational amplifier; and 5) an internal compensation capacitor coupled between the input and the output of the second amplifier stage.
摘要翻译：具有低阻抗输入和高电流增益输出的运算放大器。运算放大器包括：1）具有耦合到运算放大器的低阻抗输入的源极的第一N沟道晶体管; 2）耦合在第一N沟道晶体管的源极与地之间的第一恒流源; 3）具有耦合到第一N沟道晶体管源的输入端和耦合到第一N沟道晶体管的栅极的反相输出的第一放大器级; 4）第二放大器级，其具有耦合到第一N沟道晶体管的漏极的输入端和耦合到运算放大器的高电流增益输出的输出; 以及5）耦合在第二放大器级的输入和输出之间的内部补偿电容器。

3. 发明授权

US06937104B1 High speed high current gain operational amplifier 有权
标题翻译：高速大电流增益运算放大器
公开(公告)号：US06937104B1
公开(公告)日：2005-08-30
申请号：US10668364
申请日：2003-09-22
申请人： Devnath Varadarajan , Laurence D. Lewicki
发明人： Devnath Varadarajan , Laurence D. Lewicki
IPC分类号： H03F3/345 , H03F3/347 , H03F3/68 , H03F3/04
CPC分类号： H03F3/68 , H03F3/345 , H03F3/347 , H03F2200/72
摘要： An operational amplifier having a low impedance input and a high current gain output. The operational amplifier comprises: 1) a first N-channel transistor having a source coupled to the low impedance input of the operational amplifier; 2) a first constant current source coupled between the source of the first N-channel transistor and ground; 3) a first amplifier stage having an input coupled to the first N-channel transistor source and an inverting output coupled to a gate of the first N-channel transistor; 4) a second amplifier stage having an input coupled to a drain of the first N-channel transistor and an output coupled to the high current gain output of the operational amplifier; and 5) an internal compensation capacitor coupled between the input and the output of the second amplifier stage.
摘要翻译：具有低阻抗输入和高电流增益输出的运算放大器。运算放大器包括：1）具有耦合到运算放大器的低阻抗输入的源极的第一N沟道晶体管; 2）耦合在第一N沟道晶体管的源极与地之间的第一恒流源; 3）具有耦合到第一N沟道晶体管源的输入端和耦合到第一N沟道晶体管的栅极的反相输出的第一放大器级; 4）第二放大器级，其具有耦合到第一N沟道晶体管的漏极的输入端和耦合到运算放大器的高电流增益输出的输出; 以及5）耦合在第二放大器级的输入和输出之间的内部补偿电容器。

4. 发明授权

US06657489B1 Operational amplifier circuit with improved feedback factor 有权
标题翻译：运算放大器电路具有改进的反馈系数
公开(公告)号：US06657489B1
公开(公告)日：2003-12-02
申请号：US10029121
申请日：2001-12-21
申请人： Ramsin Ziazadeh , Jitendra Mohan , Abu-Hena M. Kamal , Devnath Varadarajan
发明人： Ramsin Ziazadeh , Jitendra Mohan , Abu-Hena M. Kamal , Devnath Varadarajan
IPC分类号： H03F345
CPC分类号： H03F1/56
摘要： An operational amplifier circuit with improved feedback factor is provided that includes an input impedance, an operational amplifier, and a current conveyor. The input impedance is operable to receive an input signal. The operational amplifier comprises an inverting input node, a non-inverting input node, and an output node. The operational amplifier is operable to generate an output signal at the output node based on the input signal. The current conveyor is coupled between the input impedance and the inverting input node of the operational amplifier. The current conveyor is operable to provide a low impedance to the input impedance and a high impedance to the operational amplifier.
摘要翻译：提供了具有改进的反馈因数的运算放大器电路，其包括输入阻抗，运算放大器和电流输送机。输入阻抗可操作以接收输入信号。运算放大器包括反相输入节点，非反相输入节点和输出节点。运算放大器可操作以基于输入信号在输出节点处产生输出信号。当前输送机耦合在运算放大器的输入阻抗和反相输入节点之间。当前的输送机可操作以向输入阻抗提供低阻抗，并向运算放大器提供高阻抗。

5. 发明授权

US06262603B1 RC calibration circuit with reduced power consumption and increased accuracy 有权
标题翻译： RC校准电路，功耗降低，准确度提高
公开(公告)号：US06262603B1
公开(公告)日：2001-07-17
申请号：US09515183
申请日：2000-02-29
申请人： Jitendra Mohan , Devnath Varadarajan , Vijaya Ceekala
发明人： Jitendra Mohan , Devnath Varadarajan , Vijaya Ceekala
IPC分类号： H03K522
CPC分类号： H03H7/0153 , H03B5/20 , H03H2210/043
摘要： An RC calibration circuit, which utilizes a resistor and a variable capacitor connected in parallel, reduces power consumption and increases the accuracy of the calibration by comparing the voltage on the resistor to the voltage on the capacitor after a predetermined time has expired since the capacitor began charging up. The result of the comparison, which indicates whether the voltage on the resistor is greater than the voltage on the capacitor, is then used to adjust the capacitance of the capacitor to servo the RC time constant to a predetermined value.
摘要翻译：使用电阻器和可变电容并联连接的RC校准电路通过将电阻器上的电压与电容器上的电压进行比较，降低功耗并提高校准精度，这是由于电容器开始充电比较结果表明，电阻器上的电压是否大于电容器上的电压，然后用于调整电容器的电容以使RC时间常数维持在预定值。

6. 发明授权

US06606001B1 High-speed current-mirror circuitry and method of operating the same 有权
标题翻译：高速电流镜电路及其操作方法
公开(公告)号：US06606001B1
公开(公告)日：2003-08-12
申请号：US10000195
申请日：2001-10-25
申请人： Ramsin M. Ziazadeh , Jitendra Mohan , Devnath Varadarajan , Vjay Ceekala
发明人： Ramsin M. Ziazadeh , Jitendra Mohan , Devnath Varadarajan , Vjay Ceekala
IPC分类号： H03F304
CPC分类号： H03F3/345 , H03F2200/294 , H03F2200/372
摘要： There is disclosed high-speed current-mirror circuitry and methods of operating the same. An exemplary impedance-peaking current mirror comprises a N-channel drive transistor and a N-channel mirror transistor. The N-channel drive transistor has a source coupled to ground, a drain coupled to a current source and a gate coupled to the drain via a series connection of a resistor and an inductor. The N-channel mirror transistor has a source coupled to ground, a gate coupled to the drain of the N-channel drive transistor, and a drain coupled to a positive power supply via an impedance load.
摘要翻译：公开了高速电流镜电路及其操作方法。示例性的阻抗峰值电流镜包括N沟道驱动晶体管和N沟道镜像晶体管。 N沟道驱动晶体管具有耦合到地的源极，耦合到电流源的漏极和经由电阻器和电感器的串联连接到漏极的栅极。 N沟道反射镜晶体管具有耦合到地的源极，耦合到N沟道驱动晶体管的漏极的栅极和经由阻抗负载耦合到正电源的漏极。

7. 发明授权

US06177789B1 Line driver for producing operating condition invariant signal levels 有权
标题翻译：线路驱动器，用于产生运行状态不变信号电平
公开(公告)号：US06177789B1
公开(公告)日：2001-01-23
申请号：US09495133
申请日：2000-01-31
申请人： Jitendra Mohan , Devnath Varadarajan , Vijaya Ceekala
发明人： Jitendra Mohan , Devnath Varadarajan , Vijaya Ceekala
IPC分类号： G05F316
CPC分类号： H04L25/028
摘要： A line driver outputs a pair of transmit signals TX+ and TX− that have substantially reduced output level variations due to variations in process, voltage, and temperature. The reduced output level variations are provided by varying the magnitude of the current that sets up the voltages of the transmit signals in a manner that offsets variations in the power supply voltage, temperature, and process, and by limiting variations of the bandgap current source to process and temperature only.
摘要翻译：线路驱动器输出一对发射信号TX +和TX-，其由于过程，电压和温度的变化而具有显着降低的输出电平变化。减小的输出电平变化通过改变设置发射信号的电压的电流的大小来提供，该电流以抵消电源电压，温度和过程的变化的方式，并且通过将带隙电流源的变化限制为过程和温度。

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