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1. 发明授权

US06628169B2 Method and circuit for trimming offset and temperature drift 有权
标题翻译：微调偏移和温度漂移的方法和电路
公开(公告)号：US06628169B2
公开(公告)日：2003-09-30
申请号：US10367046
申请日：2003-02-14
申请人： Vadim V. Ivanov , Junlin Zhou , Wally Meinel
发明人： Vadim V. Ivanov , Junlin Zhou , Wally Meinel
IPC分类号： H03F345
CPC分类号： H03F3/45995 , H03F1/303 , H03F3/45771 , H03F2200/261
摘要： An exemplary trimming circuit can be further simplified to include a single current source to provide for trimming of offset and temperature drift in a device, such as an op amp, voltage reference and the like. A single temperature-dependent current source is trimmed to a predetermined value, for example to zero, at a first temperature, and then the current from the temperature-dependent current source is used to trim output parameters, i.e., adjust the output variables, to a desired value at a second temperature. An exemplary trimming circuit comprises a temperature-dependent current source I(T), a current switch and a device to be, trimmed. The current switch is configured to suitably facilitate the trimming of the trimmed device through coupling of a fraction or multiple of the current signal from temperature-dependent current source I(T) to one or more offset-control terminals of the trimmed device.
摘要翻译：可以进一步简化示例性微调电路以包括单个电流源以提供对器件（例如运算放大器，电压基准等）中的偏移和温度漂移的修整。单个温度依赖电流源在第一温度被修剪到预定值，例如为零，然后来自温度相关电流源的电流用于修整输出参数，即将输出变量调整为在第二温度下的期望值。示例性的修整电路包括温度依赖电流源I（T），电流开关和待修整的器件。电流开关被配置为通过将来自温度的电流源I（T）的电流信号的一部分或多个的一部分耦合到修整的器件的一个或多个偏移控制端子来适当地促进修整器件的修整。

2. 发明授权

US06614305B1 Method and circuit for trimming offset and temperature drift for operational amplifiers and voltage references 有权
标题翻译：用于运算放大器和电压基准的微调偏移和温度漂移的方法和电路
公开(公告)号：US06614305B1
公开(公告)日：2003-09-02
申请号：US10079977
申请日：2002-02-19
申请人： Vadim V. Ivanov , Junlin Zhou , Wally Meinel
发明人： Vadim V. Ivanov , Junlin Zhou , Wally Meinel
IPC分类号： H03F345
CPC分类号： H03F3/45995 , H03F1/303 , H03F3/45771 , H03F2200/261
摘要： A trimming circuit and method of trimming is provided for offset and temperature drift trimming of an op amp or voltage reference device, having an input stage, on at least two different temperatures. The trimming circuit has a current source stage, having first and second current sources which are trimmed at a first temperature, in a first step, to balance the currents of the first and second current sources. The two current sources are configured to be selectively connected, in a second step and at the first temperature, to the offset-control terminal(s) of the input stage and thereby to trim the output of the input stage. The first and second current sources also have different temperature coefficients and are interchangeable with other current sources to facilitate changing, in a third step, the temperature coefficient of one of the two current sources to facilitate offset trimming at a second temperature.
摘要翻译：提供微调电路和修整方法用于在至少两个不同温度下具有输入级的运算放大器或参考电压装置的偏移和温度漂移微调。微调电路具有电流源级，具有在第一步骤中被修整在第一温度的第一和第二电流源，以平衡第一和第二电流源的电流。两个电流源被配置为在第二步骤和第一温度下选择性地连接到输入级的偏移控制端子，从而修整输入级的输出。第一和第二电流源还具有不同的温度系数，并且可与其它电流源互换，以便于在第三步骤中改变两个电流源之一的温度系数，以便于在第二温度下进行偏移修整。

3. 发明授权

US06642789B2 Operational amplifier input stage and method 有权
标题翻译：运算放大器输入级和方法
公开(公告)号：US06642789B2
公开(公告)日：2003-11-04
申请号：US10094540
申请日：2002-03-08
申请人： Vadim V. Ivanov , Wally Meinel , Junlin Zhou
发明人： Vadim V. Ivanov , Wally Meinel , Junlin Zhou
IPC分类号： H03F345
CPC分类号： H03F3/4521 , H03F3/3028 , H03F3/45659 , H03F3/45677
摘要： A precision operational amplifier operating in single supply mode, including a single differential transistor input pair and a cascoded CMOS transistor pair, stabilizes the drain-to-source voltage of the input transistor pair to ensure a stable off-set voltage and increased power supply and common mode rejection. The precision amplifier biases the cascoded CMOS transistor pair in accordance with the stabilized drain-to-source voltage of the differential transistor input pair. Such biasing may take the form of body biasing or biasing the gates of the cascode CMOS transistor pair to ensure that the CMOS transistor pair remain in the active region of operation when the common mode supply voltage approaches zero.
摘要翻译：在单电源模式下工作的精密运算放大器，包括单个差分晶体管输入对和级联CMOS晶体管对，稳定输入晶体管对的漏极 - 源极电压，以确保稳定的偏置电压和增加的电源，共模拒绝精密放大器根据差分晶体管输入对的稳定的漏极 - 源极电压偏置级联CMOS晶体管对。这种偏置可以采取体的偏置或偏置共栅二极管CMOS晶体管对的栅极的形式，以确保当共模电源电压接近零时，CMOS晶体管对保持在有源工作区。

4. 发明授权

US07554364B2 High-voltage operational amplifier input stage and method 有权
标题翻译：高压运算放大器输入级和方法
公开(公告)号：US07554364B2
公开(公告)日：2009-06-30
申请号：US11901847
申请日：2007-09-19
申请人： Sergey V. Alenin , Junlin Zhou
发明人： Sergey V. Alenin , Junlin Zhou
IPC分类号： H03K19/08 , H03K19/00
CPC分类号： H03F3/45085 , H03F1/52 , H03F1/523 , H03F3/45098 , H03F3/45278 , H03F2200/444
摘要： Circuitry for preventing damage to differentially coupled input JFETs in an integrated circuit amplifier includes first (J2) and second (J4) differentially coupled input JFETs. A first input signal (Vin+) is applied to a gate of the first input JFET (J2), and second input signal (Vin−) is applied to a gate of the second input JFET. Needed amounts of drain current are supplied to the first and second input JFETs. A separator JFET (J1) having a drain coupled to a source of the first input JFET and a source coupled to the source of the second input JFET is operated to control an amount of electrical isolation between the drain and source of the separator JFET so as to limit an amount of reverse bias voltage across a gate-source junction of one of the first and second input JFETs to a value less than a gate-source junction breakdown voltage of that the first and second input JFETs.
摘要翻译：用于防止在集成电路放大器中损坏差分耦合输入JFET的电路包括第一（J2）和第二（J4）差分耦合输入JFET。第一输入信号（Vin +）被施加到第一输入JFET（J2）的栅极，并且第二输入信号（Vin-）被施加到第二输入JFET的栅极。所需的漏极电流量被提供给第一和第二输入JFET。具有耦合到第一输入JFET的源极的漏极和耦合到第二输入JFET的源极的分离器JFET（J1）被操作以控制分离器JFET的漏极和源极之间的电隔离量，以便以将第一和第二输入JFET之一的栅极 - 源极结两端的反向偏置电压的量限制为小于第一和第二输入JFET的栅 - 源极结击穿电压的值。

5. 发明申请

US20080068081A1 High-voltage operational amplifier input stage and method 有权
标题翻译：高压运算放大器输入级和方法
公开(公告)号：US20080068081A1
公开(公告)日：2008-03-20
申请号：US11901847
申请日：2007-09-19
申请人： Sergey Alenin , Junlin Zhou
发明人： Sergey Alenin , Junlin Zhou
IPC分类号： H03F3/45 , H02H3/20
CPC分类号： H03F3/45085 , H03F1/52 , H03F1/523 , H03F3/45098 , H03F3/45278 , H03F2200/444
摘要： Circuitry for preventing damage to differentially coupled input JFETs in an integrated circuit amplifier includes first (J2) and second (J4) differentially coupled input JFETs. A first input signal (Vin+) is applied to a gate of the first input JFET (J2), and second input signal (Vin−) is applied to a gate of the second input JFET. Needed amounts of drain current are supplied to the first and second input JFETs. A separator JFET (J1) having a drain coupled to a source of the first input JFET and a source coupled to the source of the second input JFET is operated to control an amount of electrical isolation between the drain and source of the separator JFET so as to limit an amount of reverse bias voltage across a gate-source junction of one of the first and second input JFETs to a value less than a gate-source junction breakdown voltage of that the first and second input JFETs.
摘要翻译：用于防止在集成电路放大器中损坏差分耦合输入JFET的电路包括第一（J 2）和第二（J 4）差分耦合输入JFET。将第一输入信号（Vin +）施加到第一输入JFET（J 2）的栅极，并且将第二输入信号（Vin-）施加到第二输入JFET的栅极。所需的漏极电流量被提供给第一和第二输入JFET。具有耦合到第一输入JFET的源极的漏极和耦合到第二输入JFET的源极的分离器JFET（J 1）被操作以控制分离器JFET的漏极和源极之间的电隔离量，因此以将第一和第二输入JFET之一的栅极 - 源极结两端的反向偏置电压的量限制为小于第一和第二输入JFET的栅 - 源极结击穿电压的值。

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