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1. 发明申请

US20040255130A1 Microprocessor apparatus and method for providing configurable cryptographic key size 有权
标题翻译：用于提供可配置密码密钥大小的微处理器装置和方法
公开(公告)号：US20040255130A1
公开(公告)日：2004-12-16
申请号：US10826632
申请日：2004-04-16
申请人： VIA Technologies Inc.
发明人： G. Glenn Henry , Thomas A. Crispin , Timothy A. Elliott , Terry Parks
IPC分类号： H04L009/00
CPC分类号： G06F21/72 , G06F9/30007 , H04L9/0631 , H04L9/0637 , H04L9/12 , H04L2209/125 , H04L2209/24
摘要： The present invention provides an apparatus and method for performing cryptographic operations. In one embodiment, an apparatus is provided for performing cryptographic operations. The apparatus includes a cryptographic instruction, keygen logic, and execution logic. The cryptographic instruction is received by a computing device as part of an instruction flow executing on the computing device. The cryptographic instruction prescribes one of the cryptographic operations, and also prescribes that a provided cryptographic key be expanded into a corresponding key schedule for employment during execution of the one of the cryptographic operations. The keygen logic is operatively coupled to the cryptographic instruction. The keygen logic directs the computing device to expand the provided cryptographic key into the corresponding key schedule. The execution logic is coupled to the keygen logic. The execution logic expands the provided cryptographic key into the corresponding key schedule.
摘要翻译：本发明提供了一种用于执行密码操作的装置和方法。在一个实施例中，提供了一种用于执行加密操作的装置。该装置包括密码指令，密钥生成逻辑和执行逻辑。密码指令由计算设备接收，作为在计算设备上执行的指令流的一部分。加密指令规定了一个加密操作，并且还规定所提供的密码密钥在执行该密码操作之一期间被扩展为对应的密钥调度表。密钥生成逻辑可操作地耦合到密码指令。密钥生成逻辑指示计算设备将提供的加密密钥扩展到相应的密钥调度表中。执行逻辑与keygen逻辑耦合。执行逻辑将提供的加密密钥扩展到相应的密钥调度表中。

2. 发明申请

US20040250091A1 Microprocessor apparatus and method for optimizing block cipher cryptographic functions 有权
标题翻译：用于优化块密码加密功能的微处理器装置和方法
公开(公告)号：US20040250091A1
公开(公告)日：2004-12-09
申请号：US10800768
申请日：2004-03-15
申请人： VIA Technologies Inc.
发明人： G. Glenn Henry , Thomas A. Crispin , Timothy A. Elliott , Arturo Martin-de-Nicolas , Terry Parks
IPC分类号： H04K001/06
CPC分类号： G06F9/3017 , G06F9/30003 , G06F9/30007 , G06F9/30178 , G06F9/3877 , G06F21/72 , H04L9/0631 , H04L2209/125 , H04L2209/24
摘要： The present invention provides an apparatus and method for performing cryptographic operations on a plurality of input data blocks within a processor. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes a cryptographic instruction and translation logic. The cryptographic instruction is received by a computing device as part of an instruction flow. The cryptographic instruction prescribes one of the cryptographic operations. The translation logic translates the cryptographic instruction into micro instructions. The micro instructions are ordered to direct the computing device to load a second input text block and to execute the one of the cryptographic operations on the second input text block prior to directing the computing device to store an output text block corresponding to a first input text block. Consequently, the output text block is stored during execution of the one of the cryptographic operations on the second input text block.
摘要翻译：本发明提供一种用于对处理器内的多个输入数据块执行密码操作的装置和方法。在一个实施例中，提供了一种用于执行密码操作的装置。该装置包括加密指令和翻译逻辑。密码指令由计算设备作为指令流的一部分接收。加密指令规定了一种加密操作。翻译逻辑将加密指令转换为微指令。命令微指令指示计算设备加载第二输入文本块，并且在指示计算设备存储对应于第一输入文本的输出文本块之前对第二输入文本块执行加密操作之一块。因此，输出文本块在对第二输入文本块的密码操作之一的执行期间被存储。

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