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    • 4. 发明授权
    • Image enhancement using hardware-based deconvolution
    • 使用基于硬件的去卷积的图像增强
    • US08154636B2
    • 2012-04-10
    • US12096943
    • 2006-12-17
    • Elchanan RappaportYoav LaviDavid DroriUri Kinrot
    • Elchanan RappaportYoav LaviDavid DroriUri Kinrot
    • H04N3/14H04N5/335
    • G06T5/003G06T5/20G06T5/50G06T2200/28G06T2207/10024
    • An image enhancement circuit (26, 60, 190, 260) includes an input interface (64, 262), which is operative to accept a stream of input pixel values belonging to pixels (32) of an input image. The input image includes a plurality of different input sub-images including respective subsets of the pixels, such that the input pixel values of the pixels in the different input sub-images are interleaved in the stream. A plurality of filter cells (92, 144, 206, 222, 238, 364) are connected in a two-dimensional array configuration and are arranged to separately filter the input pixel values of each of the input sub-images with respective two-dimensional deconvolution kernels so as produce respective output sub-images that include output pixel values. A multiplexer (88, 332) is coupled to multiplex together the output pixel values of the output sub-images so as to produce a filtered output image.
    • 图像增强电路(26,60,190,260)包括输入接口(64,262),其可操作以接受属于输入图像的像素(32)的输入像素值的流。 输入图像包括包括像素的各个子集的多个不同的输入子图像,使得不同输入子图像中的像素的输入像素值在流中交错。 多个滤波器单元(92,144,206,222,238,364)以二维阵列配置连接,并且被布置为分别对各个输入子图像的输入像素值进行相应的二维 反卷积核,从而产生包括输出像素值的各个输出子图像。 多路复用器(88,332)被耦合以将输出子图像的输出像素值复用在一起以产生滤波后的输出图像。
    • 5. 发明申请
    • Passing Embedded Data Through A Digital Image Processor
    • 通过数字图像处理器传递嵌入式数据
    • US20100039524A1
    • 2010-02-18
    • US12504560
    • 2009-07-16
    • Uri KinrotYoav LaviElchanan Rappaport
    • Uri KinrotYoav LaviElchanan Rappaport
    • H04N5/228
    • H04N21/435H04N5/23229H04N5/335H04N21/235H04N21/2353
    • A method and apparatus for processing an image includes a buffer memory, which is configured to receive and store an input data stream including multiple image lines and one or more embedded data lines, which are interleaved with the image lines and include metadata that are not a part of the image. An image processor receives the input pixel values in succession from the buffer memory and processes the input pixel values so as to generate an output data stream including output pixel values, which are different from the input pixel values. A processing controller detects the one or more embedded data lines and controls the image processor, responsively to detecting the one or more embedded data lines, so that the embedded data lines pass through the image processor without modification of the metadata and are interleaved with the image lines of the output pixel values in the output data stream.
    • 用于处理图像的方法和装置包括缓冲存储器,其被配置为接收和存储与图像行交错的包括多个图像行和一个或多个嵌入数据线的输入数据流,并且包括不是 图像的一部分。 图像处理器从缓冲存储器连续地接收输入像素值,并处理输入像素值,以便生成包括与输入像素值不同的输出像素值的输出数据流。 处理控制器响应于检测一个或多个嵌入数据线而检测一个或多个嵌入数据线并控制图像处理器,使得嵌入的数据线在不修改元数据的情况下通过图像处理器并与图像交错 输出数据流中的输出像素值的行。
    • 6. 发明申请
    • IMAGE ENHANCEMENT USING HARDWARE-BASED DECONVOLUTION
    • 使用硬件解码的图像增强
    • US20090128666A1
    • 2009-05-21
    • US12096943
    • 2006-12-17
    • Elchanan RappaportYoav LaviDavid DroriUri Kinrot
    • Elchanan RappaportYoav LaviDavid DroriUri Kinrot
    • H04N5/217
    • G06T5/003G06T5/20G06T5/50G06T2200/28G06T2207/10024
    • An image enhancement circuit (26, 60, 190, 260) includes an input interface (64, 262), which is operative to accept a stream of input pixel values belonging to pixels (32) of an input image. The input image includes a plurality of different input sub-images including respective subsets of the pixels, such that the input pixel values of the pixels in the different input sub-images are interleaved in the stream. A plurality of filter cells (92, 144, 206, 222, 238, 364) are connected in a two-dimensional array configuration and are arranged to separately filter the input pixel values of each of the input sub-images with respective two-dimensional deconvolution kernels so as produce respective output sub-images that include output pixel values. A multiplexer (88, 332) is coupled to multiplex together the output pixel values of the output sub-images so as to produce a filtered output image.
    • 图像增强电路(26,60,190,260)包括输入接口(64,262),其可操作以接受属于输入图像的像素(32)的输入像素值的流。 输入图像包括包括像素的各个子集的多个不同的输入子图像,使得不同输入子图像中的像素的输入像素值在流中交错。 多个滤波器单元(92,144,206,222,238,364)以二维阵列配置连接,并且被布置为分别对各个输入子图像的输入像素值进行相应的二维 反卷积核,从而产生包括输出像素值的各个输出子图像。 多路复用器(88,332)被耦合以将输出子图像的输出像素值复用在一起以产生滤波后的输出图像。
    • 8. 发明授权
    • Reduced buffer size for JPEG encoding
    • 减少JPEG编码的缓冲区大小
    • US07689047B2
    • 2010-03-30
    • US11407688
    • 2006-04-19
    • Mickey BaharYoav Lavi
    • Mickey BaharYoav Lavi
    • G06K9/36
    • H04N19/423H04N19/60
    • A method of compressing an image according to an image compression algorithm includes sequentially receiving pixel values into a buffers bank in line-by-line order. The image includes a plurality of pixels arranged into lines and columns. Each pixel has a pixel value associated therewith. Each line has L pixels. The image compression algorithm operates on blocks of pixels, each block having N lines and M columns. The method also includes storing each block-line of pixel values in a buffer of the buffers bank. A block-line includes M consecutive pixels of a line. The method also includes, for each block-line, storing a pointer to the buffer in which the block-line is stored and reading block-lines out of the buffers bank to a compression engine, wherein the block-lines are read out of the buffers bank in an order that is different from the line-by-line order in which the block-lines were received into the buffers bank. The method further includes compressing the image according to the image compression algorithm and displaying the image.
    • 根据图像压缩算法压缩图像的方法包括以逐行顺序顺序地将像素值接收到缓冲器组中。 图像包括排列成行和列的多个像素。 每个像素具有与其相关联的像素值。 每行都有L个像素。 图像压缩算法对像素块进行操作,每个块具有N行和M列。 该方法还包括将每个像素值的块行存储在缓冲器组的缓冲器中。 块线包括一行的M个连续像素。 该方法还包括对于每个块行,存储指向缓冲器的指针,其中存储块行,并且将缓冲器组中的块行读出到压缩引擎,其中,块线从 缓冲器以与将块线路接收到缓冲器组中的逐行顺序不同的顺序存储。 该方法还包括根据图像压缩算法压缩图像并显示图像。