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    • 6. 发明授权
    • Cumulative integrity check value (ICV) processor based memory content protection
    • 累积完整性检查值(ICV)处理器内存保护
    • US08826035B2
    • 2014-09-02
    • US12646028
    • 2009-12-23
    • David DurhamMen LongUday Savagaonkar
    • David DurhamMen LongUday Savagaonkar
    • G06F21/00
    • G06F21/79G06F21/72
    • In general, in one aspect, the disclosure describes a process that includes a cryptographic engine and first and second registers. The cryptographic engine is to encrypt data to be written to memory, to decrypt data read from memory, to generate read integrity check values (ICVs) and write ICVs for memory accesses. The cryptographic engine is also to create a cumulative read ICV and a cumulative write ICV by XORing the generated read ICV and the generated write ICV with a current read MAC and a current write ICV respectively and to validate data integrity by comparing the cumulative read ICV and the cumulative write ICV. The first and second registers are to store the cumulative read and write ICVs respectively at the processor. Other embodiments are described and claimed.
    • 通常,在一个方面,本公开描述了包括密码引擎和第一和第二寄存器的过程。 加密引擎是对要写入存储器的数据进行加密,解密从存储器读取的数据,生成读取完整性检查值(ICV),并为存储器访问写入ICV。 密码引擎还通过分别用当前读取的MAC和当前的写入ICV异或生成的读取ICV和产生的写ICV来创建累积读取ICV和累积写入ICV,并通过比较累积读取ICV和 累积写ICV。 第一和第二寄存器分别在处理器处存储累积读和写ICV。 描述和要求保护其他实施例。