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1. 发明授权

US5633532A Semiconductor device interconnection 失效
标题翻译：半导体器件互连
公开(公告)号：US5633532A
公开(公告)日：1997-05-27
申请号：US426074
申请日：1995-04-21
申请人： Tuyosi Sohara , Hirohisa Matsuki , Toshiyuki Kuramochi
发明人： Tuyosi Sohara , Hirohisa Matsuki , Toshiyuki Kuramochi
IPC分类号： H01L25/18 , H01L23/433 , H01L23/498 , H01L23/538 , H01L23/64 , H01L25/04 , H05K1/00 , H05K1/11 , H05K1/16 , H05K3/46 , H01L23/053
CPC分类号： H01L23/49894 , H01L23/433 , H01L23/5384 , H01L23/642 , H05K1/115 , H05K1/162 , H01L2224/16225 , H01L2224/48091 , H01L2224/48464 , H01L24/48 , H01L2924/00014 , H01L2924/19041 , H01L2924/19107 , H05K2201/09236 , H05K2201/09509 , H05K2201/09627 , H05K3/4644 , H05K3/4676
摘要： A semiconductor apparatus includes a semiconductor element and a substrate having a substrate base and a thin-film multilayer interconnection layer formed on the substrate base. The thin-film multilayer interconnection layer has insulating layers and interconnection patterns. The insulating layers and the interconnection patterns are alternately layered. Each of the insulating layers includes a first insulating layer part and a second insulating layer part. A surface of the second insulating layer part is more flat than that of the first insulating layer part, and each of the interconnection patterns is arranged on the surface of the second insulating layer part.
摘要翻译：半导体装置包括半导体元件和具有基板基板和形成在基板基板上的薄膜多层互连层的基板。薄膜多层互连层具有绝缘层和互连图案。绝缘层和互连图案交替层叠。每个绝缘层包括第一绝缘层部分和第二绝缘层部分。第二绝缘层部分的表面比第一绝缘层部分的表面更平坦，并且每个互连图案布置在第二绝缘层部分的表面上。

2. 发明授权

US07712649B2 Using a simultaneously tilting and moving bonding apparatus 有权
标题翻译：使用同时倾斜和移动的粘合装置
公开(公告)号：US07712649B2
公开(公告)日：2010-05-11
申请号：US12146936
申请日：2008-06-26
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： B23K31/12 , B23K31/00 , H05K3/00
CPC分类号： H01L21/563 , H01L24/75 , H01L24/81 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/75753 , H01L2224/75843 , H01L2224/831 , H01L2224/92125 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , Y10T29/49149 , H01L2924/00 , H01L2924/014 , H01L2224/13099
摘要： An electronic component mounting device according to the invention includes a bonding head for holding and pressure bonding an electronic component to a mounting substrate, a local stage provided with a support surface formed in an area which is almost equal to or slightly larger than that of a mounting surface of the electronic component and serving to support a pressure bonding force from an antimounting surface of the mounting substrate through the support surface, a length measuring mechanism for measuring a distance between the bonding head and the mounting substrate, thereby calculating a virtual plane in a predetermined mounting position on the mounting substrate, and a tilting and moving mechanism for tilting and moving the bonding head and the local stage, thereby causing a normal of the virtual plane in the mounting position to be coincident with an action line of the pressure bonding force, and the pressure bonding is carried out along the normal.
摘要翻译：根据本发明的电子部件安装装置包括用于将电子部件保持和压力结合到安装基板的接合头，设置有形成在几乎等于或略大于电子部件的安装面，用于通过支撑面支撑来自安装基板的防倾斜表面的压力;测量机构，用于测量接合头与安装基板之间的距离，由此计算虚拟平面安装基板上的预定安装位置，以及用于使接合头和局部台架倾斜和移动的倾斜和移动机构，从而使安装位置上的虚拟平面的法线与压接的作用线重合力，并且沿着正常进行压力粘合。

3. 发明申请

US20060281220A1 SEMICONDUCTOR DEVICE PACKAGING SUBSTRATE AND SEMICONDUCTOR DEVICE PACKAGING STRUCTURE 有权
标题翻译：半导体器件封装基板和半导体器件封装结构
公开(公告)号：US20060281220A1
公开(公告)日：2006-12-14
申请号：US11423056
申请日：2006-06-08
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H01L21/00 , H01L23/02
CPC分类号： H01L24/28 , H01L21/563 , H01L23/49894 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/00 , H01L2224/05099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A packaging substrate for a semiconductor device includes: a solder resist on a surface of the packaging substrate, the solder resist having a first opening portion for mounting the semiconductor device; and a speed adjusting opening portion for adjusting a flow speed of an underfill resin when the underfill resin is provided, the adjusting section being positioned in vicinity of the first opening portion of the solder resist.
摘要翻译：一种用于半导体器件的封装衬底包括：在封装衬底的表面上的阻焊剂，该阻焊剂具有用于安装半导体器件的第一开口部分; 以及速度调节开口部分，用于当设置底部填充树脂时调节底部填充树脂的流动速度，调节部分位于阻焊剂的第一开口部分附近。

4. 发明授权

US07432602B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07432602B2
公开(公告)日：2008-10-07
申请号：US11463724
申请日：2006-08-10
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/563 , H01L23/49816 , H01L2224/73203
摘要： A semiconductor device includes: a semiconductor chip connected onto a surface of a printed wiring board in a flip-chip connection; a dam for preventing an outflow of underfill, the dam being provided on the surface of the printed wiring board and surrounding an entire circumference of the semiconductor chip; an external connection terminal for the semiconductor chip, the external connection terminal being provided on the surface of the printed wiring board and arranged outside the dam; a solder resist layer covering the surface of the printed wiring board except for portions for the flip-chip connection and the external connection terminal arrangement; and at least one recess portion being provided in the solder resist layer and within a region between a corner portion of the semiconductor chip and a corner portion of the dam being opposed to the corner portion of the semiconductor chip.
摘要翻译：半导体器件包括：以倒装芯片连接连接到印刷线路板的表面上的半导体芯片; 用于防止底部填充物流出的堤坝，坝体设置在印刷线路板的表面上并围绕半导体芯片的整个周边; 用于半导体芯片的外部连接端子，外部连接端子设置在印刷线路板的表面上，并布置在坝外; 覆盖印刷电路板的表面的阻焊层，除了用于倒装芯片连接的部分和外部连接端子装置; 并且至少一个凹部设置在阻焊层中，并且在半导体芯片的角部与坝的角部之间的区域内，与半导体芯片的角部相对。

5. 发明申请

US20070045870A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20070045870A1
公开(公告)日：2007-03-01
申请号：US11463724
申请日：2006-08-10
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H01L23/48
CPC分类号： H01L21/563 , H01L23/49816 , H01L2224/73203
摘要： A semiconductor device includes: a semiconductor chip connected onto a surface of a printed wiring board in a flip-chip connection; a dam for preventing an outflow of underfill, the dam being provided on the surface of the printed wiring board and surrounding an entire circumference of the semiconductor chip; an external connection terminal for the semiconductor chip, the external connection terminal being provided on the surface of the printed wiring board and arranged outside the dam; a solder resist layer covering the surface of the printed wiring board except for portions for the flip-chip connection and the external connection terminal arrangement; and at least one recess portion being provided in the solder resist layer and within a region between a corner portion of the semiconductor chip and a corner portion of the dam being opposed to the corner portion of the semiconductor chip.
摘要翻译：半导体器件包括：以倒装芯片连接连接到印刷线路板的表面上的半导体芯片; 用于防止底部填充物流出的堤坝，坝体设置在印刷线路板的表面上并围绕半导体芯片的整个周边; 用于半导体芯片的外部连接端子，外部连接端子设置在印刷线路板的表面上，并布置在坝外; 覆盖印刷电路板的表面的阻焊层，除了用于倒装芯片连接的部分和外部连接端子装置; 并且至少一个凹部设置在阻焊层中，并且在半导体芯片的角部与坝的角部之间的区域内，与半导体芯片的角部相对。

6. 发明申请

US20090001133A1 ELECTRONIC COMPONENT MOUNTING DEVICE AND METHOD OF MANUFACTURING ELECTRONIC DEVICE 有权
标题翻译：电子元件安装装置及制造电子装置的方法
公开(公告)号：US20090001133A1
公开(公告)日：2009-01-01
申请号：US12146936
申请日：2008-06-26
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： B23K31/00 , B23K37/04
CPC分类号： H01L21/563 , H01L24/75 , H01L24/81 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/75753 , H01L2224/75843 , H01L2224/831 , H01L2224/92125 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , Y10T29/49149 , H01L2924/00 , H01L2924/014 , H01L2224/13099
摘要： An electronic component mounting device according to the invention includes a bonding head for holding and pressure bonding an electronic component to a mounting substrate, a local stage provided with a support surface formed in an area which is almost equal to or slightly larger than that of a mounting surface of the electronic component and serving to support a pressure bonding force from an antimounting surface of the mounting substrate through the support surface, a length measuring mechanism for measuring a distance between the bonding head and the mounting substrate, thereby calculating a virtual plane in a predetermined mounting position on the mounting substrate, and a tilting and moving mechanism for tilting and moving the bonding head and the local stage, thereby causing a normal of the virtual plane in the mounting position to be coincident with an action line of the pressure bonding force, and the pressure bonding is carried out along the normal.
摘要翻译：根据本发明的电子部件安装装置包括用于将电子部件保持和压力结合到安装基板的接合头，设置有形成在几乎等于或略大于电子部件的安装面，用于通过支撑面支撑来自安装基板的防倾斜表面的压力;测量机构，用于测量接合头与安装基板之间的距离，由此计算虚拟平面安装基板上的预定安装位置，以及用于使接合头和局部台架倾斜和移动的倾斜和移动机构，从而使安装位置上的虚拟平面的法线与压接的作用线重合力，并且沿着正常进行压力粘合。

7. 发明授权

US5654590A Multichip-module having an HDI and a temporary supporting substrate 失效
标题翻译：具有HDI和临时支撑衬底的多芯片模块
公开(公告)号：US5654590A
公开(公告)日：1997-08-05
申请号：US593337
申请日：1996-01-29
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H01L23/538 , H01L21/48 , H01L21/68 , H05K1/02 , H05K3/00 , H05K3/46 , H01L23/48 , H01L23/52
CPC分类号： H01L21/6835 , H01L21/4857 , H01L21/486 , H05K3/0058 , H05K3/4682 , H01L2221/68345 , H01L2221/68359 , H01L2224/16225 , H01L2224/16235 , H01L2924/15192 , H05K1/0272 , H05K2201/09063 , H05K2203/0152 , H05K2203/016 , H05K2203/0769 , H05K2203/0783 , H05K2203/0789 , H05K3/467 , Y10T29/4913 , Y10T29/49155
摘要： A multichip-module fabrication method includes the step of forming a chip-mounting substrate by forming a bonding layer on a supporting base and by forming one or a plurality of interconnection layers in a stack formation on the bonding layer via insulating layers. This method also includes the step of forming one or a plurality of throughholes extending through the insulating layers to the bonding layer on the chip-mounting substrate. Subsequently, this method separates the supporting base from the chip-mounting substrate by leading a treatment medium which is capable of removing the bonding layer to the bonding layer at least through one or a plurality of the throughholes. Finally, by mounting a semiconductor chip on the chip-mounting substrate, the multichip-module fabrication method is completed.
摘要翻译：多芯片模块制造方法包括通过在支撑基底上形成接合层并通过绝缘层在接合层上形成叠层形成中的一个或多个互连层来形成芯片安装基板的步骤。该方法还包括将贯穿绝缘层的一个或多个通孔形成到芯片安装基板上的接合层的步骤。随后，该方法通过将至少能够通过一个或多个通孔去除结合层的处理介质引导到接合层，从而将支撑基板与芯片安装基板分离。最后，通过将半导体芯片安装在芯片安装基板上，完成多芯片模块的制造方法。

8. 发明授权

US08058562B2 Wiring substrate and method of manufacturing the same 有权
标题翻译：接线基板及其制造方法
公开(公告)号：US08058562B2
公开(公告)日：2011-11-15
申请号：US12337965
申请日：2008-12-18
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H05K1/00
CPC分类号： H05K1/0271 , H05K3/4602 , H05K3/4694 , H05K2201/0187 , H05K2201/068 , H05K2201/09036 , H05K2201/09063 , H05K2201/09972 , Y10T29/49124
摘要： A wiring substrate is provided. The wiring substrate includes: a core layer in which a gap is formed; and a lamination layer which includes an insulating layer and a wiring layer and which is formed on at least one surface of the core layer. The lamination layer has a thermal expansion coefficient different from that of the core layer. A plurality of mounting regions on which an electronic component is to be mounted are provided on the lamination layer to be spaced from each other. The gap in the core layer is filled with an insulating member having the same material as the insulating layer and surrounds each of the plurality of mounting regions or each of mounting region groups including one or more of the mounting regions.
摘要翻译：提供布线基板。布线基板包括：形成有间隙的芯层; 以及层叠层，其包括绝缘层和布线层，并且形成在所述芯层的至少一个表面上。层叠层的热膨胀系数与芯层的热膨胀系数不同。要在其上安装电子部件的多个安装区域设置在层压层上以彼此间隔开。芯层中的间隙填充有与绝缘层具有相同材料的绝缘构件，并且围绕多个安装区域中的每一个或包括一个或多个安装区域的每个安装区域组。

9. 发明授权

US07375433B2 Semiconductor device packaging substrate and semiconductor device packaging structure 有权
标题翻译：半导体器件封装基板和半导体器件封装结构
公开(公告)号：US07375433B2
公开(公告)日：2008-05-20
申请号：US11423056
申请日：2006-06-08
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H01L23/22 , H01L23/24 , H01L23/48 , H01L23/52 , H01L23/40
CPC分类号： H01L24/28 , H01L21/563 , H01L23/49894 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/00 , H01L2224/05099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A packaging substrate for a semiconductor device includes: a solder resist on a surface of the packaging substrate, the solder resist having a first opening portion for mounting the semiconductor device; and a speed adjusting opening portion for adjusting a flow speed of an underfill resin when the underfill resin is provided, the adjusting section being positioned in vicinity of the first opening portion of the solder resist.
摘要翻译：一种用于半导体器件的封装衬底包括：在封装衬底的表面上的阻焊剂，该阻焊剂具有用于安装半导体器件的第一开口部分; 以及速度调节开口部分，用于当设置底部填充树脂时调节底部填充树脂的流动速度，调节部分位于阻焊剂的第一开口部分附近。

10. 发明申请

US20070215927A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070215927A1
公开(公告)日：2007-09-20
申请号：US11686091
申请日：2007-03-14
申请人： Toshiyuki Kuramochi
发明人： Toshiyuki Kuramochi
IPC分类号： H01L29/94
CPC分类号： H01L21/563 , H01L24/27 , H01L2224/05568 , H01L2224/05573 , H01L2224/1134 , H01L2224/13099 , H01L2224/16225 , H01L2224/26175 , H01L2224/27013 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00013 , H01L2924/00014 , H01L2924/15151 , H01L2924/00 , H01L2224/05599
摘要： In a semiconductor device in which a semiconductor element 10 in which plural electrode terminals 16 are formed along the peripheral edge inside a region of a predetermined width along the peripheral edge excluding the center and the vicinity of the center is mounted on a pad formation surface of a substrate 12 on which pads 14 corresponding to each of the electrode terminals 16 are formed and connection parts 26 between the semiconductor element 10 and the substrate 12 are sealed with an underfill material 24, it is wherein a dam 20 surrounding an inward region 28 is formed so as to separate a connection part region in which the connection parts 26 are present from the inward region 28 inward beyond the connection part region and the connection part region is sealed with the underfill material 24 and plural through holes 22 extending through the substrate 12 are formed inside the inward region 28 of the substrate 12 surrounded by the dam 20.
摘要翻译：在半导体元件10中，在半导体元件10上形成有多个电极端子16，该半导体元件10沿着除了中心和中心附近之外的周缘沿着预定宽度的区域内的周缘形成有多个电极端子16，在其上形成与每个电极端子16对应的焊盘14的基板12和半导体元件10与基板12之间的连接部分26用底部填充材料24密封，其中围绕内部区域28的坝20是形成为将连接部26与内侧区域28的连接部区域从内侧区域28向内侧分隔开，并且将连接部区域与底部填充材料24密封，并且穿过基板12延伸出多个通孔22 形成在由堤20包围的基板12的向内区域28内。

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