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1. 发明授权

US08114761B2 Method for doping non-planar transistors 失效
标题翻译：掺杂非平面晶体管的方法
公开(公告)号：US08114761B2
公开(公告)日：2012-02-14
申请号：US12843726
申请日：2010-07-26
申请人： Tushar V. Mandrekar , Shankar Venkataraman , Zhong Qiang Hua , Manuel A. Hernandez
发明人： Tushar V. Mandrekar , Shankar Venkataraman , Zhong Qiang Hua , Manuel A. Hernandez
IPC分类号： H01L21/00
CPC分类号： H01L21/2256 , H01L29/66803
摘要： Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.
摘要翻译：公开了通过在非平面结构上形成共形掺杂的硅玻璃层来掺杂非平面结构的方法。将其上形成有非平面结构的基板放置在化学气相沉积处理室中以沉积掺杂玻璃（例如BSG或PSG）的共形SACVD层。然后将衬底暴露于RTP或激光退火步骤以将掺杂剂扩散到非平面结构中，然后通过蚀刻去除掺杂的玻璃层。

2. 发明申请

US20110129990A1 METHOD FOR DOPING NON-PLANAR TRANSISTORS 失效
标题翻译：非平面晶体管的方法
公开(公告)号：US20110129990A1
公开(公告)日：2011-06-02
申请号：US12843726
申请日：2010-07-26
申请人： Tushar V. Mandrekar , Shankar Venkataraman , Zhong Qiang Hua , Manuel A. Hernandez
发明人： Tushar V. Mandrekar , Shankar Venkataraman , Zhong Qiang Hua , Manuel A. Hernandez
IPC分类号： H01L21/22
CPC分类号： H01L21/2256 , H01L29/66803
摘要： Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.
摘要翻译：公开了通过在非平面结构上形成共形掺杂的硅玻璃层来掺杂非平面结构的方法。将其上形成有非平面结构的基板放置在化学气相沉积处理室中以沉积掺杂玻璃（例如BSG或PSG）的共形SACVD层。然后将衬底暴露于RTP或激光退火步骤以将掺杂剂扩散到非平面结构中，然后通过蚀刻去除掺杂的玻璃层。

3. 发明申请

US20120015113A1 METHODS FOR FORMING LOW STRESS DIELECTRIC FILMS 审中-公开
标题翻译：形成低应力电介质膜的方法
公开(公告)号：US20120015113A1
公开(公告)日：2012-01-19
申请号：US12835574
申请日：2010-07-13
申请人： Zhong Qiang Hua , Lei Luo , Manuel A. Hernandez , Shankar Venkataraman
发明人： Zhong Qiang Hua , Lei Luo , Manuel A. Hernandez , Shankar Venkataraman
IPC分类号： C23C16/513
CPC分类号： C23C16/513 , C23C16/401 , C23C16/44
摘要： A method for forming a multi-layer silicon oxide film on a substrate includes performing a deposition cycle that comprises depositing a silicon oxide layer using a thermal chemical vapor deposition (CVD) process and depositing a silicon oxide layer using a plasma enhanced chemical vapor deposition (PECVD) process. The deposition cycle is repeated a specified number of times to form the multi-layer silicon oxide film comprising a plurality of silicon oxide layers formed using the thermal CVD process and a plurality of silicon oxide layers formed using the PECVD process. Each silicon oxide layer formed using the thermal CVD process is adjacent to at least one silicon oxide layer formed using the PECVD process.
摘要翻译：在衬底上形成多层氧化硅膜的方法包括执行沉积循环，其包括使用热化学气相沉积（CVD）工艺沉积氧化硅层，并使用等离子体增强化学气相沉积法沉积氧化硅层（ PECVD）过程。沉积循环重复规定次数以形成包含使用热CVD工艺形成的多个氧化硅层和使用PECVD工艺形成的多个氧化硅层的多层氧化硅膜。使用热CVD工艺形成的每个氧化硅层与使用PECVD工艺形成的至少一个氧化硅层相邻。

4. 发明授权

US08404583B2 Conformality of oxide layers along sidewalls of deep vias 有权
标题翻译：深层通孔侧壁氧化层的一致性
公开(公告)号：US08404583B2
公开(公告)日：2013-03-26
申请号：US13035034
申请日：2011-02-25
申请人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
发明人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
IPC分类号： H01L21/44 , H01L21/31 , H01L21/469
CPC分类号： H01L21/76898
摘要： A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450° C., where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.
摘要翻译：在半导体衬底中的通孔侧壁改善氧化物层的保形性的方法包括在半导体衬底的上表面上形成氮化物层，并形成延伸穿过氮化物层并进入半导体衬底的通孔。通孔可以具有距离氮化物层的顶表面至少约50μm的深度和在氮化物层的顶表面处的小于约10μm的开口。该方法还包括在氮化物层上并沿着通孔的侧壁和底部形成氧化物层。可以在小于约450℃的温度下使用热化学气相沉积（CVD）工艺形成氧化物层，其中通孔底部的氧化物层的厚度为厚度的至少约50％在氮化物层的顶表面处的氧化物层。

5. 发明申请

US20110223760A1 CONFORMALITY OF OXIDE LAYERS ALONG SIDEWALLS OF DEEP VIAS 有权
标题翻译：深层六角形氧化层的一致性
公开(公告)号：US20110223760A1
公开(公告)日：2011-09-15
申请号：US13035034
申请日：2011-02-25
申请人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
发明人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
IPC分类号： H01L21/768
CPC分类号： H01L21/76898
摘要： A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450° C., where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.
摘要翻译：在半导体衬底中的通孔侧壁改善氧化物层的保形性的方法包括在半导体衬底的上表面上形成氮化物层，并形成延伸穿过氮化物层并进入半导体衬底的通孔。通孔可以具有距离氮化物层的顶表面至少约50μm的深度和在氮化物层的顶表面处的小于约10μm的开口。该方法还包括在氮化物层上并沿着通孔的侧壁和底部形成氧化物层。可以在小于约450℃的温度下使用热化学气相沉积（CVD）工艺形成氧化物层，其中通孔底部的氧化物层的厚度为厚度的至少约50％在氮化物层的顶表面处的氧化物层。

6. 发明申请

US20120058281A1 METHODS FOR FORMING LOW MOISTURE DIELECTRIC FILMS 审中-公开
标题翻译：形成低水分电介质膜的方法
公开(公告)号：US20120058281A1
公开(公告)日：2012-03-08
申请号：US13041201
申请日：2011-03-04
申请人： Zhong Qiang Hua , Lei Luo , Manuel A. Hernandez , Zhitao Cao , Kedar Sapre , Ajay Bhatnagar
发明人： Zhong Qiang Hua , Lei Luo , Manuel A. Hernandez , Zhitao Cao , Kedar Sapre , Ajay Bhatnagar
IPC分类号： B05D5/00 , C23C16/56 , C23C16/50 , C23C16/40 , C23C16/44
CPC分类号： H01L21/02164 , C23C16/40 , C23C16/56 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/02362
摘要： A method for forming a pre-metal dielectric (PMD) layer or an inter-metal dielectric (IMD) layer over a substrate includes placing the substrate in a chemical vapor deposition (CVD) process chamber and forming a first oxide layer over the substrate in the CVD process chamber. The first oxide layer is formed using a thermal CVD process at a temperature of about 450° C. or less and a sub-atmospheric pressure. The method also includes forming a second oxide layer over the first oxide layer in the CVD process chamber. The second oxide layer is formed using a plasma enhanced chemical vapor deposition (PECVD) process at a temperature of about 450° C. or less and a sub-atmospheric pressure. The substrate remains in the CVD process chamber during formation of the first oxide layer and the second oxide layer.
摘要翻译：在衬底上形成预金属电介质（PMD）层或金属间电介质（IMD）层的方法包括将衬底放置在化学气相沉积（CVD）处理室中，并在衬底上形成第一氧化物层 CVD处理室。第一氧化物层使用热CVD工艺在约450℃或更低的温度和低于大气压的压力下形成。该方法还包括在CVD处理室中的第一氧化物层上形成第二氧化物层。使用等离子体增强化学气相沉积（PECVD）工艺在约450℃或更低的温度和低于大气压的压力下形成第二氧化物层。在形成第一氧化物层和第二氧化物层期间，衬底保留在CVD处理室中。

7. 发明授权

US08012887B2 Precursor addition to silicon oxide CVD for improved low temperature gapfill 失效
标题翻译：添加氧化硅CVD用于改善低温缝隙填料的前体
公开(公告)号：US08012887B2
公开(公告)日：2011-09-06
申请号：US12489234
申请日：2009-06-22
申请人： Shankar Venkataraman , Hiroshi Hamana , Manuel A. Hernandez , Nitin K. Ingle , Paul Edward Gee
发明人： Shankar Venkataraman , Hiroshi Hamana , Manuel A. Hernandez , Nitin K. Ingle , Paul Edward Gee
IPC分类号： H01L21/31 , C23C16/00
CPC分类号： H01L21/31612 , C23C16/401 , H01L21/02164 , H01L21/02211 , H01L21/02216 , H01L21/02222 , H01L21/02271 , H01L21/76224
摘要： Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.
摘要翻译：在衬底上沉积氧化硅层的方法包括使含硅前体，氧化气体，水和添加剂前体流入处理室，使得在衬底表面上实现均匀的氧化硅生长速率。根据实施例生长的氧化硅层的表面可以在与添加剂前体一起生长时具有减小的粗糙度。在本公开的其他方面中，通过使含硅前体，氧化气体，水和添加剂前体流入处理室，将硅氧化物层沉积在具有表面上的沟槽的图案化衬底上，使得沟槽填充有氧化硅填充材料内的空隙的数量和/或尺寸减小。

8. 发明申请

US20100159711A1 PRECURSOR ADDITION TO SILICON OXIDE CVD FOR IMPROVED LOW TEMPERATURE GAPFILL 失效
标题翻译：用于改善低温胶粘剂的硅氧烷CVD的前驱物
公开(公告)号：US20100159711A1
公开(公告)日：2010-06-24
申请号：US12489234
申请日：2009-06-22
申请人： Shankar Venkataraman , Hiroshi Hamana , Manuel A. Hernandez , Nitin K. Ingle , Paul Edward Gee
发明人： Shankar Venkataraman , Hiroshi Hamana , Manuel A. Hernandez , Nitin K. Ingle , Paul Edward Gee
IPC分类号： H01L21/31 , H01L21/762
CPC分类号： H01L21/31612 , C23C16/401 , H01L21/02164 , H01L21/02211 , H01L21/02216 , H01L21/02222 , H01L21/02271 , H01L21/76224
摘要： Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.
摘要翻译：在衬底上沉积氧化硅层的方法包括使含硅前体，氧化气体，水和添加剂前体流入处理室，使得在衬底表面上实现均匀的氧化硅生长速率。根据实施例生长的氧化硅层的表面可以在与添加剂前体一起生长时具有减小的粗糙度。在本公开的其他方面中，通过使含硅前体，氧化气体，水和添加剂前体流入处理室，将硅氧化物层沉积在具有表面上的沟槽的图案化衬底上，使得沟槽填充有氧化硅填充材料内的空隙的数量和/或尺寸减小。

9. 发明申请

US20080186633A1 Micro torque and micro stiffness measurement device 有权
标题翻译：微扭矩和微刚度测量装置
公开(公告)号：US20080186633A1
公开(公告)日：2008-08-07
申请号：US11704017
申请日：2007-02-07
申请人： Manuel A. Hernandez , Yen Fu , Ellis T. Cha
发明人： Manuel A. Hernandez , Yen Fu , Ellis T. Cha
IPC分类号： G11B5/56
CPC分类号： G11B5/455
摘要： In a method and apparatus for testing a head-gimbal assembly (HGA), a HGA is placed in contact with force transducers mounted on a rotational stage. The force transducers are adjusted to position the transducers around a rotational center of the rotational stage. The rotational stage is rotated, and the torque and variations in torque exerted by the HGA on the force transducers during rotation are measured.
摘要翻译：在用于测试头部万向节组件（HGA）的方法和装置中，HGA被放置成与安装在旋转台上的力换能器接触。调节力传感器以使换能器绕旋转台的旋转中心定位。旋转台被旋转，并且测量在旋转期间由HGA施加在力传感器上的扭矩和扭矩的变化。

10. 发明授权

US5949615A Disk drive system having a novel head actuator assembly and mounting plate configuration 失效
标题翻译：磁盘驱动器系统具有新颖的头致动器组件和安装板配置
公开(公告)号：US5949615A
公开(公告)日：1999-09-07
申请号：US839421
申请日：1997-04-14
申请人： Manuel A. Hernandez
发明人： Manuel A. Hernandez
IPC分类号： G11B5/49 , G11B5/48 , G11B21/02 , G11B21/16
CPC分类号： G11B5/4833
摘要： The improved disk drive system has an improved head gimbal assembly having a mounting plate with an attachment portion for attachment to an actuator arm and a distal end for mounting the read/write heads, or load beam assemblies, thereto. The mounting portion and distal end of the mounting plate are vertically offset such that when the attachment portion is attached to the actuator arm, the distal end of the mounting plate is centered between opposing sides of adjacent disks, thereby permitting a smaller spacing between adjacent disks. The new swage type connection between the mounting plate and the actuator arm has a hole in the actuator arm and has a spud located on the attachment portion of the mounting plate. The spud has a cylinder having an outer diameter such that the cylinder can fit inside the actuator arm hole. A distal end of the cylinder has a lip protruding inwardly from an inside diameter of the cylinder. The cylinder has a length such that when the cylinder is inserted into the actuator arm hole, the lip and the distal end of the cylinder extend beyond the thickness of the actuator arm around the actuator arm hole so that when the spud is swaged while in the actuator arm hole, the lip and the distal end of the cylinder expand into an area outside the actuator arm hole.
摘要翻译：改进的磁盘驱动器系统具有改进的磁头万向架组件，其具有安装板，该安装板具有用于附接到致动器臂的附接部分和用于将读/写头或负载梁组件安装到其上的远端。安装板的安装部分和远端垂直偏移，使得当附接部分附接到致动器臂时，安装板的远端在相邻盘的相对侧之间居中，从而允许相邻盘之间的间隔更小。安装板和致动器臂之间的新的型锻型连接件在致动器臂中具有一个孔，并且具有位于安装板的附接部分上的定位销。喷嘴具有具有外径的圆筒，使得圆筒可以装配在致动器臂孔内。气缸的远端具有从气缸的内径向内突出的唇部。气缸具有这样的长度，使得当气缸插入致动器臂孔中时，气缸和气缸的远端延伸超过致动器臂的致动器臂孔周围的厚度，使得当在第执行器臂孔，唇缘和气缸的远端扩展到致动器臂孔外部的区域。

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