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1. 发明授权

US07971026B2 Information processing apparatus and access control method 有权
标题翻译：信息处理装置和访问控制方法
公开(公告)号：US07971026B2
公开(公告)日：2011-06-28
申请号：US12075220
申请日：2008-03-10
申请人： Tsuyoshi Nishida , Gen Watanabe , Kazuyoshi Kuwahara , Hajime Sonobe
发明人： Tsuyoshi Nishida , Gen Watanabe , Kazuyoshi Kuwahara , Hajime Sonobe
IPC分类号： G06F12/00
CPC分类号： G06F12/08 , G06F9/30098 , G06F9/3824 , G06F9/3891
摘要： According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.
摘要翻译：根据一个实施例，一种信息处理设备包括：处理器，包括：寄存器文件，其保存由指定集架构提供的通用寄存器被分配到的物理寄存器;虚拟寄存器分配单元，其将主存储器空间中的虚拟地址分配给基于来自程序的请求的寄存器文件中的物理寄存器，并且记录虚拟寄存器转换表中的每个虚拟地址和对应的一个物理寄存器之间的对应关系，以及访问转换单元，其确定是否要访问的虚拟地址被记录在由虚拟寄存器分配单元管理的虚拟寄存器转换表中，并且当虚拟地址被记录在其中时，执行访问与虚拟地址的对应关系的物理寄存器的处理被记录在虚拟寄存器转换表。

2. 发明申请

US20080270736A1 Information processing apparatus and access control method 有权
标题翻译：信息处理装置和访问控制方法
公开(公告)号：US20080270736A1
公开(公告)日：2008-10-30
申请号：US12075220
申请日：2008-03-10
申请人： Tsuyoshi Nishida , Gen Watanabe , Kazuyoshi Kuwahara , Hajime Sonobe
发明人： Tsuyoshi Nishida , Gen Watanabe , Kazuyoshi Kuwahara , Hajime Sonobe
IPC分类号： G06F12/08
CPC分类号： G06F12/08 , G06F9/30098 , G06F9/3824 , G06F9/3891
摘要： According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.
摘要翻译：根据一个实施例，一种信息处理设备包括：处理器，包括：寄存器文件，其保存由指定集架构提供的通用寄存器被分配到的物理寄存器;虚拟寄存器分配单元，其将主存储器空间中的虚拟地址分配给基于来自程序的请求的寄存器文件中的物理寄存器，并且记录虚拟寄存器转换表中的每个虚拟地址和对应的一个物理寄存器之间的对应关系，以及访问转换单元，其确定是否要访问的虚拟地址被记录在由虚拟寄存器分配单元管理的虚拟寄存器转换表中，并且当虚拟地址被记录在其中时，执行访问与虚拟地址的对应关系的物理寄存器的处理被记录在虚拟寄存器转换表。

3. 发明申请

US20080270767A1 INFORMATION PROCESSING APPARATUS AND PROGRAM EXECUTION CONTROL METHOD 审中-公开
标题翻译：信息处理装置和程序执行控制方法
公开(公告)号：US20080270767A1
公开(公告)日：2008-10-30
申请号：US12099093
申请日：2008-04-07
申请人： Hajime Sonobe , Gen Watanabe , Tsuyoshi Nishida , Kazuyoshi Kuwahara
发明人： Hajime Sonobe , Gen Watanabe , Tsuyoshi Nishida , Kazuyoshi Kuwahara
IPC分类号： G06F9/44
CPC分类号： G06F1/3203 , G06F1/263 , G06F1/3293 , G06F9/30189 , G06F9/3877 , Y02D10/122
摘要： According to one embodiment, an information processing apparatus includes a first processor which has a first instruction set, a second processor which has a second instruction set, a storage unit which stores a program including a first program module which is described by using the second instruction set and causes the second processor to execute a first process including the arithmetic process, and a second program module which is described by using the first instruction set and causes the first processor to execute a process which is the same as the first process, and a control unit which switches a mode for executing the program between a first mode in which the first program module is assigned to the second processor and a second mode in which the second program module is assigned to the first processor.
摘要翻译：根据一个实施例，一种信息处理设备包括具有第一指令集的第一处理器，具有第二指令集的第二处理器，存储包括通过使用第二指令描述的第一程序模块的程序的存储单元设置并使第二处理器执行包括算术处理的第一处理，以及通过使用第一指令集描述的第二程序模块，并使第一处理器执行与第一处理相同的处理，控制单元，其将在第一模式被分配给第二处理器的第一模式和将第二程序模块分配给第一处理器的第二模式之间切换用于执行程序的模式。

4. 发明申请

US20080267256A1 INFORMATION PROCESSING APPARATUS AND CONTROL METHOD OF PROCESSOR CIRCUIT 审中-公开
标题翻译：信号处理装置和处理器电路的控制方法
公开(公告)号：US20080267256A1
公开(公告)日：2008-10-30
申请号：US12110230
申请日：2008-04-25
申请人： Gen Watanabe , Tsuyoshi Nishida , Kazuyoshi Kuwahara , Hajime Sonobe
发明人： Gen Watanabe , Tsuyoshi Nishida , Kazuyoshi Kuwahara , Hajime Sonobe
IPC分类号： G01K13/00
CPC分类号： G01K7/425
摘要： According to one embodiment, an information processing apparatus comprises a plurality of temperature transmission sections provided in each of first and second semiconductor circuits, and configure to transmit first measured temperature of one of the first and second semiconductor circuits to the other of first and second semiconductor circuits when the first measured temperature is higher than a threshold temperature, and a plurality of operation speed varying sections provided in each of the first and second semiconductor circuits configure to reduce operation speed of the processor circuit possessed by the other of first and second semiconductor circuits, when the received first measured temperature is higher than the second measured temperature of the other of the first and second semiconductor circuits.
摘要翻译：根据一个实施例，信息处理设备包括设置在第一和第二半导体电路中的每一个中的多个温度传输部分，并且被配置为将第一和第二半导体电路之一的第一测量温度传输到第一和第二半导体中的另一个第一测量温度高于阈值温度的电路，并且设置在第一和第二半导体电路中的每一个中的多个操作速度变化部分被配置为降低由第一和第二半导体电路中的另一个拥有的处理器电路的操作速度当接收的第一测量温度高于第一和第二半导体电路中的另一个的第二测量温度时。

5. 发明申请

US20100169070A1 INFORMATION PROCESSING APPARATUS AND EMULATION METHOD 有权
标题翻译：信息处理装置和仿真方法
公开(公告)号：US20100169070A1
公开(公告)日：2010-07-01
申请号：US12498260
申请日：2009-07-06
申请人： Tsuyoshi Nishida
发明人： Tsuyoshi Nishida
IPC分类号： G06F9/455
CPC分类号： G06F13/4022 , G06F13/105
摘要： An information processing apparatus includes: a processor configured to run an operating system; a reconfiguration module configured to rewrite a capability pointer of a PCI device configuration to set a controller compatible of controlling a non-UART device to be incompatible; a virtualization module configured to virtualize one or more UARTs; and a recognition module configured to cause the operating system to recognize the UARTs virtualized by the virtualization module by altering hardware information.
摘要翻译：一种信息处理设备，包括：处理器，被配置为运行操作系统; 重新配置模块，被配置为重写PCI设备配置的能力指针，以将控制非UART设备兼容的控制器设置为不兼容; 配置为虚拟化一个或多个UART的虚拟化模块; 以及识别模块，其被配置为使所述操作系统通过改变硬件信息来识别由所述虚拟化模块虚拟化的所述UART。

6. 发明授权

US07634600B2 Emulation system and emulation method for multiple recording media tupes 有权
标题翻译：多记录媒体元组的仿真系统和仿真方法
公开(公告)号：US07634600B2
公开(公告)日：2009-12-15
申请号：US10988539
申请日：2004-11-16
申请人： Tsuyoshi Nishida
发明人： Tsuyoshi Nishida
IPC分类号： G06F13/12 , G06F13/38
CPC分类号： G06F3/0664 , G06F3/0607 , G06F3/0679 , G06F17/30067
摘要： An LBA correspondence table creating unit creates an LBA correspondence table to convert address information on a floppy disk which is a copy source into address information on an SD memory card, in relation to an FD image area. If an access to the floppy disk to be emulated is requested, an FD access control unit alternately executes access to the SD memory card on the basis of the LBA correspondence table. An FD exchange emulating unit monitors updating and deletion in an FD image SD area by an HD access control unit. If the access is made, the FD exchange emulating unit executes emulation as if the floppy disk was exchanged.
摘要翻译： LBA对应表创建单元创建一个LBA对应表以将作为复制源的软盘上的地址信息相对于FD图像区域转换成SD存储卡上的地址信息。如果要求访问要被仿真的软盘，则FD访问控制单元基于LBA对应表交替地执行对SD存储卡的访问。 FD交换模拟单元通过HD访问控制单元监视FD图像SD区域中的更新和删除。如果进行访问，则FD交换模拟单元执行仿真，就好像软盘被交换一样。

7. 外观设计

USD534958S1 Pen 有权
公开(公告)号：USD534958S1
公开(公告)日：2007-01-09
申请号：US29230940
申请日：2005-05-31
申请人： Tsuyoshi Nishida
设计人： Tsuyoshi Nishida

8. 外观设计

USD509536S1 Ballpoint pen 有权
标题翻译：圆珠笔
公开(公告)号：USD509536S1
公开(公告)日：2005-09-13
申请号：US29214908
申请日：2004-10-13
申请人： Tsuyoshi Nishida
设计人： Tsuyoshi Nishida

9. 发明申请

US20050138247A1 Emulation system and emulation method 有权
标题翻译：仿真系统和仿真方法
公开(公告)号：US20050138247A1
公开(公告)日：2005-06-23
申请号：US10988539
申请日：2004-11-16
申请人： Tsuyoshi Nishida
发明人： Tsuyoshi Nishida
IPC分类号： G06K17/00 , G06F3/06 , G06F9/445 , G06F12/00 , G06F17/30 , G06F3/00
CPC分类号： G06F3/0664 , G06F3/0607 , G06F3/0679 , G06F17/30067
摘要： An LBA correspondence table creating unit creates an LBA correspondence table to convert address information on a floppy disk which is a copy source into address information on an SD memory card, in relation to an FD image area. If an access to the floppy disk to be emulated is requested, an FD access control unit alternately executes access to the SD memory card on the basis of the LBA correspondence table. An FD exchange emulating unit monitors updating and deletion in an FD image SD area by an HD access control unit. If the access is made, the FD exchange emulating unit executes emulation as if the floppy disk was exchanged.
摘要翻译： LBA对应表创建单元创建一个LBA对应表以将作为复制源的软盘上的地址信息相对于FD图像区域转换成SD存储卡上的地址信息。如果要求访问要被仿真的软盘，则FD访问控制单元基于LBA对应表交替地执行对SD存储卡的访问。 FD交换模拟单元通过HD访问控制单元监视FD图像SD区域中的更新和删除。如果进行访问，则FD交换模拟单元执行仿真，就好像软盘被交换一样。

10. 外观设计

USD452526S1 Ball-point pen 失效
公开(公告)号：USD452526S1
公开(公告)日：2001-12-25
申请号：US29141546
申请日：2001-05-09
申请人： Tsuyoshi Nishida
设计人： Tsuyoshi Nishida

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