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1. 发明申请

US20120161235A1 Electrostatic discharge protection device and manufacturing method thereof 审中-公开
标题翻译：静电放电保护装置及其制造方法
公开(公告)号：US20120161235A1
公开(公告)日：2012-06-28
申请号：US13317323
申请日：2011-10-15
申请人： Tsung-Yi Huang , Jin-Lian Su
发明人： Tsung-Yi Huang , Jin-Lian Su
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/41758 , H01L27/0277 , H01L29/6659 , H01L29/7835
摘要： The present invention discloses an electrostatic discharge protection device and a manufacturing method thereof. The electrostatic discharge protection device includes: a substrate, a gate, two N type lightly doped drains, an N type source, an N type drain, and two N type doped regions extending downward beneath and in contact with the source and drain respectively, such that when the source and drain are conducted with each other, at least part of the current flows through the two downwardly extending doped regions to increase the electrostatic discharge protection voltage of the electrostatic discharge protection device.
摘要翻译：本发明公开了一种静电放电保护装置及其制造方法。静电放电保护装置包括：基板，栅极，两个N型轻掺杂漏极，N型源极，N型漏极和分别向下延伸并与源极和漏极接触的两个N型掺杂区域，当源极和漏极彼此导通时，至少部分电流流过两个向下延伸的掺杂区域以增加静电放电保护器件的静电放电保护电压。

2. 发明授权

US09018070B2 Transient voltage suppressor circuit, and diode device therefor and manufacturing method thereof 有权
标题翻译：瞬态电压抑制电路及其二极管装置及其制造方法
公开(公告)号：US09018070B2
公开(公告)日：2015-04-28
申请号：US14482858
申请日：2014-09-10
申请人： Tsung-Yi Huang , Jin-Lian Su
发明人： Tsung-Yi Huang , Jin-Lian Su
IPC分类号： H01L21/8222 , H01L29/66 , H01L27/08 , H01L27/02 , H01L21/265 , H01L21/762 , H01L29/06
CPC分类号： H01L29/66136 , H01L21/265 , H01L21/76224 , H01L27/0255 , H01L27/0814 , H01L29/0649
摘要： The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
摘要翻译：本发明公开了一种瞬态电压抑制器（TVS）电路及其二极管装置及其制造方法。 TVS电路用于耦合到受保护电路以限制输入到保护电路的瞬态电压的幅度。 TVS电路包括抑制器装置和至少二极管装置。二极管器件形成在衬底中，其包括：在衬底中形成的阱; 形成在所述上表面下方的分离区域; 阳极区域和阴极区域，其分别形成在上表面下方的分离区域的两侧，其中阳极区域和阴极区域被分离区域分离; 以及掩埋层，其形成在阱下方的衬底中，具有较高的杂质密度和与该阱相同的导电类型。

3. 发明授权

US08860082B2 Transient voltage suppressor circuit, and diode device therefor and manufacturing method thereof 有权
标题翻译：瞬态电压抑制电路及其二极管装置及其制造方法
公开(公告)号：US08860082B2
公开(公告)日：2014-10-14
申请号：US13549501
申请日：2012-07-15
申请人： Tsung-Yi Huang , Jin-Lian Su
发明人： Tsung-Yi Huang , Jin-Lian Su
IPC分类号： H01L29/74 , H01L31/111
CPC分类号： H01L29/66136 , H01L21/265 , H01L21/76224 , H01L27/0255 , H01L27/0814 , H01L29/0649
摘要： The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
摘要翻译：本发明公开了一种瞬态电压抑制器（TVS）电路及其二极管装置及其制造方法。 TVS电路用于耦合到受保护电路以限制输入到保护电路的瞬态电压的幅度。 TVS电路包括抑制器装置和至少二极管装置。二极管器件形成在衬底中，其包括：在衬底中形成的阱; 形成在所述上表面下方的分离区域; 阳极区域和阴极区域，其分别形成在上表面下方的分离区域的两侧，其中阳极区域和阴极区域被分离区域分离; 以及掩埋层，其形成在阱下方的衬底中，具有较高的杂质密度和与该阱相同的导电类型。

4. 发明申请

US20120161236A1 Electrostatic discharge protection device and manufacturing method thereof 审中-公开
公开(公告)号：US20120161236A1
公开(公告)日：2012-06-28
申请号：US13373766
申请日：2011-11-29
申请人： Tsung-Yi Huang , Jin-Lian Su
发明人： Tsung-Yi Huang , Jin-Lian Su
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/41758 , H01L27/0277 , H01L29/1083 , H01L29/6659 , H01L29/7835
摘要： The present invention discloses an electrostatic discharge protection device and a manufacturing method thereof. The electrostatic discharge protection device includes: a substrate, a gate, two N type lightly doped drains, an N type source, an N type drain, and two N type doped regions extending downward beneath and in contact with the source and drain respectively, such that when the source and drain are conducted with each other, at least part of the current flows through the two downwardly extending doped regions to increase the electrostatic discharge protection voltage of the electrostatic discharge protection device.

5. 发明申请

US20140377940A1 TRANSIENT VOLTAGE SUPPRESSOR CIRCUIT, AND DIODE DEVICE THEREFOR AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：瞬态电压抑制器电路及其二极管器件及其制造方法
公开(公告)号：US20140377940A1
公开(公告)日：2014-12-25
申请号：US14482858
申请日：2014-09-10
申请人： Tsung-Yi Huang , Jin-Lian Su
发明人： Tsung-Yi Huang , Jin-Lian Su
IPC分类号： H01L29/66 , H01L29/06 , H01L21/762 , H01L21/265
CPC分类号： H01L29/66136 , H01L21/265 , H01L21/76224 , H01L27/0255 , H01L27/0814 , H01L29/0649
摘要： The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
摘要翻译：本发明公开了一种瞬态电压抑制器（TVS）电路及其二极管装置及其制造方法。 TVS电路用于耦合到受保护电路以限制输入到保护电路的瞬态电压的幅度。 TVS电路包括抑制器装置和至少二极管装置。二极管器件形成在衬底中，其包括：在衬底中形成的阱; 形成在所述上表面下方的分离区域; 阳极区域和阴极区域，分别形成在上表面下方的分离区域的两侧，其中阳极区域和阴极区域被分离区域分离; 以及掩埋层，其形成在阱下方的衬底中，具有较高的杂质密度和与该阱相同的导电类型。

6. 发明申请

US20140015008A1 Transient Voltage Suppressor Circuit, and Diode Device Therefor and Manufacturing Method Thereof 有权
标题翻译：瞬态电压抑制器电路及其二极管器件及其制造方法
公开(公告)号：US20140015008A1
公开(公告)日：2014-01-16
申请号：US13549501
申请日：2012-07-15
申请人： Tsung-Yi Huang , Jin-Lian Su
发明人： Tsung-Yi Huang , Jin-Lian Su
IPC分类号： H01L27/06 , H01L21/82
CPC分类号： H01L29/66136 , H01L21/265 , H01L21/76224 , H01L27/0255 , H01L27/0814 , H01L29/0649
摘要： The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
摘要翻译：本发明公开了一种瞬态电压抑制器（TVS）电路及其二极管装置及其制造方法。 TVS电路用于耦合到受保护电路以限制输入到保护电路的瞬态电压的幅度。 TVS电路包括抑制器装置和至少二极管装置。二极管器件形成在衬底中，其包括：在衬底中形成的阱; 形成在所述上表面下方的分离区域; 阳极区域和阴极区域，其分别形成在上表面下方的分离区域的两侧，其中阳极区域和阴极区域被分离区域分离; 以及掩埋层，其形成在阱下方的衬底中，具有较高的杂质密度和与该阱相同的导电类型。

7. 发明授权

US09257421B2 Transient voltage suppression device and manufacturing method thereof 有权
标题翻译：瞬态电压抑制装置及其制造方法
公开(公告)号：US09257421B2
公开(公告)日：2016-02-09
申请号：US14728189
申请日：2015-06-02
申请人： Tsung-Yi Huang , Kuo-Hsuan Lo , Wu-Te Weng
发明人： Tsung-Yi Huang , Kuo-Hsuan Lo , Wu-Te Weng
IPC分类号： H01L29/66 , H01L27/02 , H01L29/866 , H01L21/762
CPC分类号： H01L27/0255 , H01L21/76224 , H01L29/0649 , H01L29/66106 , H01L29/66136 , H01L29/861 , H01L29/866
摘要： The present invention discloses a transient voltage suppression (TVS) device and a manufacturing method thereof. The TVS device limits a voltage drop between two terminals thereof not to exceed a clamp voltage. The TVS device is formed in a stack substrate including a semiconductor substrate, a P-type first epitaxial layer, and a second epitaxial layer stacked in sequence. In the TVS device, a first PN diode is connected to a Zener diode in series, wherein the series circuit is surrounded by a first shallow trench isolation (STI) region; and a second PN diode is connected in parallel to the series circuit, wherein the second PN diode is surrounded by a second STI region. The first STI region and the second STI region both extend from an upper surface to the second epitaxial layer, but not to the first epitaxial layer.
摘要翻译：本发明公开了一种瞬态电压抑制（TVS）装置及其制造方法。 TVS器件限制其两个端子之间的电压降不超过钳位电压。 TVS器件形成在堆叠衬底中，该衬底包括依次层叠的半导体衬底，P型第一外延层和第二外延层。在TVS器件中，第一PN二极管串联连接到齐纳二极管，其中串联电路由第一浅沟槽隔离（STI）区域包围; 并且第二PN二极管与串联电路并联连接，其中第二PN二极管被第二STI区域包围。第一STI区域和第二STI区域都从上表面延伸到第二外延层，而不是延伸到第一外延层。

8. 发明授权

US09245746B2 Semiconductor composite film with heterojunction and manufacturing method thereof 有权
标题翻译：具有异质结的半导体复合膜及其制造方法
公开(公告)号：US09245746B2
公开(公告)日：2016-01-26
申请号：US14048971
申请日：2013-10-08
申请人： Hung-Der Su , Chien-Wei Chiu , Tsung-Yi Huang
发明人： Hung-Der Su , Chien-Wei Chiu , Tsung-Yi Huang
IPC分类号： H01L29/66 , H01L21/02 , H01L29/78 , H01L29/12
CPC分类号： H01L29/205 , H01L21/02378 , H01L21/0242 , H01L21/0254 , H01L21/02664 , H01L21/30612 , H01L29/12 , H01L29/2003 , H01L29/7845 , H01L29/7849
摘要： The present invention discloses a semiconductor composite film with a heterojunction and a manufacturing method thereof. The semiconductor composite film includes: a semiconductor substrate; and a semiconductor epitaxial layer, which is formed on the semiconductor substrate, and it has a first surface and a second surface opposite to each other, wherein the heterojunction is formed between the first surface and the semiconductor substrate, and wherein the semiconductor epitaxial layer further includes at least one recess, which is formed by etching the semiconductor epitaxial layer from the second surface toward the first surface. The recess is for mitigating a strain in the semiconductor composite film.
摘要翻译：本发明公开了一种具有异质结的半导体复合膜及其制造方法。半导体复合膜包括：半导体衬底; 以及半导体外延层，其形成在所述半导体基板上，并且具有彼此相对的第一表面和第二表面，其中所述异质结形成在所述第一表面和所述半导体基板之间，并且其中所述半导体外延层进一步包括通过从第二表面朝向第一表面蚀刻半导体外延层而形成的至少一个凹部。该凹槽用于减轻半导体复合膜中的应变。

9. 发明申请

US20150364460A1 TRANSIENT VOLTAGE SUPPRESSION DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：瞬态电压抑制装置及其制造方法
公开(公告)号：US20150364460A1
公开(公告)日：2015-12-17
申请号：US14728189
申请日：2015-06-02
申请人： Tsung-Yi Huang , Kuo-Hsuan Lo , Wu-Te Weng
发明人： Tsung-Yi Huang , Kuo-Hsuan Lo , Wu-Te Weng
IPC分类号： H01L27/02 , H01L29/66 , H01L21/762 , H01L29/866
CPC分类号： H01L27/0255 , H01L21/76224 , H01L29/0649 , H01L29/66106 , H01L29/66136 , H01L29/861 , H01L29/866
摘要： The present invention discloses a transient voltage suppression (TVS) device and a manufacturing method thereof. The TVS device limits a voltage drop between two terminals thereof not to exceed a clamp voltage. The TVS device is formed in a stack substrate including a semiconductor substrate, a P-type first epitaxial layer, and a second epitaxial layer stacked in sequence. In the TVS device, a first PN diode is connected to a Zener diode in series, wherein the series circuit is surrounded by a first shallow trench isolation (STI) region; and a second PN diode is connected in parallel to the series circuit, wherein the second PN diode is surrounded by a second STI region. The first STI region and the second STI region both extend from an upper surface to the second epitaxial layer, but not to the first epitaxial layer.
摘要翻译：本发明公开了一种瞬态电压抑制（TVS）装置及其制造方法。 TVS器件限制其两个端子之间的电压降不超过钳位电压。 TVS器件形成在堆叠衬底中，该衬底包括依次层叠的半导体衬底，P型第一外延层和第二外延层。在TVS器件中，第一PN二极管串联连接到齐纳二极管，其中串联电路由第一浅沟槽隔离（STI）区域包围; 并且第二PN二极管与串联电路并联连接，其中第二PN二极管被第二STI区域包围。第一STI区域和第二STI区域都从上表面延伸到第二外延层，而不是延伸到第一外延层。

10. 发明授权

US09105757B2 Junction barrier Schottky diode and manufacturing method thereof 有权
标题翻译：交联势垒肖特基二极管及其制造方法
公开(公告)号：US09105757B2
公开(公告)日：2015-08-11
申请号：US14040670
申请日：2013-09-28
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/872 , H01L29/66 , H01L29/868 , H01L29/06 , H01L29/20 , H01L29/205
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0657 , H01L29/2003 , H01L29/205 , H01L29/66212
摘要： The present invention discloses a junction barrier Schottky (JBS) diode and a manufacturing method thereof. The JBS diode includes: an N-type gallium nitride (GaN) substrate; an aluminum gallium nitride (AlGaN) barrier layer, which is formed on the N-type GaN substrate; a P-type gallium nitride (GaN) layer, which is formed on or above the N-type GaN substrate; an anode conductive layer, which is formed at least partially on the AlGaN barrier layer, wherein a Schottky contact is formed between part of the anode conductive layer and the AlGaN barrier layer; and a cathode conductive layer, which is formed on the N-type GaN substrate, wherein an ohmic contact is formed between the cathode conductive layer and the N-type GaN substrate, and the cathode conductive layer is not directly connected to the anode conductive layer.
摘要翻译：本发明公开了一种接合势垒肖特基（JBS）二极管及其制造方法。 JBS二极管包括：N型氮化镓（GaN）衬底; 形成在N型GaN衬底上的氮化镓铝（AlGaN）阻挡层; 在N型GaN衬底上形成的P型氮化镓（GaN）层; 至少部分地形成在AlGaN阻挡层上的阳极导电层，其中在所述阳极导电层的一部分和所述AlGaN阻挡层之间形成肖特基接触; 以及阴极导电层，其形成在N型GaN衬底上，其中在阴极导电层和N型GaN衬底之间形成欧姆接触，并且阴极导电层不直接连接到阳极导电层。

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