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1. 发明申请

US20130228830A1 GATE STRUCTURE FOR SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20130228830A1
公开(公告)日：2013-09-05
申请号：US13411304
申请日：2012-03-02
申请人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh , Wei-Jen Lai
发明人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh , Wei-Jen Lai
IPC分类号： H01L29/78 , H01L21/20
CPC分类号： H01L27/0886 , H01L21/28088 , H01L21/32053 , H01L21/32133 , H01L21/823431 , H01L29/45 , H01L29/4916 , H01L29/66795 , H01L29/7845 , H01L29/785
摘要： A semiconductor device and method of fabricating thereof is described that includes a substrate having a fin with a top surface and a first and second lateral sidewall. A hard mask layer may be formed on the top surface of the fin (e.g., providing a dual-gate device). A gate dielectric layer and work function metal layer are formed on the first and second lateral sidewalls of the fin. A silicide layer is formed on the work function metal layer on the first and the second lateral sidewalls of the fin. The silicide layer may be a fully-silicided layer and may provide a stress to the channel region of the device disposed in the fin.

2. 发明授权

US08847293B2 Gate structure for semiconductor device 有权
标题翻译：半导体器件的栅极结构
公开(公告)号：US08847293B2
公开(公告)日：2014-09-30
申请号：US13411304
申请日：2012-03-02
申请人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh , Wei-Jen Lai
发明人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh , Wei-Jen Lai
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L27/0886 , H01L21/28088 , H01L21/32053 , H01L21/32133 , H01L21/823431 , H01L29/45 , H01L29/4916 , H01L29/66795 , H01L29/7845 , H01L29/785
摘要： A semiconductor device and method of fabricating thereof is described that includes a substrate having a fin with a top surface and a first and second lateral sidewall. A hard mask layer may be formed on the top surface of the fin (e.g., providing a dual-gate device). A gate dielectric layer and work function metal layer are formed on the first and second lateral sidewalls of the fin. A silicide layer is formed on the work function metal layer on the first and the second lateral sidewalls of the fin. The silicide layer may be a fully-silicided layer and may provide a stress to the channel region of the device disposed in the fin.
摘要翻译：描述了一种半导体器件及其制造方法，其包括具有顶表面的翅片和第一和第二侧向侧壁的基板。可以在翅片的顶表面上形成硬掩模层（例如，提供双栅极器件）。栅极电介质层和功函数金属层形成在鳍的第一和第二侧壁上。在翅片的第一和第二侧壁上的功函数金属层上形成硅化物层。硅化物层可以是完全硅化的层，并且可以对设置在鳍中的器件的沟道区域提供应力。

3. 发明授权

US09171929B2 Strained structure of semiconductor device and method of making the strained structure 有权
标题翻译：半导体器件的应变结构和制造应变结构的方法
公开(公告)号：US09171929B2
公开(公告)日：2015-10-27
申请号：US13487860
申请日：2012-06-04
申请人： Tsung-Lin Lee , Chih Chieh Yeh , Feng Yuan , Cheng-Yi Peng , Clement Hsingjen Wann
发明人： Tsung-Lin Lee , Chih Chieh Yeh , Feng Yuan , Cheng-Yi Peng , Clement Hsingjen Wann
IPC分类号： H01L29/78 , H01L27/092 , H01L29/66 , H01L29/10 , H01L29/165 , H01L21/8238 , H01L21/02
CPC分类号： H01L29/66636 , H01L21/02529 , H01L21/02532 , H01L21/02538 , H01L21/0262 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823878 , H01L27/0924 , H01L29/1054 , H01L29/165 , H01L29/66651 , H01L29/7848
摘要： An exemplary structure for a field effect transistor (FET) comprises a silicon substrate comprising a first surface; a channel portion over the first surface, wherein the channel portion has a second surface at a first height above the first surface, and a length parallel to first surface; and two source/drain (S/D) regions on the first surface and surrounding the channel portion along the length of the channel portion, wherein the two S/D regions comprise SiGe, Ge, Si, SiC, GeSn, SiGeSn, SiSn, or III-V material.
摘要翻译：用于场效应晶体管（FET）的示例性结构包括：硅衬底，其包括第一表面; 在所述第一表面上的通道部分，其中所述通道部分具有在所述第一表面上方的第一高度处的第二表面和平行于第一表面的长度; 以及沿沟道部分的长度围绕沟道部分的两个源极/漏极（S / D）区域，其中两个S / D区域包括SiGe，Ge，Si，SiC，GeSn，SiGeSn，SiSn，或III-V材料。

4. 发明申请

US20130228862A1 SEMICONDUCTOR DEVICE HAVING A STRAINED REGION 有权
标题翻译：具有应变区域的半导体器件
公开(公告)号：US20130228862A1
公开(公告)日：2013-09-05
申请号：US13411214
申请日：2012-03-02
申请人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
发明人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
IPC分类号： H01L27/12 , H01L21/336 , H01L21/20
CPC分类号： H01L29/66803 , H01L21/26513 , H01L21/26586 , H01L21/30604 , H01L21/823418 , H01L21/823431 , H01L21/823807 , H01L21/823814 , H01L29/517 , H01L29/66545 , H01L29/66628 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： The present disclosure provides devices and methods which provide for strained epitaxial regions. A method of semiconductor fabrication is provided that includes forming a gate structure over a fin of a semiconductor substrate and forming a recess in the fin adjacent the gate structure. A sidewall of the recess is then altered. Exemplary alterations include having an altered profile, treating the sidewall, and forming a layer on the sidewall. An epitaxial region is then grown in the recess. The epitaxial region interfaces the altered sidewall of the recess and is a strained epitaxial region.
摘要翻译：本公开提供了提供应变外延区域的装置和方法。提供一种半导体制造方法，其包括在半导体衬底的翅片上形成栅极结构，并在与栅极结构相邻的鳍中形成凹陷。然后改变凹槽的侧壁。示例性改变包括具有改变的轮廓，处理侧壁以及在侧壁上形成层。然后在凹槽中生长外延区域。外延区域与凹陷的改变的侧壁接触并且是应变的外延区域。

5. 发明授权

US08373238B2 FinFETs with multiple Fin heights 有权
标题翻译： FinFET具有多个鳍高度
公开(公告)号：US08373238B2
公开(公告)日：2013-02-12
申请号：US12843595
申请日：2010-07-26
申请人： Tsung-Lin Lee , Chih Chieh Yeh , Chang-Yun Chang , Feng Yuan
发明人： Tsung-Lin Lee , Chih Chieh Yeh , Chang-Yun Chang , Feng Yuan
IPC分类号： H01L27/088
CPC分类号： H01L29/66666 , H01L21/76 , H01L21/823431 , H01L27/0886 , H01L29/66795 , H01L29/785
摘要： An integrated circuit structure includes a semiconductor substrate, and a FinFET over the semiconductor substrate. The FinFET includes a semiconductor fin; a gate dielectric on a top surface and sidewalls of the semiconductor fin; a gate electrode on the gate dielectric; and a source/drain region at an end of the semiconductor fin. A first pair of shallow trench isolation (STI) regions includes portions directly underlying portions of the source/drain regions, wherein the first pair of STI regions is separated by, and adjoining a semiconductor strip. The first pair of STI regions further has first top surfaces. A second pair of STI regions comprises portions directly underlying the gate electrode, wherein the second pair of STI regions is separated from each other by, and adjoining, the semiconductor strip. The second pair of STI regions has second top surfaces higher than the first top surfaces.
摘要翻译：集成电路结构包括半导体衬底和半导体衬底上的FinFET。 FinFET包括半导体鳍片; 顶表面上的栅极电介质和半导体鳍片的侧壁; 栅电极上的栅电极; 以及在半导体鳍片的端部处的源极/漏极区域。第一对浅沟槽隔离（STI）区域包括直接在源极/漏极区域的下方部分的部分，其中第一对STI区域被分隔开并邻接半导体条带。第一对STI区域还具有第一顶面。第二对STI区域包括直接位于栅极电极下方的部分，其中第二对STI区域彼此分离并邻接半导体条带。第二对STI区域具有高于第一顶表面的第二顶表面。

6. 发明授权

US09263342B2 Semiconductor device having a strained region 有权
标题翻译：具有应变区域的半导体器件
公开(公告)号：US09263342B2
公开(公告)日：2016-02-16
申请号：US13411214
申请日：2012-03-02
申请人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
发明人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
IPC分类号： H01L21/20 , H01L21/336 , H01L21/8238 , H01L29/78 , H01L29/66 , H01L21/265
CPC分类号： H01L29/66803 , H01L21/26513 , H01L21/26586 , H01L21/30604 , H01L21/823418 , H01L21/823431 , H01L21/823807 , H01L21/823814 , H01L29/517 , H01L29/66545 , H01L29/66628 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： The present disclosure provides devices and methods which provide for strained epitaxial regions. A method of semiconductor fabrication is provided that includes forming a gate structure over a fin of a semiconductor substrate and forming a recess in the fin adjacent the gate structure. A sidewall of the recess is then altered. Exemplary alterations include having an altered profile, treating the sidewall, and forming a layer on the sidewall. An epitaxial region is then grown in the recess. The epitaxial region interfaces the altered sidewall of the recess and is a strained epitaxial region.
摘要翻译：本公开提供了提供应变外延区域的装置和方法。提供一种半导体制造方法，其包括在半导体衬底的翅片上形成栅极结构，并在靠近栅极结构的鳍中形成凹陷。然后改变凹槽的侧壁。示例性改变包括具有改变的轮廓，处理侧壁以及在侧壁上形成层。然后在凹槽中生长外延区域。外延区域与凹陷的改变的侧壁接触并且是应变的外延区域。

7. 发明申请

US20110117679A1 SACRIFICIAL OFFSET PROTECTION FILM FOR A FINFET DEVICE 有权
标题翻译： FINFET器件的非常偏移保护膜
公开(公告)号：US20110117679A1
公开(公告)日：2011-05-19
申请号：US12622038
申请日：2009-11-19
申请人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh
发明人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh
IPC分类号： H01L21/66 , H01L21/336
CPC分类号： H01L29/785 , H01L29/41791 , H01L29/66795 , H01L2029/7858
摘要： A method for fabricating a semiconductor device is disclosed. An exemplary embodiment of the method includes providing a substrate; forming a fin structure over the substrate; forming a gate structure, wherein the gate structure overlies a portion of the fin structure; forming a sacrificial-offset-protection layer over another portion of the fin structure; and thereafter performing an implantation process.
摘要翻译：公开了一种制造半导体器件的方法。该方法的示例性实施例包括提供衬底; 在衬底上形成翅片结构; 形成栅极结构，其中所述栅极结构覆盖所述翅片结构的一部分; 在翅片结构的另一部分上形成牺牲偏移保护层; 然后进行植入处理。

8. 发明授权

US08445340B2 Sacrificial offset protection film for a FinFET device 有权
标题翻译：用于FinFET器件的牺牲偏移保护膜
公开(公告)号：US08445340B2
公开(公告)日：2013-05-21
申请号：US12622038
申请日：2009-11-19
申请人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh
发明人： Tsung-Lin Lee , Feng Yuan , Chih Chieh Yeh
IPC分类号： H01L21/8232 , H01L21/84
CPC分类号： H01L29/785 , H01L29/41791 , H01L29/66795 , H01L2029/7858
摘要： A method for fabricating a semiconductor device is disclosed. An exemplary embodiment of the method includes providing a substrate; forming a fin structure over the substrate; forming a gate structure, wherein the gate structure overlies a portion of the fin structure; forming a sacrificial-offset-protection layer over another portion of the fin structure; and thereafter performing an implantation process.
摘要翻译：公开了一种制造半导体器件的方法。该方法的示例性实施例包括提供衬底; 在衬底上形成翅片结构; 形成栅极结构，其中所述栅极结构覆盖所述翅片结构的一部分; 在翅片结构的另一部分上形成牺牲偏移保护层; 然后进行植入处理。

9. 发明授权

US08941153B2 FinFETs with different fin heights 有权
标题翻译： FinFET具有不同的翅片高度
公开(公告)号：US08941153B2
公开(公告)日：2015-01-27
申请号：US12871655
申请日：2010-08-30
申请人： Tsung-Lin Lee , Chih Chieh Yeh , Chang-Yun Chang , Feng Yuan
发明人： Tsung-Lin Lee , Chih Chieh Yeh , Chang-Yun Chang , Feng Yuan
IPC分类号： H01L29/76 , H01L21/8234 , H01L27/088 , H01L29/66
CPC分类号： H01L21/823431 , H01L21/266 , H01L21/76224 , H01L21/823437 , H01L21/823481 , H01L27/0886 , H01L27/1104 , H01L27/1116 , H01L29/0649 , H01L29/41791 , H01L29/66795 , H01L29/785
摘要： An integrated circuit structure includes a semiconductor substrate including a first portion in a first device region, and a second portion in a second device region. A first semiconductor fin is over the semiconductor substrate and has a first fin height. A second semiconductor fin is over the semiconductor substrate and has a second fin height. The first fin height is greater than the second fin height.
摘要翻译：集成电路结构包括包括第一器件区域中的第一部分和第二器件区域中的第二部分的半导体衬底。第一半导体鳍片在半导体衬底之上并且具有第一鳍片高度。第二半导体鳍片在半导体衬底之上并且具有第二鳍片高度。第一鳍高度大于第二翅片高度。

10. 发明申请

US20130237026A1 FINFET DEVICE HAVING A STRAINED REGION 审中-公开
公开(公告)号：US20130237026A1
公开(公告)日：2013-09-12
申请号：US13416926
申请日：2012-03-09
申请人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
发明人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
IPC分类号： H01L29/78 , H01L21/30
CPC分类号： H01L21/265 , H01L21/26506 , H01L21/2654 , H01L21/2658 , H01L21/26586 , H01L21/324 , H01L29/1054 , H01L29/66545 , H01L29/66795 , H01L29/7847
摘要： A method of fabricating a semiconductor device includes providing a substrate having a fin disposed thereon. A gate structure is formed on the fin. The gate structure interfaces at least two sides of the fin. A stress film is formed on the substrate including on the fin. The substrate including the stress film is annealed. The annealing provides a tensile strain in a channel region of the fin. For example, a compressive strain in the stress film may be transferred to form a tensile stress in the channel region of the fin.

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