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1. 发明授权

US06362087B1 Method for fabricating a microelectronic fabrication having formed therein a redistribution structure 失效
标题翻译：一种在其中形成再分布结构的微电子制造的制造方法
公开(公告)号：US06362087B1
公开(公告)日：2002-03-26
申请号：US09565541
申请日：2000-05-05
申请人： Tsing-Chow Wang , Te-Sung Wu , Erh-Kong Chieh
发明人： Tsing-Chow Wang , Te-Sung Wu , Erh-Kong Chieh
IPC分类号： H01L2144
CPC分类号： H01L24/12 , H01L23/3114 , H01L24/11 , H01L2224/0231 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05558 , H01L2224/05569 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/1147 , H01L2224/11901 , H01L2224/13076 , H01L2224/13082 , H01L2224/13083 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/00014 , H01L2224/1308 , H01L2224/131 , H01L2224/13099 , H01L2224/05552 , H01L2924/00 , H01L2924/013
摘要： Within a method for fabricating a microelectronic fabrication there is first provided a substrate. There is then formed over the substrate a patterned bond pad layer. There is also formed over the substrate and in electrical communication with the patterned bond pad layer a patterned redistribution layer, wherein the patterned redistribution layer is formed employing a plating method. The method is particularly economical for fabricating the microelectronic fabrication.

2. 发明授权

US06784089B2 Flat-top bumping structure and preparation method 失效
标题翻译：平顶碰撞结构及其制备方法
公开(公告)号：US06784089B2
公开(公告)日：2004-08-31
申请号：US10342220
申请日：2003-01-13
申请人： Kuolung Lei , Tony Shen , Susana Samoranos , Te-Sung Wu , Tsing-Chow Wang
发明人： Kuolung Lei , Tony Shen , Susana Samoranos , Te-Sung Wu , Tsing-Chow Wang
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05184 , H01L2224/05572 , H01L2224/1147 , H01L2224/11472 , H01L2224/11474 , H01L2224/13099 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2924/0001 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05671 , H01L2224/05684 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171
摘要： A method of making an electrical contact bump electrical contact structure on a substrate comprising: providing a substrate having a bond pad, and a passivation layer overlying a portion for the substrate and wherein the passivation layer includes an opening therein exposing a portion of the bond pad, and wherein the passivation layer has a raised portion overlying the bond pad; forming an under bump metallurgy over at least the exposed portion of the bond pad and over at least a portion of the raised portion of the passivation layer overlying the bond pad; forming a sacrificial blanket having an opening therein that in cross-section has an inverted T-shape over the substrate so that the opening in the sacrificial blanket is aligned with the bond pad; and depositing an electrically conductive material into the opening in the sacrificial blanket.
摘要翻译：一种在衬底上制造电接触凸块电接触结构的方法，包括：提供具有接合焊盘的衬底和覆盖衬底的一部分的钝化层，并且其中所述钝化层包括其中露出所述接合焊盘的一部分的开口，并且其中所述钝化层具有覆盖所述接合焊盘的凸起部分; 在所述接合焊盘的至少暴露部分上方以及覆盖所述接合焊盘的所述钝化层的所述隆起部分的至少一部分上方形成凸起下冶金; 形成其中具有开口的牺牲毯，其中横截面在衬底上具有倒T形，使得牺牲覆盖层中的开口与接合焊盘对准; 以及将导电材料沉积到牺牲层中的开口中。

3. 发明授权

US06448171B1 Microelectronic fabrication having formed therein terminal electrode structure providing enhanced passivation and enhanced bondability 失效
标题翻译：在其中形成端子电极结构的微电子制造，提供增强的钝化和增强的结合能力
公开(公告)号：US06448171B1
公开(公告)日：2002-09-10
申请号：US09565962
申请日：2000-05-05
申请人： Tsing-Chow Wang , Te-Sung Wu
发明人： Tsing-Chow Wang , Te-Sung Wu
IPC分类号： H01L2144
CPC分类号： H01L24/03 , H01L24/11 , H01L2224/0401 , H01L2224/1147 , H01L2224/11902 , H01L2224/13099 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： Within a method for fabricating a microelectronic fabrication, and a microelectronic fabrication fabricated employing the method, there is first provided a substrate. Within the method, there is then formed over the substrate a patterned bond pad layer. There is also formed over the substrate a patterned passivation layer which passivates a series of edges of the patterned bond pad layer while leaving exposed a central portion of the patterned bond pad layer, where the patterned passivation layer has a series of protrusions within the patterned passivation layer over the series of edges of the patterned bond pad layer. There is then formed over the central portion of the patterned bond pad layer and bridging over the series of protrusions of the patterned passivation layer a first terminal electrode layer having an upper surface which is concave. Finally, there is then formed over the first terminal electrode layer a second terminal electrode layer having an upper surface which is other than concave. The method otherwise contemplates the microelectronic fabrication fabricated employing the method. A terminal electrode structure which comprises the first terminal electrode layer and the second terminal electrode layer provides enhanced passivation of the microelectronic fabrication and enhanced bondability to the terminal electrode structure.
摘要翻译：在用于制造微电子制造的方法和使用该方法制造的微电子制造中，首先提供了一种衬底。在该方法中，然后在衬底上形成图案化的接合焊盘层。在衬底上还形成图案化钝化层，其钝化图案化接合焊盘层的一系列边缘，同时留下图案化接合焊盘层的中心部分，其中图案化钝化层在图案化钝化层内具有一系列突起在图案化接合焊盘层的一系列边缘上方。然后形成在图案化接合焊盘层的中心部分上，并且桥接在图案化钝化层的一系列突起上，第一端电极层具有凹面的上表面。最后，在第一端子电极层上形成具有不同于凹面的上表面的第二端子电极层。该方法另外考虑使用该方法制造的微电子制造。包括第一端子电极层和第二端子电极层的端子电极结构提供了微电子制造的增强的钝化和增强的对端子电极结构的可接合性。

4. 发明授权

US5619791A Method for fabricating highly conductive vias 失效
标题翻译：制造高导电通孔的方法
公开(公告)号：US5619791A
公开(公告)日：1997-04-15
申请号：US430963
申请日：1995-04-28
申请人： Vincent G. Lambrecht, Jr. , Henry H. Law , Apurba Roy , John Thomson, Jr. , Te-Sung Wu
发明人： Vincent G. Lambrecht, Jr. , Henry H. Law , Apurba Roy , John Thomson, Jr. , Te-Sung Wu
IPC分类号： H05K3/42 , H01F17/00 , H01F41/04 , H01L21/48 , H05K1/03 , H05K1/09 , H05K1/11 , H05K3/00 , H05K3/24 , H05K3/40
CPC分类号： H01F17/0033 , H01F41/046 , H01L21/486 , H05K1/115 , H05K3/403 , H01F2017/004 , H05K1/0306 , H05K1/092 , H05K2201/09645 , H05K2201/09854 , H05K2203/1476 , H05K3/005 , H05K3/245 , H05K3/4061 , Y10T29/49165
摘要： The thickness uniformity of a plated metal layer inside a via hole can be enhanced by intersecting a conductive via with an insulating aperture before plating. The new via configuration improves the mass transfer of the plating. It is believed that the apertures lower the local solution ohmic resistance near the via holes. The method can be applied to the manufacture of a wide variety of circuit boards.
摘要翻译：通孔之间的电镀金属层的厚度均匀性可以通过在电镀之前与导电通孔与绝缘孔交叉来增强。新的通孔配置改善了电镀的传质。据信孔径降低了通孔附近的局部溶液欧姆电阻。该方法可应用于各种电路板的制造。

5. 发明授权

US5779873A Electroplating of nickel on nickel ferrite devices 失效
标题翻译：镍在镍铁氧体器件上的电镀
公开(公告)号：US5779873A
公开(公告)日：1998-07-14
申请号：US769189
申请日：1996-12-18
申请人： Henry Hon Law , Lynn Frances Schneemeyer , Te-Sung Wu
发明人： Henry Hon Law , Lynn Frances Schneemeyer , Te-Sung Wu
IPC分类号： C25D3/12 , C25D5/10
CPC分类号： C25D3/12
摘要： This invention is predicated on the discovery by the present applicants that boric acid in conventional nickel plating baths is responsible for excessive lateral growth in the electroplating of nickel on nickel ferrite substrates. While nickel baths without boric acid do not yield acceptable electrodeposits, the boric acid interacts with the ferrite substrate to cause excessive lateral growth. Applicants further discovered that by eliminating the boric acid and adding another acidic plating buffer such as citric acid, one can obtain isotropic nickel plating and produce a wire-bondable surface.
摘要翻译：本发明基于本申请人的发现，常规镀镍浴中的硼酸负责镍铁氧体衬底上镍的电镀过度的横向生长。虽然没有硼酸的镍浴不能产生可接受的电沉积，但是硼酸与铁素体衬底相互作用以引起过度的横向生长。申请人还发现，通过除去硼酸并加入另一种酸性电镀缓冲液如柠檬酸，可以获得各向同性的镀镍并产生可焊接的表面。

6. 发明授权

US5618611A Metallization of ferrites through surface reduction 失效
标题翻译：铁氧体通过表面还原金属化
公开(公告)号：US5618611A
公开(公告)日：1997-04-08
申请号：US428283
申请日：1995-04-25
申请人： Sungho Jin , Henry H. Law , Thomas H. Tiefel , Te-Sung Wu
发明人： Sungho Jin , Henry H. Law , Thomas H. Tiefel , Te-Sung Wu
IPC分类号： C04B41/45 , C04B41/51 , C04B41/52 , C04B41/81 , C04B41/88 , C04B41/89 , H05K1/03 , H05K3/04 , H05K3/10 , B32B9/00
CPC分类号： C04B41/009 , C04B41/4556 , C04B41/4594 , C04B41/51 , C04B41/52 , C04B41/81 , C04B41/88 , C04B41/89 , C04B2111/00405 , C04B2111/00844 , H05K1/0306 , H05K3/045 , H05K3/105 , Y10T428/12493 , Y10T428/24917 , Y10T428/31678
摘要： The present invention provides a method for metallizing a ceramic surface comprising a ferrite through a surface reduction treatment. A ceramic surface comprising a ferrite is heated. At least a portion of the ferrite is contacted with a gaseous reducing agent to create a metallic region by removing oxygen from the ferrite. The surface is cooled and, optionally, post-treated to enhance adhesion of the metallic region. Typical gaseous reducing agents are hydrogen, forming gas, and ammonia while typical ferrites are nickel-zinc ferrites and manganese-zinc ferrites. To form patterned regions, portions of the substrate are masked or portions of the reduced layer are removed.
摘要翻译：本发明提供一种通过表面还原处理对包含铁素体的陶瓷表面进行金属化的方法。包含铁素体的陶瓷表面被加热。铁氧体的至少一部分与气态还原剂接触以通过从铁氧体中除去氧来形成金属区域。表面被冷却，并且任选地进行后处理以增强金属区域的附着力。典型的气态还原剂是氢气，形成气体和氨，而典型的铁氧体是镍 - 锌铁氧体和锰 - 锌铁氧体。为了形成图案化区域，基板的部分被掩蔽或者还原层的一部分被去除。

7. 发明授权

US06524645B1 Process for the electroless deposition of metal on a substrate 失效
标题翻译：在基板上无电沉积金属的工艺
公开(公告)号：US06524645B1
公开(公告)日：2003-02-25
申请号：US08324842
申请日：1994-10-18
申请人： Michael D. Evans , Tae Yong Kim , Henry Hon Law , Te-Sung Wu
发明人： Michael D. Evans , Tae Yong Kim , Henry Hon Law , Te-Sung Wu
IPC分类号： B05D512
CPC分类号： C23C18/1851 , C23C18/1608 , C23C18/1651 , C23C18/1692 , C23C18/1865 , C23C18/1889 , C23C18/32 , C23C18/38 , C23C18/50 , H05K1/0306 , H05K1/16 , H05K1/167 , H05K3/184 , H05K3/24 , H05K3/38 , H05K3/381 , H05K2201/0347 , H05K2203/0565 , H05K2203/1105
摘要： A process for the metalization of substrates is disclosed. The metal either forms a coating over the entire substrate, or it is patternwise deposited on the substrate surface. Metal is patternwise formed on the substrate either by forming a pattern of resist material on the substrate and depositing the material in the interstices defined by the pattern or by forming a patterned resist layer over a metal layer and transferring the pattern into the substrate using conventional techniques. The patterned resist layer is formed on the substrate using conventional techniques. The substrate is treated with reagents that promote the electroless plating of metal on the substrate surface. If the resist material has been previously formed on the substrate surface, the substrate surface is then dried. The remaining resist is then removed from the substrate surface. The substrate surface is then exposed to an electroless plating bath to form nickel onto those portions of the substrate surface that were treated with the sensitizing and activating solutions. The substrate is then heated to at least 180° C. Additional layers of metal are formed on the substrate. After the additional layers are so formed, the substrate is again heated to a temperature of at least about 180° C. after each layer is so formed.
摘要翻译：公开了一种用于基板金属化的方法。金属在整个基板上形成涂层，或者在图案上沉积在基板表面上。通过在衬底上形成抗蚀剂材料图案并将材料沉积在由图案限定的间隙中或通过在金属层上形成图案化的抗蚀剂层并且使用常规技术将图案转移到衬底中来将金属图案化地形成在衬底上。使用常规技术在衬底上形成图案化的抗蚀剂层。用促进金属在基材表面上的化学镀的试剂处理基材。如果抗蚀剂材料已经预先形成在基板表面上，则基板表面然后被干燥。然后从基材表面除去剩余的抗蚀剂。然后将基材表面暴露于无电解镀浴，以在用敏化和活化溶液处理的基材表面的那些部分上形成镍。然后将衬底加热至至少180℃。在衬底上形成额外的金属层。在附加层如此形成之后，在形成每个层之后，将衬底再次加热至至少约180℃的温度。

8. 发明授权

US08492242B2 Dry flux bonding device and method 有权
标题翻译：干焊剂结合装置及方法
公开(公告)号：US08492242B2
公开(公告)日：2013-07-23
申请号：US12787187
申请日：2010-05-25
申请人： Owen Fay , Xiao Li , Josh Woodland , Shijian Luo , Jaspreet Gandhi , Te-Sung Wu
发明人： Owen Fay , Xiao Li , Josh Woodland , Shijian Luo , Jaspreet Gandhi , Te-Sung Wu
IPC分类号： H01L33/48 , H01L23/12 , B23K1/20
CPC分类号： H01L33/62 , H01L24/29 , H01L24/83 , H01L24/94 , H01L33/0079 , H01L33/0095 , H01L2224/83193 , H01L2224/8381 , H01L2224/83825 , H01L2224/94 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/14 , H01L2224/83 , H01L2924/00
摘要： Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.
摘要翻译：描述了包括LED器件在内的器件形成方法。装置可以包括氟化化合物层。所述的方法可以利用等离子体处理来形成氟化化合物层。所描述的方法可以操作以产生金属间化合物层，其以相对有效和廉价的方式将诸如半导体晶片的两个基板结合在一起。

9. 发明申请

US20110291146A1 DRY FLUX BONDING DEVICE AND METHOD 有权
标题翻译：干流焊接装置和方法
公开(公告)号：US20110291146A1
公开(公告)日：2011-12-01
申请号：US12787187
申请日：2010-05-25
申请人： Owen Fay , Xiao Li , Josh Woodland , Shijian Luo , Jaspreet Gandhi , Te-Sung Wu
发明人： Owen Fay , Xiao Li , Josh Woodland , Shijian Luo , Jaspreet Gandhi , Te-Sung Wu
IPC分类号： H01L33/62 , H01L33/48 , B23K31/02
CPC分类号： H01L33/62 , H01L24/29 , H01L24/83 , H01L24/94 , H01L33/0079 , H01L33/0095 , H01L2224/83193 , H01L2224/8381 , H01L2224/83825 , H01L2224/94 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/14 , H01L2224/83 , H01L2924/00
摘要： Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.
摘要翻译：描述了包括LED器件在内的器件形成方法。装置可以包括氟化化合物层。所述的方法可以利用等离子体处理来形成氟化化合物层。所描述的方法可以操作以产生金属间化合物层，其以相对有效和廉价的方式将诸如半导体晶片的两个基板结合在一起。

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