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1. 发明申请

US20100067280A1 CHARGE MAPPING MEMORY ARRAY FORMED OF MATERIALS WITH MUTABLE ELECTRICAL CHARACTERISTICS 有权
公开(公告)号：US20100067280A1
公开(公告)日：2010-03-18
申请号：US12622308
申请日：2009-11-19
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： G11C5/06
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.

2. 发明申请

US20100073530A1 Method and Apparatus for Using Thin-Film Transistors and MIS Capacitors as Light-Sensing Elements in Charge Mapping Arrays 有权
标题翻译：使用薄膜晶体管和MIS电容器作为电荷映射阵列中的光敏元件的方法和装置
公开(公告)号：US20100073530A1
公开(公告)日：2010-03-25
申请号：US12235534
申请日：2008-09-22
申请人： Tse Nga Ng , Sanjiv Sambandan , William S. Wong
发明人： Tse Nga Ng , Sanjiv Sambandan , William S. Wong
IPC分类号： H04N5/335
CPC分类号： H01L27/14647 , H04N5/374
摘要： A method and apparatus for using TFT transistors or MIS capacitors as light-sensing elements in charge mapping arrays. A bias stress may be applied to a plurality of pixels in a charge map array. As a result, charge carriers may be trapped in each of the plurality of pixels responsive to the bias stress, which may be observed as a value shift such as a threshold voltage VT shift. Light may then be transmitted toward the plurality of pixels in the charge map array causing some of the pixels to absorb the light. The trapped charge carriers are released in the pixels that absorbed the light and not released in the pixels that did not absorb the light. The value shift in each of the pixels can be compared to determine which of the pixels absorbed the light.
摘要翻译：一种用于在电荷映射阵列中使用TFT晶体管或MIS电容器作为光感测元件的方法和装置。可以对电荷映射阵列中的多个像素施加偏压应力。结果，响应于偏压应力，电荷载流子可以被捕获在多个像素的每一个中，这可以被观察为诸如阈值电压VT偏移的值偏移。然后，光可以被传送到电荷映射阵列中的多个像素，导致一些像素吸收光。捕获的电荷载体在吸收光的像素中被释放，并且在不吸收光的像素中释放。可以比较每个像素中的值偏移，以确定吸收光的哪个像素。

3. 发明授权

US08198127B2 Charge mapping memory array formed of materials with mutable electrical characteristics 有权
标题翻译：电荷映射存储器阵列由具有可变电特性的材料形成
公开(公告)号：US08198127B2
公开(公告)日：2012-06-12
申请号：US12622210
申请日：2009-11-19
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： H01L51/40
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic. A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
摘要翻译：包括数据线的存储单元阵列; 电容器以及耦合在数据线和电容器之间的晶体管。电容器和晶体管中的至少一个包括具有可变电特性的材料。一种存储单元阵列，包括耦合在第一节点，第二节点和第三节点之间的第一晶体管; 以及耦合在所述第二节点和第四节点之间的第二晶体管。第一晶体管包括具有可变电特性的材料。

4. 发明授权

US08040729B2 Charge mapping memory array formed of materials with mutable electrical characteristics 有权
标题翻译：电荷映射存储器阵列由具有可变电特性的材料形成
公开(公告)号：US08040729B2
公开(公告)日：2011-10-18
申请号：US12621801
申请日：2009-11-19
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： G11C16/04
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
摘要翻译：包括数据线的存储单元阵列; 电容器以及耦合在数据线和电容器之间的晶体管。电容器和晶体管中的至少一个包括具有可变电特性的材料。存储单元阵列，包括耦合在第一节点，第二节点和第三节点之间的第一晶体管; 以及耦合在所述第二节点和第四节点之间的第二晶体管。第一晶体管包括具有可变电特征的材料。

5. 发明申请

US20100068856A1 CHARGE MAPPING MEMORY ARRAY FORMED OF MATERIALS WITH MUTABLE ELECTRICAL CHARACTERISTICS 有权
公开(公告)号：US20100068856A1
公开(公告)日：2010-03-18
申请号：US12622210
申请日：2009-11-19
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： H01L21/8242 , H01L21/82
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.

6. 发明授权

US07679951B2 Charge mapping memory array formed of materials with mutable electrical characteristics 有权
标题翻译：电荷映射存储器阵列由具有可变电特性的材料形成
公开(公告)号：US07679951B2
公开(公告)日：2010-03-16
申请号：US11962976
申请日：2007-12-21
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
摘要翻译：包括数据线的存储单元阵列; 电容器以及耦合在数据线和电容器之间的晶体管。电容器和晶体管中的至少一个包括具有可变电特性的材料。存储单元阵列，包括耦合在第一节点，第二节点和第三节点之间的第一晶体管; 以及耦合在所述第二节点和第四节点之间的第二晶体管。第一晶体管包括具有可变电特性的材料。

7. 发明授权

US08300125B2 Method and apparatus for using thin-film transistors and MIS capacitors as light-sensing elements in charge mapping arrays 有权
标题翻译：在电荷映射阵列中使用薄膜晶体管和MIS电容器作为光敏元件的方法和装置
公开(公告)号：US08300125B2
公开(公告)日：2012-10-30
申请号：US12235534
申请日：2008-09-22
申请人： Tse Nga Ng , Sanjiv Sambandan , William S. Wong
发明人： Tse Nga Ng , Sanjiv Sambandan , William S. Wong
IPC分类号： H04N3/14
CPC分类号： H01L27/14647 , H04N5/374
摘要： A method and apparatus for using TFT transistors or MIS capacitors as light-sensing elements in charge mapping arrays. A bias stress may be applied to a plurality of pixels in a charge map array. As a result, charge carriers may be trapped in each of the plurality of pixels responsive to the bias stress, which may be observed as a value shift such as a threshold voltage VT shift. Light may then be transmitted toward the plurality of pixels in the charge map array causing some of the pixels to absorb the light. The trapped charge carriers are released in the pixels that absorbed the light and not released in the pixels that did not absorb the light. The value shift in each of the pixels can be compared to determine which of the pixels absorbed the light.
摘要翻译：一种用于在电荷映射阵列中使用TFT晶体管或MIS电容器作为光感测元件的方法和装置。可以对电荷映射阵列中的多个像素施加偏压应力。结果，响应于偏压应力，电荷载流子可以被捕获在多个像素的每一个中，这可以被观察为诸如阈值电压VT偏移的值偏移。然后，光可以被传送到电荷映射阵列中的多个像素，导致一些像素吸收光。捕获的电荷载体在吸收光的像素中被释放，并且在不吸收光的像素中释放。可以比较每个像素中的值偏移，以确定吸收光的哪个像素。

8. 发明授权

US08040722B2 Charge mapping memory array formed of materials with mutable electrical characteristics 有权
公开(公告)号：US08040722B2
公开(公告)日：2011-10-18
申请号：US12622308
申请日：2009-11-19
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.

9. 发明申请

US20100067316A1 CHARGE MAPPING MEMORY ARRAY FORMED OF MATERIALS WITH MUTABLE ELECTRICAL CHARACTERISTICS 有权
标题翻译：电荷映射记忆阵列形成的具有可变电气特性的材料
公开(公告)号：US20100067316A1
公开(公告)日：2010-03-18
申请号：US12621801
申请日：2009-11-19
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： G11C7/00
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
摘要翻译：包括数据线的存储单元阵列; 电容器以及耦合在数据线和电容器之间的晶体管。电容器和晶体管中的至少一个包括具有可变电特性的材料。存储单元阵列，包括耦合在第一节点，第二节点和第三节点之间的第一晶体管; 以及耦合在所述第二节点和第四节点之间的第二晶体管。第一晶体管包括具有可变电特性的材料。

10. 发明申请

US20090161409A1 CHARGE MAPPING MEMORY ARRAY FORMED OF MATERIALS WITH MUTABLE ELECTRICAL CHARACTERISTICS 有权
标题翻译：电荷映射记忆阵列形成的具有可变电气特性的材料
公开(公告)号：US20090161409A1
公开(公告)日：2009-06-25
申请号：US11962976
申请日：2007-12-21
申请人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
发明人： William S. Wong , Sanjiv Sambandan , Tse Nga Ng , Robert A. Street
IPC分类号： G11C11/34 , H01L27/108 , H01L21/8242
CPC分类号： G11C13/003 , B82Y10/00 , G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/53 , G11C2213/74 , G11C2213/79 , G11C2213/80
摘要： A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic.A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
摘要翻译：包括数据线的存储单元阵列; 电容器以及耦合在数据线和电容器之间的晶体管。电容器和晶体管中的至少一个包括具有可变电特性的材料。存储单元阵列，包括耦合在第一节点，第二节点和第三节点之间的第一晶体管; 以及耦合在所述第二节点和第四节点之间的第二晶体管。第一晶体管包括具有可变电特性的材料。

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