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1. 发明授权

US07256718B2 Modulation apparatus and method 失效
标题翻译：调制装置及方法
公开(公告)号：US07256718B2
公开(公告)日：2007-08-14
申请号：US10469691
申请日：2003-01-15
申请人： Toshiyuki Nakagawa , Hiroshige Okamura , Minoru Tobita
发明人： Toshiyuki Nakagawa , Hiroshige Okamura , Minoru Tobita
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , H04L25/4908 , H04L25/4915
摘要： The present invention pertains to a modulation apparatus and method in which the modulation apparatus is realized with a simple circuit structure and is easily applicable to other systems. A pattern conversion unit 32 converts data having a basic data length of 2 bits supplied from a DSV control bit determination and insertion unit 31 into a variable-length code having a basic code length of 3 bits in accordance with a conversion table. A minimum-run-length limitation code detection unit 33 detects, from a data sequence containing a DSV control bit, the position of minimum runs consecutive from a channel bit string converted by the pattern conversion unit 32. A consecutive-minimum-run replacement unit 34 replaces a predetermined portion of the channel bit string supplied from the pattern conversion unit 32 for a predetermined pattern based on the position information supplied from the minimum-run-length limitation code detection unit 33, and limits the minimum run length to a predetermined number or less. The present invention is applicable to a modulation apparatus.
摘要翻译：本发明涉及调制装置和方法，其中调制装置以简单的电路结构实现，并且易于适用于其它系统。模式转换单元32根据转换表将具有从DSV控制位确定和插入单元31提供的2位的基本数据长度的数据转换为基本码长度为3位的可变长度码。最小游程长度限制代码检测单元33从包含DSV控制位的数据序列检测从由模式转换单元32转换的通道位串连续的最小运行的位置。连续最小运行替换单元34基于从最小游程长度限制代码检测单元33提供的位置信息来替换从模式转换单元32提供的预定模式的预定部分的通道位串，并且限制最小游程长度达到预定数量或更小。本发明可应用于调制装置。

2. 发明授权

US06958713B2 Modulation apparatus and method, and DSV-control-bit generating method 失效
标题翻译：调制装置和方法，以及DSV控制位产生方法
公开(公告)号：US06958713B2
公开(公告)日：2005-10-25
申请号：US11102406
申请日：2005-04-07
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M5/00 , H03M7/40
CPC分类号： G11B20/1426 , H03M5/145
摘要： A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.
摘要翻译：一种用于更精确地确定要插入到数据序列中的控制位的值的调制装置和方法以及数字和值（DSV）控制位产生方法，其中数据转换单元提供包括关于调制定界符的信息的调制分隔符信息将基于转换表的数据序列发送到调制分隔符检测单元，并向有效定界符检测单元提供包括关于具有DSV控制的数据序列的DSV段的定界符位置的信息的DSV段分隔符信号位。调制分隔符检测单元根据提供给其的调制分隔符信息来检测调制分隔符位置，并将调制分隔符信号提供给有效分隔符检测单元。有效定界符检测单元基于提供给其的DSV段分隔符信号，从由调制分隔符表示的调制分隔符位置检测用于控制用于确定相关DSV段的DSV控制位的定时的有效分隔符位置，分隔符信号。

3. 发明申请

US20050174265A1 MODULATION APPARATUS AND METHOD, AND DSV-CONTROL-BIT GENERATING METHOD 失效
公开(公告)号：US20050174265A1
公开(公告)日：2005-08-11
申请号：US11102359
申请日：2005-04-07
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M7/00
CPC分类号： G11B20/1426 , H03M5/145
摘要： A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.

4. 发明授权

US06914544B2 Modulation apparatus and method and DSV control bit generation method 失效
标题翻译：调制装置和方法以及DSV控制位产生方法
公开(公告)号：US06914544B2
公开(公告)日：2005-07-05
申请号：US10471675
申请日：2003-01-22
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M5/00 , H03M7/40
CPC分类号： G11B20/1426 , H03M5/145
摘要： A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.
摘要翻译：一种用于更精确地确定要插入到数据序列中的控制位的值的调制装置和方法以及数字和值（DSV）控制位产生方法，其中数据转换单元提供包括关于调制定界符的信息的调制分隔符信息将基于转换表的数据序列发送到调制分隔符检测单元，并向有效定界符检测单元提供包括关于具有DSV控制的数据序列的DSV段的定界符位置的信息的DSV段分隔符信号位。调制分隔符检测单元根据提供给其的调制分隔符信息来检测调制分隔符位置，并将调制分隔符信号提供给有效分隔符检测单元。有效定界符检测单元基于提供给其的DSV段分隔符信号，从由调制分隔符表示的调制分隔符位置检测用于控制用于确定相关DSV段的DSV控制位的定时的有效分隔符位置，分隔符信号。

5. 发明授权

US06982660B2 Modulation apparatus and method, and DSV-control-bit generating method 失效
标题翻译：调制装置和方法，以及DSV控制位产生方法
公开(公告)号：US06982660B2
公开(公告)日：2006-01-03
申请号：US11102359
申请日：2005-04-07
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： H03M5/00 , H03M7/40
CPC分类号： G11B20/1426 , H03M5/145
摘要： A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.
摘要翻译：一种用于更精确地确定要插入到数据序列中的控制位的值的调制装置和方法以及数字和值（DSV）控制位产生方法，其中数据转换单元提供包括关于调制定界符的信息的调制分隔符信息将基于转换表的数据序列发送到调制分隔符检测单元，并向有效定界符检测单元提供包括关于具有DSV控制的数据序列的DSV段的定界符位置的信息的DSV段分隔符信号位。调制分隔符检测单元根据提供给其的调制分隔符信息来检测调制分隔符位置，并将调制分隔符信号提供给有效分隔符检测单元。有效定界符检测单元基于提供给其的DSV段分隔符信号，从由调制分隔符表示的调制分隔符位置检测用于控制用于确定相关DSV段的DSV控制位的定时的有效分隔符位置，分隔符信号。

6. 发明授权

US06950042B2 Modulating apparatus and method, and DSV control bit producing method 失效
标题翻译：调制装置和方法，以及DSV控制位产生方法
公开(公告)号：US06950042B2
公开(公告)日：2005-09-27
申请号：US10467399
申请日：2002-12-10
申请人： Toshiyuki Nakagawa , Hiroshige Okamura , Minoru Tobita
发明人： Toshiyuki Nakagawa , Hiroshige Okamura , Minoru Tobita
IPC分类号： G11B20/10 , G11B20/14 , H03M5/14 , H03M7/14 , H03M5/00
CPC分类号： H03M5/145 , G11B20/10 , G11B20/1426 , G11B2020/1457
摘要： The present invention relates to a modulation apparatus and method and a DSV-control-bit generating method for suppressing an increase in circuit size of the modulation apparatus. When an input data stream is supplied to a DSV control bit determination unit 31, the DSV control bit determination unit 31 determines a DSV control bit to be inserted into the input data stream. Upon supplying the input data stream to the DSV control bit determination unit 31, the input data stream is simultaneously supplied to a delay processor 32. The input data stream is delayed for a predetermined delay time and supplied to a determined-DSV-control-bit insertion unit 33. The determined-DSV-control-bit insertion unit 33 inserts the DSV control bit determined by the DSV control bit determination unit 31 into a predetermined position of the input data stream supplied by the delay means and supplies the input data stream containing the DSV control bit to a modulator 34. The modulator 34 modulates the input data stream containing the DSV control bit into a code string in accordance with a predetermined coding rule (for example, 1,7PP modulation).
摘要翻译：本发明涉及用于抑制调制装置的电路尺寸增加的调制装置和方法以及DSV控制位产生方法。当输入数据流被提供给DSV控制位确定单元31时，DSV控制位确定单元31确定要插入到输入数据流中的DSV控制位。在将输入数据流提供给DSV控制位确定单元31时，输入数据流被同时提供给延迟处理器32。输入数据流延迟预定的延迟时间并提供给确定的DSV控制位插入单元33。确定的DSV控制位插入单元33将由DSV控制位确定单元31确定的DSV控制位插入由延迟装置提供的输入数据流的预定位置，并将包含DSV控制位的输入数据流到调制器34。调制器34根据预定的编码规则（例如，1,7PP调制）将包含DSV控制位的输入数据流调制成代码串。

7. 发明申请

US20050017881A1 Modulating apparatus and method, and dsv control bit producing method 失效
标题翻译：调制装置和方法，以及dsv控制位产生方法
公开(公告)号：US20050017881A1
公开(公告)日：2005-01-27
申请号：US10467399
申请日：2002-12-10
申请人： Toshiyuki Nakagawa , Hiroshige Okamura , Minoru Tobita
发明人： Toshiyuki Nakagawa , Hiroshige Okamura , Minoru Tobita
IPC分类号： G11B20/10 , G11B20/14 , H03M5/14 , H03M7/14 , H03M7/00
CPC分类号： H03M5/145 , G11B20/10 , G11B20/1426 , G11B2020/1457
摘要： The present invention relates to a modulation apparatus and method and a DSV-control-bit generating method for suppressing an increase in circuit size of the modulation apparatus. When an input data stream is supplied to a DSV control bit determination unit 31, the DSV control bit determination unit 31 determines a DSV control bit to be inserted into the input data stream. Upon supplying the input data stream to the DSV control bit determination unit 31, the input data stream is simultaneously supplied to a delay processor 32. The input data stream is delayed for a predetermined delay time and supplied to a determined-DSV-control-bit insertion unit 33. The determined-DSV-control-bit insertion unit 33 inserts the DSV control bit determined by the DSV control bit determination unit 3.1 into a predetermined position of the input data stream supplied by the delay means and supplies the input data stream containing the DSV control bit to a modulator 34. The modulator 34 modulates the input data stream containing the DSV control bit into a code string in accordance with a predetermined coding rule (for example, 1,7PP modulation).
摘要翻译：本发明涉及用于抑制调制装置的电路尺寸增加的调制装置和方法以及DSV控制位产生方法。当输入数据流被提供给DSV控制位确定单元31时，DSV控制位确定单元31确定要插入到输入数据流中的DSV控制位。在将输入数据流提供给DSV控制位确定单元31时，输入数据流被同时提供给延迟处理器32.输入数据流被延迟预定的延迟时间并提供给确定的DSV控制位插入单元33.确定的DSV控制位插入单元33将由DSV控制位确定单元3.1确定的DSV控制位插入由延迟装置提供的输入数据流的预定位置，并提供包含 DSV控制位到调制器34.调制器34根据预定的编码规则（例如，1,7PP调制）将包含DSV控制位的输入数据流调制成代码串。

8. 发明授权

US06965329B2 Modulation apparatus and method, and DSV-control-bit generating method 失效
公开(公告)号：US06965329B2
公开(公告)日：2005-11-15
申请号：US11102372
申请日：2005-04-07
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M5/00 , H03M7/40
CPC分类号： G11B20/1426 , H03M5/145
摘要： A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.

9. 发明申请

US20050174267A1 MODULATION APPARATUS AND METHOD, AND DSV-CONTROL-BIT GENERATING METHOD 失效
标题翻译：调制装置和方法以及DSV控制位生成方法
公开(公告)号：US20050174267A1
公开(公告)日：2005-08-11
申请号：US11102406
申请日：2005-04-07
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M7/00
CPC分类号： G11B20/1426 , H03M5/145
摘要： The present invention relates to a modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence, and to a DSV-control-bit generating method. A 1-7 PP data conversion unit 52 supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table based on Table 3 to a modulation-delimiter detecting unit 81, and supplies to a valid-delimiter detecting unit 81 a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence including the DSV control bit inserted. The modulation-delimiter detecting unit 81 detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto, and supplies a modulation-delimiter signal to the valid-delimiter detecting unit 82. The valid-delimiter detecting unit 82, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.
摘要翻译：本发明涉及一种用于更精确地确定要插入到数据序列中的控制位的值的调制装置和方法，以及DSV控制位产生方法。 1-7PP数据转换单元52将包括关于数据序列的调制定界符的信息的调制分隔符信息基于表3的转换表提供给调制分隔符检测单元81，并提供给有效定界符检测单元81包括关于包括插入的DSV控制位的数据序列的DSV段的定界符位置的信息的DSV段分隔符信号。调制分隔符检测单元81基于所提供的调制分隔符信息来检测调制分隔符位置，并将调制分隔符信号提供给有效定界符检测单元82.有效分隔符检测单元82基于DSV 提供给它的段分隔符信号检测有效分隔符位置，用于根据由其提供的调制分隔符信号表示的调制定界符位置来控制用于确定相关DSV段的DSV控制位的定时。

10. 发明申请

US20050174266A1 MODULATION APPARATUS AND METHOD, AND DSV-CONTROL-BIT GENERATING METHOD 失效
标题翻译：调制装置和方法以及DSV控制位生成方法
公开(公告)号：US20050174266A1
公开(公告)日：2005-08-11
申请号：US11102372
申请日：2005-04-07
申请人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
发明人： Toshiyuki Nakagawa , Minoru Tobita , Hiroshige Okamura
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M7/00
CPC分类号： G11B20/1426 , H03M5/145
摘要： A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.
摘要翻译：一种用于更精确地确定要插入到数据序列中的控制位的值的调制装置和方法以及数字和值（DSV）控制位产生方法，其中数据转换单元提供包括关于调制定界符的信息的调制分隔符信息将基于转换表的数据序列发送到调制分隔符检测单元，并向有效定界符检测单元提供包括关于具有DSV控制的数据序列的DSV段的定界符位置的信息的DSV段分隔符信号位。调制分隔符检测单元根据提供给其的调制分隔符信息来检测调制分隔符位置，并将调制分隔符信号提供给有效分隔符检测单元。有效定界符检测单元基于提供给其的DSV段分隔符信号，从由调制分隔符表示的调制分隔符位置检测用于控制用于确定相关DSV段的DSV控制位的定时的有效分隔符位置，分隔符信号。

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