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1. 发明申请

US20060258312A1 PLL circuit having a multi-band oscillator and compensating oscillation frequency 有权
公开(公告)号：US20060258312A1
公开(公告)日：2006-11-16
申请号：US11491972
申请日：2006-07-25
申请人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Henshaw
发明人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Henshaw
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03L1/02 , H03L7/087 , H03L7/099 , H03L7/183 , H03L7/187
摘要： A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

2. 发明申请

US20060258313A1 Circuit having a multi-band oscillator and compensating oscillation frequency 有权
标题翻译：具有多频带振荡器和补偿振荡频率的电路
公开(公告)号：US20060258313A1
公开(公告)日：2006-11-16
申请号：US11491978
申请日：2006-07-25
申请人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Henshaw
发明人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Henshaw
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03L1/02 , H03L7/087 , H03L7/099 , H03L7/183 , H03L7/187
摘要： A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
摘要翻译：用于通信的半导体集成电路器件设置有形成在其中的PLL电路等，PLL电路能够实现由于温度变化引起的波动的补偿，芯片面积的增加的抑制以及性能的确定边缘，并且其控制具有多个振荡频带的VCO。在通过使用具有多个振荡频带的VCO将开关切换到PLL电路中的直流电压源的一侧进行自动校准的情况下，将RFVCO的调谐电压（Vtune）固定为DC的电压值电压源。然而，由于将VCO振荡频率的温度特性赋予DC电压源，所以当校准表达到最佳时，可以最小化对频带选择的影响。

3. 发明授权

US07103337B2 PLL circuit having a multi-band oscillator and compensating oscillation frequency 有权
标题翻译： PLL电路具有多频带振荡器和补偿振荡频率
公开(公告)号：US07103337B2
公开(公告)日：2006-09-05
申请号：US10373020
申请日：2003-02-26
申请人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Astle Henshaw
发明人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Astle Henshaw
IPC分类号： H04B1/06
CPC分类号： H03L7/0898 , H03F1/0211 , H03F1/0266 , H03F1/0272 , H03F1/345 , H03F2200/294 , H03F2200/372 , H03G3/3042 , H03G3/3047 , H03L7/099 , H03L7/187 , H04B2001/0416 , H04L27/0008 , H04L27/2017 , H04L27/2071 , H04L27/361 , H04L27/368
摘要： A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
摘要翻译：用于通信的半导体集成电路器件设置有形成在其中的PLL电路等，PLL电路能够实现由于温度变化引起的波动的补偿，芯片面积的增加的抑制以及性能的确定边缘，并且其控制具有多个振荡频带的VCO。在通过使用具有多个振荡频带的VCO将开关切换到PLL电路中的直流电压源的一侧进行自动校准的情况下，将RFVCO的调谐电压（Vtune）固定为DC的电压值电压源。然而，由于将VCO振荡频率的温度特性赋予DC电压源，所以当校准表达到最佳时，可以最小化对频带选择的影响。

4. 发明授权

US07269402B2 PLL circuit having a multi-band oscillator and compensating oscillation frequency 有权
公开(公告)号：US07269402B2
公开(公告)日：2007-09-11
申请号：US11491972
申请日：2006-07-25
申请人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Astle Henshaw
发明人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Astle Henshaw
IPC分类号： H04B1/06
CPC分类号： H03L1/02 , H03L7/087 , H03L7/099 , H03L7/183 , H03L7/187
摘要： A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

5. 发明授权

US07263340B2 PLL circuit having a multi-band oscillator and compensating oscillation frequency 有权
标题翻译： PLL电路具有多频带振荡器和补偿振荡频率
公开(公告)号：US07263340B2
公开(公告)日：2007-08-28
申请号：US11491978
申请日：2006-07-25
申请人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Astle Henshaw
发明人： Toshiya Uozumi , Satoshi Tanaka , Masumi Kasahara , Hirotaka Oosawa , Yasuyuki Kimura , Robert Astle Henshaw
IPC分类号： H04B1/06
CPC分类号： H03L1/02 , H03L7/087 , H03L7/099 , H03L7/183 , H03L7/187
摘要： A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
摘要翻译：用于通信的半导体集成电路器件设置有形成在其中的PLL电路等，PLL电路能够实现由于温度变化引起的波动的补偿，芯片面积的增加的抑制以及性能的确定边缘，并且其控制具有多个振荡频带的VCO。在通过使用具有多个振荡频带的VCO将开关切换到PLL电路中的直流电压源的一侧进行自动校准的情况下，将RFVCO的调谐电压（Vtune）固定为DC的电压值电压源。然而，由于将VCO振荡频率的温度特性赋予DC电压源，所以当校准表达到最佳时，可以最小化对频带选择的影响。

6. 发明申请

US20070010225A1 Communication semiconductor integrated circuit device and wireless communication system 失效
公开(公告)号：US20070010225A1
公开(公告)日：2007-01-11
申请号：US11519061
申请日：2006-09-12
申请人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
发明人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
IPC分类号： H04B1/40 , H04B1/06
CPC分类号： H03L7/10 , H03L7/0891 , H03L7/193
摘要： The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained. Further, a control voltage closest to the set frequency is determined on the basis of the frequency difference and the frequency variable range of the selected band and the control voltage is applied to the oscillator to start oscillating operation. After that, a PLL loop is closed and locked.

7. 发明申请

US20070281651A1 Communication semiconductor integrated circuit device and wireless communication system 审中-公开
公开(公告)号：US20070281651A1
公开(公告)日：2007-12-06
申请号：US11808285
申请日：2007-06-08
申请人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
发明人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
IPC分类号： H04B1/06
CPC分类号： H03L7/10 , H03L7/0891 , H03L7/193
摘要： The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained. Further, a control voltage closest to the set frequency is determined on the basis of the frequency difference and the frequency variable range of the selected band and the control voltage is applied to the oscillator to start oscillating operation. After that, a PLL loop is closed and locked.

8. 发明授权

US07242916B2 Communication semiconductor integrated circuit device and wireless communication system 失效
标题翻译：通信半导体集成电路器件和无线通信系统
公开(公告)号：US07242916B2
公开(公告)日：2007-07-10
申请号：US11519061
申请日：2006-09-12
申请人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
发明人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03L7/10 , H03L7/0891 , H03L7/193
摘要： The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained. Further, a control voltage closest to the set frequency is determined on the basis of the frequency difference and the frequency variable range of the selected band and the control voltage is applied to the oscillator to start oscillating operation. After that, a PLL loop is closed and locked.
摘要翻译：本发明提供一种通信半导体集成电路器件（RF IC），即使在PLL电路的频率可设定范围宽但不提供电流的情况下，能够以高速将PLL电路的频率拉高至期望的设定频率来源，而不是在正常操作中充电和放电的电流源。作为PLL电路的组件的振荡器被构造成在多个频带中操作。在振荡器的控制电压固定为预定值的状态下，在每个频带中测量振荡器的振荡频率并存储在存储电路中。将用于指定在PLL操作时提供的频带的设定值与存储的测量频率值进行比较。从比较的结果可以确定在振荡器中实际使用的频带，并且获得所选频带的最大频率与设定频率之间的频率差。此外，基于所选频带的频率差和频率可变范围来确定最接近设定频率的控制电压，并且将控制电压施加到振荡器以开始振荡操作。之后，PLL环路闭合并锁定。

9. 发明授权

US07146143B2 Communication semiconductor integrated circuit device and wireless communication system 失效
公开(公告)号：US07146143B2
公开(公告)日：2006-12-05
申请号：US10414149
申请日：2003-04-16
申请人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
发明人： Hirotaka Oosawa , Masumi Kasahara , Noriyuki Kurakami , Toshiya Uozumi
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03L7/10 , H03L7/0891 , H03L7/193
摘要： The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained. Further, a control voltage closest to the set frequency is determined on the basis of the frequency difference and the frequency variable range of the selected band and the control voltage is applied to the oscillator to start oscillating operation. After that, a PLL loop is closed and locked.

10. 发明申请

US20050239499A1 Communication semiconductor integrated circuit and radio communication system 有权
公开(公告)号：US20050239499A1
公开(公告)日：2005-10-27
申请号：US11122062
申请日：2005-05-05
申请人： Hirotaka Oosawa , Jiro Shinbo , Noriyuki Kurakami , Masumi Kasahara , Robert Henshaw
发明人： Hirotaka Oosawa , Jiro Shinbo , Noriyuki Kurakami , Masumi Kasahara , Robert Henshaw
IPC分类号： H03L7/08 , H03D3/00 , H03J1/00 , H03J7/06 , H03L7/089 , H03L7/10 , H03L7/18 , H03L7/187 , H03L7/193 , H04B1/40 , H03L7/00 , H04B1/28 , H04M1/00
CPC分类号： H03D3/008 , H03J1/005 , H03J7/06 , H03L7/0891 , H03L7/10 , H03L7/193
摘要： A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.

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