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1. 发明申请

US20110035716A1 DESIGN SUPPORT PROGRAM, DESIGN SUPPORT DEVICE, AND DESIGN SUPPORT METHOD 有权
标题翻译：设计支持计划，设计支持设备和设计支持方法
公开(公告)号：US20110035716A1
公开(公告)日：2011-02-10
申请号：US12849337
申请日：2010-08-03
申请人： Toshio HINO , Tsuyoshi SAKATA , Tomoyuki YAMADA
发明人： Toshio HINO , Tsuyoshi SAKATA , Tomoyuki YAMADA
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/78
摘要： A design support program stored in a recording medium readable by a computer includes acquiring a first analysis result including information about an area included in circuit information of a design target circuit and a second analysis result relating to a path of the circuit information, the temperature of the area being equal to or higher than a certain temperature; determining an arbitrary cell on a non-critical path from among cells arranged in the area as a target cell for decreasing the area temperature; and outputting a result of the determination.
摘要翻译：存储在可由计算机读取的记录介质中的设计支持程序包括获取包括关于设计目标电路的电路信息中包括的区域的信息的第一分析结果和与电路信息的路径相关的第二分析结果，该面积等于或高于一定温度; 从布置在该区域中的小区之间的非关键路径上确定任意小区作为用于降低区域温度的目标小区; 并输出确定的结果。

2. 发明申请

US20090037855A1 SIMULATION METHOD AND COMPUTER-READABLE STORAGE MEDIUM 有权
标题翻译：模拟方法和计算机可读存储介质
公开(公告)号：US20090037855A1
公开(公告)日：2009-02-05
申请号：US12111470
申请日：2008-04-29
申请人： Yusuke TANEFUSA , Norihiro HARADA , Tsuyoshi SAKATA , Tomoyuki YAMADA
发明人： Yusuke TANEFUSA , Norihiro HARADA , Tsuyoshi SAKATA , Tomoyuki YAMADA
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： A simulation method to be implemented in a computer causes the computer to execute a procedure carrying out a weighting with respect to layout parameters of a circuit, which is an analyzing target, based on priority information of cells forming the circuit, and converting the weighted layout parameters into physical characteristics and storing the physical characteristics in a memory part, a procedure converting the physical characteristic read from the memory part into circuit parameters and storing the circuit parameters into the memory part, and analyzing the circuit based on a net list including the circuit parameters read from the memory part.
摘要翻译：要在计算机中实现的模拟方法使得计算机基于作为分析对象的电路的布局参数，基于形成电路的单元的优先级信息来执行对加权的加权，并且将加权布局参数转换为物理特性并将物理特性存储在存储器部分中，将从存储器部分读取的物理特性转换为电路参数并将电路参数存储到存储器部分中的过程，以及基于包括电路的网络列表来分析电路参数从内存部分读取。

3. 发明申请

US20120139602A1 APPARATUS AND METHOD FOR SUPPORTING CIRCUIT DESIGN, AND SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：支持电路设计的装置和方法以及半导体集成电路
公开(公告)号：US20120139602A1
公开(公告)日：2012-06-07
申请号：US13236231
申请日：2011-09-19
申请人： Tsuyoshi SAKATA
发明人： Tsuyoshi SAKATA
IPC分类号： H03H11/26 , G06F17/50
CPC分类号： G06F17/5031
摘要： In a circuit design support apparatus, a selection unit selects a delay circuit model from among two or more delay circuit models with wire load based on different values of physical parameters relating to wiring, on the basis of a difference value in a physical parameter between a first path and a second path, the first path being from a branch point of a clock signal line for supplying a clock signal to a register model of a semiconductor integrated circuit model to be designed up to a clock signal input terminal of the register model, the second path being from the branch point up to a data signal input terminal of the register model. An arrangement unit arranges the selected delay circuit model on a data signal line connected to the data signal input terminal.
摘要翻译：在电路设计支持装置中，选择单元基于与布线有关的物理参数的不同值，从具有有线负载的两个或更多个延迟电路模型中选择延迟电路模型，第一路径和第二路径，第一路径来自时钟信号线的分支点，用于将时钟信号提供给要被设计到寄存器模型的时钟信号输入端的半导体集成电路模型的寄存器模型，第二路径是从分支点直到寄存器模型的数据信号输入端。布置单元将所选择的延迟电路模型布置在连接到数据信号输入端的数据信号线上。

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