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1. 发明授权

US08233347B2 Semiconductor memory, semiconductor device, and system 有权
标题翻译：半导体存储器，半导体器件和系统
公开(公告)号：US08233347B2
公开(公告)日：2012-07-31
申请号：US12631353
申请日：2009-12-04
申请人： Toshikazu Nakamura , Atsushi Takeuchi , Atsushi Nakakubo
发明人： Toshikazu Nakamura , Atsushi Takeuchi , Atsushi Nakakubo
IPC分类号： G11C5/14 , G11C8/00
CPC分类号： G11C8/08 , G11C5/145 , G11C8/18 , G11C11/406 , G11C11/4074
摘要： A semiconductor memory includes: a voltage supply circuit which supplies a first voltage to a word line when an internal circuit is in a standby state, and supplies a second voltage higher than the first voltage to the word line when the internal circuit is in an active state; and a control circuit changes a drive capacity of the voltage supply circuit when changing from the standby state to the active state and the second voltage is supplied to the word line.
摘要翻译：半导体存储器包括：当内部电路处于待机状态时向字线提供第一电压的电压供应电路，并且当内部电路处于活动状态时将高于第一电压的第二电压提供给字线州; 并且当从待机状态变为激活状态并且第二电压被提供给字线时，控制电路改变电压供应电路的驱动能力。

2. 发明申请

US20100142306A1 SEMICONDUCTOR MEMORY, SEMICONDUCTOR DEVICE, AND SYSTEM 有权
标题翻译：半导体存储器，半导体器件和系统
公开(公告)号：US20100142306A1
公开(公告)日：2010-06-10
申请号：US12631353
申请日：2009-12-04
申请人： Toshikazu NAKAMURA , Atsushi Takeuchi , Atsushi Nakakubo
发明人： Toshikazu NAKAMURA , Atsushi Takeuchi , Atsushi Nakakubo
IPC分类号： G11C5/14
CPC分类号： G11C8/08 , G11C5/145 , G11C8/18 , G11C11/406 , G11C11/4074
摘要： A semiconductor memory includes: a voltage supply circuit which supplies a first voltage to a word line when an internal circuit is in a standby state, and supplies a second voltage higher than the first voltage to the word line when the internal circuit is in an active state; and a control circuit changes a drive capacity of the voltage supply circuit when changing from the standby state to the active state and the second voltage is supplied to the word line.
摘要翻译：半导体存储器包括：当内部电路处于待机状态时向字线提供第一电压的电压供应电路，并且当内部电路处于活动状态时将高于第一电压的第二电压提供给字线州; 并且当从待机状态变为激活状态并且第二电压被提供给字线时，控制电路改变电压供应电路的驱动能力。

3. 发明授权

US08284619B2 Semiconductor integrated circuit and system 有权
标题翻译：半导体集成电路和系统
公开(公告)号：US08284619B2
公开(公告)日：2012-10-09
申请号：US12134843
申请日：2008-06-06
申请人： Atsushi Nakakubo
发明人： Atsushi Nakakubo
IPC分类号： G11C5/14
CPC分类号： G11C11/4074 , G11C11/406 , G11C2211/4067
摘要： An internal circuit has a plurality of circuit blocks operating by receiving an internal power supply voltage. An internal voltage control circuit generates a plurality of regulator control signals according to a combination of operating circuit blocks. A plurality of regulators operate in response to activation of the regulator control signals respectively to generate the internal power supply voltage by using an external power supply voltage. For example, as the number of the operating circuit blocks increases, the number of the operating regulators increases. By thus generating the regulator control signals according to the actual operation of the internal circuit to control the operations of the regulators, it is possible to reduce variation in the internal power supply voltage to a minimum. As a result, an operating margin of a semiconductor integrated circuit can be improved and a yield of the semiconductor integrated circuit can be improved.
摘要翻译：内部电路具有通过接收内部电源电压而工作的多个电路块。内部电压控制电路根据操作电路块的组合产生多个调节器控制信号。多个调节器分别响应于调节器控制信号的激活而操作，以通过使用外部电源电压来产生内部电源电压。例如，随着操作电路块的数量增加，操作调节器的数量增加。通过根据内部电路的实际操作产生调节器控制信号以控制调节器的操作，可以将内部电源电压的变化减小到最小。结果，可以提高半导体集成电路的工作裕度，并且可以提高半导体集成电路的产量。

4. 发明授权

US08294448B2 Semiconductor memory power control system with voltage generator to supply voltage to an internal circuit by boosting an external voltage 有权
标题翻译：具有电压发生器的半导体存储器功率控制系统，通过升压外部电压向内部电路供电
公开(公告)号：US08294448B2
公开(公告)日：2012-10-23
申请号：US12624799
申请日：2009-11-24
申请人： Atsushi Nakakubo
发明人： Atsushi Nakakubo
IPC分类号： G05F5/00 , G05F1/24
CPC分类号： G11C5/145 , G11C11/4074
摘要： A semiconductor device is provides which includes: a first boost circuit that generates a first boost voltage by boosting an external voltage and supplies the first boost voltage to an internal circuit; and a first circuit that supplies the external voltage to an output of the first boost circuit when power is turned on and supplies the first boost voltage to the output of the first boost circuit when the external voltage reaches a given voltage.
摘要翻译：提供一种半导体器件，其包括：第一升压电路，其通过升高外部电压并将第一升压电压提供给内部电路来产生第一升压电压; 以及第一电路，其在接通电源时将外部电压提供给所述第一升压电路的输出，并且当所述外部电压达到给定电压时，将所述第一升压电压提供给所述第一升压电路的输出。

5. 发明授权

US08379464B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US08379464B2
公开(公告)日：2013-02-19
申请号：US13024979
申请日：2011-02-10
申请人： Atsushi Nakakubo
发明人： Atsushi Nakakubo
IPC分类号： G11C5/14
CPC分类号： G11C16/30 , G11C5/145 , G11C5/148 , G11C16/32
摘要： A semiconductor device includes a booster circuit and a detector. The booster circuit is configured to boost an input voltage and output an output voltage, and the detector is configured to output the output voltage, which is output from the booster circuit, and control the booster circuit to generate a plurality of different voltages in accordance with an operating mode.
摘要翻译：半导体器件包括升压电路和检测器。升压电路被配置为升高输入电压并输出输出电压，并且检测器被配置为输出从升压电路输出的输出电压，并且控制升压电路以根据产生多个不同的电压一种操作模式。

6. 发明授权

US08345503B2 Booster circuit and semiconductor memory 有权
标题翻译：加速电路和半导体存储器
公开(公告)号：US08345503B2
公开(公告)日：2013-01-01
申请号：US12892251
申请日：2010-09-28
申请人： Atsushi Nakakubo
发明人： Atsushi Nakakubo
IPC分类号： G11C5/14
CPC分类号： G11C16/12 , G11C5/145
摘要： A booster circuit includes a first capacitor and a second capacitor serially coupled between a first node and a second node through a third node; a third capacitor and a fourth capacitor serially coupled between a fourth node and a fifth node through a sixth node; a first switch coupling the third node with a power supply line when the fourth node is set to a first level; a second switch coupling the sixth node with the power supply line when the first node is set to the first level; a third switch transferring a plurality of electric charges of the sixth node to the second node; a fourth switch transferring a plurality of electric charges of the third node to the fifth node; a fifth switch coupling the second node with a voltage line; and a sixth switch coupling the fifth node with the voltage line.
摘要翻译：升压电路包括通过第三节点串联连接在第一节点和第二节点之间的第一电容器和第二电容器; 通过第六节点串联耦合在第四节点和第五节点之间的第三电容器和第四电容器; 当所述第四节点被设置为第一电平时，将所述第三节点与电源线耦合的第一开关; 当所述第一节点被设置为所述第一电平时，将所述第六节点与所述电源线耦合的第二开关; 将所述第六节点的多个电荷传送到所述第二节点的第三开关; 将第三节点的多个电荷传送到第五节点的第四开关; 将所述第二节点与电压线耦合的第五开关; 以及将第五节点与电压线耦合的第六开关。

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