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1. 发明授权

US07061055B2 Double-gate field-effect transistor, integrated circuit using the transistor and method of manufacturing the same 有权
公开(公告)号：US07061055B2
公开(公告)日：2006-06-13
申请号：US10325969
申请日：2002-12-23
申请人： Toshihiro Sekigawa , Kenichi Ishii , Eiichi Suzuki
发明人： Toshihiro Sekigawa , Kenichi Ishii , Eiichi Suzuki
IPC分类号： H01L29/76 , H01L29/94 , H01L27/01 , H01L29/80
CPC分类号： H01L29/785 , H01L29/42384 , H01L29/66545 , H01L29/66795 , H01L29/66818
摘要： A double-gate field-effect transistor includes a substrate, an insulation film formed on the substrate, source, drain and channel regions formed on the insulation film from a semiconductor crystal layer, and two insulated gate electrodes electrically insulated from each other. The gate electrodes are formed opposite each other on the same principal surface as the channel region, with the channel region between the electrodes. The source, drain and channel regions are isolated from the surrounding part by a trench, forming an island. Gate insulation films are formed on the opposing side faces of the channel region exposed in the trench. The island region between the gate electrodes is given a width that is less than the length of the channel region to enhance the short channel effect suppressive property of structure.

2. 发明申请

US20050199919A1 Semiconductor integrated circuit and method for manufacturing the same 失效
标题翻译：半导体集成电路及其制造方法
公开(公告)号：US20050199919A1
公开(公告)日：2005-09-15
申请号：US11067699
申请日：2005-03-01
申请人： Yongxun Liu , Toshihiro Sekigawa , Meishoku Masahara , Kenichi Ishii , Eiichi Suzuki
发明人： Yongxun Liu , Toshihiro Sekigawa , Meishoku Masahara , Kenichi Ishii , Eiichi Suzuki
IPC分类号： H01L27/08 , H01L21/02 , H01L21/336 , H01L21/8234 , H01L21/8238 , H01L21/84 , H01L27/00 , H01L27/088 , H01L27/092 , H01L27/12 , H01L29/423 , H01L29/76 , H01L29/786
CPC分类号： H01L29/785 , H01L21/845 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L2924/0002 , H01L2924/00
摘要： Upstanding thin-film channel regions 5 having different heights are formed between source regions 7 and drain regions 8 of MOS transistors, respectively.
摘要翻译：分别在MOS晶体管的源极区域7和漏极区域8之间形成具有不同高度的直立薄膜沟道区域5。

3. 发明申请

US20070029623A1 Dual-gate field effect transistor 审中-公开
标题翻译：双栅场效应晶体管
公开(公告)号：US20070029623A1
公开(公告)日：2007-02-08
申请号：US10580433
申请日：2004-12-06
申请人： Yongxun Liu , Meishoku Masahara , Kenichi Ishii , Toshihiro Sekigawa , Eiichi Suzuki
发明人： Yongxun Liu , Meishoku Masahara , Kenichi Ishii , Toshihiro Sekigawa , Eiichi Suzuki
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L29/785 , H01L29/42384 , H01L29/66795
摘要： A dual-gate field effect transistor includes a substrate 1, a source 7-1, a drain 7-2, a vertical channel 5 provided between the source and the drain as rising from the substrate, a pair of gate insulation films 6-1 and 6-2 sandwiching the channel from a direction orthogonal to a carrier-running direction in the channel and a pair of gate electrodes 3-1 and 3-2 facing the vertical channel 5, respectively, via the pair of gate insulation films 6-1 and 6-2, wherein the pair of insulation films have different thicknesses t1 and t2. It is also possible that the pair of gate insulation films 6-1 and 6-2 have different permittivities ε1 and ε2 and that the pair of gate electrodes have different work functions Φ1 and Φ2. Thus, it is possible to set the threshold voltage of the dual-gate field effect transistor to a desired value when fabricating it. Furthermore, it is possible to avoid the problem of an increase in subthreshold slope that occurs in the prior art.
摘要翻译：双栅场效应晶体管包括衬底1，源极7-1，漏极7-2，设置在源极和漏极之间的垂直沟道5，从衬底上升，一对栅极绝缘膜6-1 6-2夹着通道，并且通过一对栅极绝缘膜6〜6分别与沟道5的载流子行进方向正交的方向和一对面对垂直沟道5的栅电极3〜1〜3〜 1和6-2，其中一对绝缘膜具有不同的厚度t 1和t 2。也可能的是，一对栅极绝缘膜6-1和6-2具有不同的介电常数ε1和ε2，并且一对栅电极具有不同的功函数Phi 1和Phi 2.因此，可以在制造时将双栅极场效应晶体管的阈值电压设置为期望值。此外，可以避免在现有技术中发生的亚阈值斜率增加的问题。

4. 发明授权

US07382020B2 Semiconductor integrated circuit 失效
标题翻译：半导体集成电路
公开(公告)号：US07382020B2
公开(公告)日：2008-06-03
申请号：US11067699
申请日：2005-03-01
申请人： Yongxun Liu , Toshihiro Sekigawa , Meishoku Masahara , Kenichi Ishii , Eiichi Suzuki
发明人： Yongxun Liu , Toshihiro Sekigawa , Meishoku Masahara , Kenichi Ishii , Eiichi Suzuki
IPC分类号： H01L23/62
CPC分类号： H01L29/785 , H01L21/845 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L2924/0002 , H01L2924/00
摘要： Upstanding thin-film channel regions 5 having different heights are formed between source regions 7 and drain regions 8 of MOS transistors, respectively.
摘要翻译：分别在MOS晶体管的源极区域7和漏极区域8之间形成具有不同高度的直立薄膜沟道区域5。

5. 发明授权

US06630388B2 Double-gate field-effect transistor, integrated circuit using the transistor and method of manufacturing the same 失效
公开(公告)号：US06630388B2
公开(公告)日：2003-10-07
申请号：US10095936
申请日：2002-03-13
申请人： Toshihiro Sekigawa , Kenichi Ishii , Eiichi Suzuki
发明人： Toshihiro Sekigawa , Kenichi Ishii , Eiichi Suzuki
IPC分类号： H01L21331
CPC分类号： H01L29/785 , H01L29/42384 , H01L29/66545 , H01L29/66795 , H01L29/66818
摘要： A double-gate field-effect transistor includes a substrate, an insulation film formed on the substrate, source, drain and channel regions formed on the insulation film from a semiconductor crystal layer, and two insulated gate electrodes electrically insulated from each other. The gate electrodes are formed opposite each other on the same principal surface as the channel region, with the channel region between the electrodes. The source, drain and channel regions are isolated from the surrounding part by a trench, forming an island. Gate insulation films are formed on the opposing side faces of the channel region exposed in the trench. The island region between the gate electrodes is given a width that is less than the length of the channel region to enhance the short channel effect suppressive property of structure.

6. 发明授权

US08922603B2 Multi-primary color display device 有权
标题翻译：多原色显示设备
公开(公告)号：US08922603B2
公开(公告)日：2014-12-30
申请号：US13574892
申请日：2010-12-07
申请人： Masashi Yonemaru , Masahiko Nakamizo , Kenichi Ishii
发明人： Masashi Yonemaru , Masahiko Nakamizo , Kenichi Ishii
IPC分类号： G09G5/02 , G09G3/36
CPC分类号： G09G3/3648 , G02F2201/52 , G09G3/3614 , G09G3/3677 , G09G2300/0452 , G09G2310/0202 , G09G2310/0205
摘要： A multi-primary color display device is capable of handling an increased number of primary colors for color image display with a reduced number of external parts, with reduced increase in the amount of drive circuit and reduced increase in operating speed. An active matrix liquid crystal panel includes a display section constituted by pixel formation portions, each made of four sub pixel-formation portions which handle four primary colors. These four sub pixel-formation portions are arranged in a 2×2 matrix pattern. With such a pixel configuration, a source driver drives as many as M source lines, which is two times the number M of pixels arranged in a horizontal direction. A gate driver is formed on the liquid crystal panel integrally with pixel circuit in the display section, and drives as many as N gate lines, which is two times the number N of the pixels arranged in a vertical direction.
摘要翻译：多原色显示装置能够以减少的外部部件的数量来处理用于彩色图像显示的原色数量的增加，驱动电路的量的增加减少并且降低了操作速度的增加。有源矩阵液晶面板包括由像素形成部分构成的显示部分，每个像素形成部分由处理四原色的四个子像素形成部分构成。这四个子像素形成部分以2×2矩阵图案排列。通过这样的像素配置，源驱动器驱动多达M个源线，其是沿水平方向排列的像素数M的两倍。在液晶面板上与显示部分中的像素电路一体形成栅极驱动器，并且驱动与垂直方向排列的像素数N的两倍的N条栅极线。

7. 发明授权

US08786965B2 Die processing method, die, objective lens, and optical pick-up device 有权
标题翻译：模具加工方法，模具，物镜和光学拾取装置
公开(公告)号：US08786965B2
公开(公告)日：2014-07-22
申请号：US13498575
申请日：2010-08-17
申请人： Kenichi Ishii , Kyu Takada
发明人： Kenichi Ishii , Kyu Takada
IPC分类号： G02B3/02 , G02B3/00 , G11B7/1374
CPC分类号： G11B7/1374 , B23B1/00 , B23B27/005 , B23B27/06 , B29C33/424 , B29D11/00009 , B29D11/0048 , G02B5/1895 , G11B7/1353 , G11B7/13922 , G11B7/22 , G11B2007/0006
摘要： A method for processing a material for a die for molding an objective lens which is formed with a multilevel structure on the curved surface thereof, wherein the transfer surface of the objective lens is cut by a tool having a cutting face, the outline of which includes a linear first edge portion, a linear second edge portion extending in a direction which intersects the first edge portion at an acute angle thereto, and a third edge portion which joins the ends of the first and second edge portions, while the die material is rotated around the axis thereof, in a state in which at least the first edge portion and the second edge portion of the tool is inclined with respect to the axis and while the tool is moved only in the axial direction and in the direction which intersects the axis.
摘要翻译：一种在其弯曲表面上形成多层结构的用于模制成型物镜的模具的材料的处理方法，其中物镜的转印面被具有切割面的工具切割，其轮廓包括线性第一边缘部分，沿着与第一边缘部分成锐角相交的方向延伸的线性第二边缘部分，以及连接第一边缘部分和第二边缘部分的端部的第三边缘部分，同时模具材料旋转在其工具的至少第一边缘部分和第二边缘部分相对于轴线倾斜的状态下，并且当工具仅在轴向方向和与轴线相交的方向上移动时。

8. 发明授权

US08618767B2 Charging control apparatus for vehicle and vehicle 有权
标题翻译：车辆和车辆充电控制装置
公开(公告)号：US08618767B2
公开(公告)日：2013-12-31
申请号：US12676686
申请日：2008-09-12
申请人： Kenichi Ishii , Ryuichi Kamaga , Masahiro Karami , Satoshi Fukui
发明人： Kenichi Ishii , Ryuichi Kamaga , Masahiro Karami , Satoshi Fukui
IPC分类号： H02J7/00 , H02J7/14
CPC分类号： H01M10/441 , B60L3/0069 , B60L3/0084 , B60L3/0092 , B60L3/04 , B60L3/12 , B60L11/123 , B60L11/14 , B60L11/1812 , B60L11/1814 , B60L11/1816 , B60L15/007 , B60L2220/14 , B60L2220/54 , Y02T10/6217 , Y02T10/641 , Y02T10/645 , Y02T10/7005 , Y02T10/7072 , Y02T10/7077 , Y02T90/127 , Y02T90/14 , Y02T90/16
摘要： A switch of a connecting circuit is connected between a signal line branched from an input terminal for a pilot signal in a charging inlet and a ground line connected to a vehicle earth, and is turned on/off in response to a control signal from a CPU. The CPU causes the switch to be turned on when a connector is not connected to the charging inlet, and detects a break in a control pilot line based on whether or not a change in the potential of the pilot signal occurs at that time.
摘要翻译：连接电路的开关连接在从用于充电入口中的导频信号的输入端子分支的信号线和连接到车辆地线的接地线之间，并且响应于来自CPU的控制信号而被接通/断开。当连接器未连接到充电插座时，CPU使开关导通，并且基于该时间是否发生导频信号的电位的变化来检测控制导频线中断。

9. 发明授权

US08280398B2 Positioning system, positioning method, and program thereof 有权
标题翻译：定位系统，定位方法及程序
公开(公告)号：US08280398B2
公开(公告)日：2012-10-02
申请号：US10591370
申请日：2005-03-03
申请人： Kenichi Ishii , Junichi Matsuda
发明人： Kenichi Ishii , Junichi Matsuda
IPC分类号： H04B10/00
CPC分类号： H05B37/029 , G01S1/70 , G01S5/0009 , G01S5/16
摘要： A positioning system includes an illumination device, a terminal, and a positioning server. The illumination device transmits identification information. The terminal transmits the identification information received from the illumination device, to the positioning server. The positioning server uses the identification information received from the terminal, thereby searching an illumination installation position database registered in advance so as to identify the terminal position. This eliminates power supply for positioning infrastructure and facilitates attachment to a ceiling, thereby realizing the positioning infrastructure at a low cost.
摘要翻译：定位系统包括照明装置，终端和定位服务器。照明装置发送识别信息。终端将从照明装置接收的识别信息发送到定位服务器。定位服务器使用从终端接收的识别信息，从而搜索预先登记的照明安装位置数据库，以识别终端位置。这消除了用于定位基础设施的电源，并且便于附接到天花板，从而以低成本实现定位基础设施。

10. 发明申请

US20110254170A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20110254170A1
公开(公告)日：2011-10-20
申请号：US13039975
申请日：2011-03-03
申请人： Kenichi Ishii
发明人： Kenichi Ishii
IPC分类号： H01L23/48
CPC分类号： H01L23/525 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a semiconductor device includes a base layer on which a revision signal transmission circuit is formed, three or more interconnect layers laminated on the base layer, a power source interconnect or a ground interconnect on an uppermost interconnect layer, and a revision signal line which connects the revision control circuit only to the power source interconnect or the ground interconnect of the uppermost interconnect layer.
摘要翻译：根据一个实施例，半导体器件包括其上形成有修订信号传输电路的基底层，层叠在基底层上的三个或更多个互连层，最上面的互连层上的电源互连或接地互连，以及修订版信号线，其将修订控制电路仅连接到电源互连或最上层互连层的接地互连。

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