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1. 发明申请

US20110296682A1 MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD 有权
标题翻译：多层印刷线路板及制造多层印刷线路板的方法
公开(公告)号：US20110296682A1
公开(公告)日：2011-12-08
申请号：US13211001
申请日：2011-08-16
申请人： Toru NAKAI , Sho Akai
发明人： Toru NAKAI , Sho Akai
IPC分类号： H05K3/46 , H05K3/42
CPC分类号： H05K3/421 , H05K3/06 , H05K3/4602 , H05K3/4661 , H05K2201/0959 , H05K2203/0369
摘要： A multilayer printed wiring board includes a first interlaminar resin insulating layer, a first conductor circuit formed on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit, a second conductor circuit formed on the second interlaminar resin insulating layer. A via conductor can be formed in the opening portion. The opening portion of the second interlaminar resin insulating layer can expose a face of the first conductor circuit. The via conductor connects the first conductor circuit and the second conductor circuit. The via conductor includes an electroless plating film formed on inner wall face of the opening portion and includes an electrolytic plating film formed on the electroless plating film and on the exposed face of the first conductor circuit exposed by the opening portion. The second conductor circuit includes the electroless plating film and the electrolytic plating film.
摘要翻译：多层印刷电路板包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的第一导体电路，形成在第一层间树脂绝缘层和第一导体电路上的第二层间树脂绝缘层，第二导体电路形成在第二层间树脂绝缘层上。通孔导体可以形成在开口部分中。第二层间树脂绝缘层的开口部分可露出第一导体电路的表面。通孔导体连接第一导体电路和第二导体电路。通孔导体包括形成在开口部的内壁面上的无电镀膜，并且包括形成在化学镀膜上的电解镀膜和由开口部露出的第一导体电路的露出面。第二导体电路包括无电镀膜和电解镀膜。

2. 发明授权

US08314348B2 Multilayer printed wiring board and method of manufacturing multilayer printed wiring board 有权
标题翻译：多层印刷线路板及其制造方法多层印刷线路板
公开(公告)号：US08314348B2
公开(公告)日：2012-11-20
申请号：US12333398
申请日：2008-12-12
申请人： Toru Nakai , Sho Akai
发明人： Toru Nakai , Sho Akai
IPC分类号： H05K1/11
CPC分类号： H05K3/421 , H05K3/06 , H05K3/4602 , H05K3/4661 , H05K2201/0959 , H05K2203/0369
摘要： A multilayer printed wiring board includes a first interlaminar resin insulating layer, a first conductor circuit formed on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit, a second conductor circuit formed on the second interlaminar resin insulating layer. A via conductor can be formed in the opening portion. The opening portion of the second interlaminar resin insulating layer can expose a face of the first conductor circuit. The via conductor connects the first conductor circuit and the second conductor circuit. The via conductor includes an electroless plating film formed on inner wall face of the opening portion and includes an electrolytic plating film formed on the electroless plating film and on the exposed face of the first conductor circuit exposed by the opening portion. The second conductor circuit includes the electroless plating film and the electrolytic plating film.
摘要翻译：多层印刷电路板包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的第一导体电路，形成在第一层间树脂绝缘层和第一导体电路上的第二层间树脂绝缘层，第二导体电路形成在第二层间树脂绝缘层上。通孔导体可以形成在开口部分中。第二层间树脂绝缘层的开口部分可露出第一导体电路的表面。通孔导体连接第一导体电路和第二导体电路。通孔导体包括形成在开口部的内壁面上的无电解镀膜，并且包括形成在化学镀膜上的电解镀膜和由开口部露出的第一导体电路的露出面。第二导体电路包括无电镀膜和电解镀膜。

3. 发明申请

US20090218119A1 METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD 审中-公开
标题翻译：制造多层印刷线路板的方法
公开(公告)号：US20090218119A1
公开(公告)日：2009-09-03
申请号：US12327444
申请日：2008-12-03
申请人： Toru Nakai , Sho Akai
发明人： Toru Nakai , Sho Akai
IPC分类号： H05K1/00 , H05K1/09 , C25D5/02
CPC分类号： H05K3/4644 , H05K3/108 , H05K3/4602 , H05K3/4661 , H05K2201/0341 , H05K2201/0347 , H05K2201/0959 , H05K2203/073 , Y10T29/4913 , Y10T29/49156 , Y10T29/49162 , Y10T29/49165
摘要： A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.
摘要翻译：一种制造多层印刷线路板的方法包括在第一层间树脂绝缘层上形成第一层间树脂绝缘层，第一导体电路，第二层间树脂绝缘层，第二层间树脂绝缘层中的开口部分，露出面第一导体电路的第二层间树脂绝缘层上的无电镀膜和暴露面，以及化学镀膜上的电镀抗蚀剂。该方法还包括用具有比无电镀膜低的离子倾向的薄膜导体层和暴露面的金属代替化学镀膜，在化学镀膜的一部分上形成包括金属的电镀膜和薄膜导体层，剥离电镀抗蚀剂，以及除去通过剥离暴露的化学镀膜。

4. 发明授权

US08683685B2 Method of manufacturing multilayer printed wiring board 有权
标题翻译：多层印刷线路板的制造方法
公开(公告)号：US08683685B2
公开(公告)日：2014-04-01
申请号：US13211001
申请日：2011-08-16
申请人： Toru Nakai , Sho Akai
发明人： Toru Nakai , Sho Akai
IPC分类号： H01K3/10
CPC分类号： H05K3/421 , H05K3/06 , H05K3/4602 , H05K3/4661 , H05K2201/0959 , H05K2203/0369
摘要： A multilayer printed wiring board includes a first interlaminar resin insulating layer, a first conductor circuit formed on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit, a second conductor circuit formed on the second interlaminar resin insulating layer. A via conductor can be formed in the opening portion. The opening portion of the second interlaminar resin insulating layer can expose a face of the first conductor circuit. The via conductor connects the first conductor circuit and the second conductor circuit. The via conductor includes an electroless plating film formed on inner wall face of the opening portion and includes an electrolytic plating film formed on the electroless plating film and on the exposed face of the first conductor circuit exposed by the opening portion. The second conductor circuit includes the electroless plating film and the electrolytic plating film.
摘要翻译：多层印刷电路板包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的第一导体电路，形成在第一层间树脂绝缘层和第一导体电路上的第二层间树脂绝缘层，第二导体电路形成在第二层间树脂绝缘层上。通孔导体可以形成在开口部分中。第二层间树脂绝缘层的开口部分可露出第一导体电路的表面。通孔导体连接第一导体电路和第二导体电路。通孔导体包括形成在开口部的内壁面上的无电解镀膜，并且包括形成在化学镀膜上的电解镀膜和由开口部露出的第一导体电路的露出面。第二导体电路包括无电镀膜和电解镀膜。

5. 发明申请

US20090218125A1 MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD 有权
标题翻译：多层印刷线路板及制造多层印刷线路板的方法
公开(公告)号：US20090218125A1
公开(公告)日：2009-09-03
申请号：US12333398
申请日：2008-12-12
申请人： Toru NAKAI , Sho Akai
发明人： Toru NAKAI , Sho Akai
IPC分类号： H05K1/11 , C25D5/02
CPC分类号： H05K3/421 , H05K3/06 , H05K3/4602 , H05K3/4661 , H05K2201/0959 , H05K2203/0369
摘要： A multilayer printed wiring board includes a first interlaminar resin insulating layer, a first conductor circuit formed on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit, a second conductor circuit formed on the second interlaminar resin insulating layer. A via conductor can be formed in the opening portion. The opening portion of the second interlaminar resin insulating layer can expose a face of the first conductor circuit. The via conductor connects the first conductor circuit and the second conductor circuit. The via conductor includes an electroless plating film formed on inner wall face of the opening portion and includes an electrolytic plating film formed on the electroless plating film and on the exposed face of the first conductor circuit exposed by the opening portion. The second conductor circuit includes the electroless plating film and the electrolytic plating film.
摘要翻译：多层印刷电路板包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的第一导体电路，形成在第一层间树脂绝缘层和第一导体电路上的第二层间树脂绝缘层，第二导体电路形成在第二层间树脂绝缘层上。通孔导体可以形成在开口部分中。第二层间树脂绝缘层的开口部分可露出第一导体电路的表面。通孔导体连接第一导体电路和第二导体电路。通孔导体包括形成在开口部的内壁面上的无电解镀膜，并且包括形成在化学镀膜上的电解镀膜和由开口部露出的第一导体电路的露出面。第二导体电路包括无电镀膜和电解镀膜。

6. 发明申请

US20110272286A1 METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD 有权
标题翻译：制造多层印刷线路板的方法
公开(公告)号：US20110272286A1
公开(公告)日：2011-11-10
申请号：US13187060
申请日：2011-07-20
申请人： Toru NAKAI , Sho Akai
发明人： Toru NAKAI , Sho Akai
IPC分类号： C25D5/02 , C25D7/00
CPC分类号： H05K3/4644 , H05K3/108 , H05K3/4602 , H05K3/4661 , H05K2201/0341 , H05K2201/0347 , H05K2201/0959 , H05K2203/073 , Y10T29/4913 , Y10T29/49156 , Y10T29/49162 , Y10T29/49165
摘要： A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.
摘要翻译：一种制造多层印刷线路板的方法包括在第一层间树脂绝缘层上形成第一层间树脂绝缘层，第一导体电路，第二层间树脂绝缘层，第二层间树脂绝缘层中的开口部分，露出面第一导体电路的第二层间树脂绝缘层上的无电镀膜和暴露面，以及化学镀膜上的电镀抗蚀剂。该方法还包括用具有比无电镀膜低的离子倾向的薄膜导体层和暴露面的金属代替化学镀膜，在化学镀膜的一部分上形成包括金属的电镀膜和薄膜导体层，剥离电镀抗蚀剂，以及除去通过剥离暴露的化学镀膜。

7. 发明授权

US08499446B2 Method of manufacturing multilayer printed wiring board 有权
标题翻译：多层印刷线路板的制造方法
公开(公告)号：US08499446B2
公开(公告)日：2013-08-06
申请号：US13187060
申请日：2011-07-20
申请人： Toru Nakai , Sho Akai
发明人： Toru Nakai , Sho Akai
IPC分类号： H05K3/02 , C25D5/02
CPC分类号： H05K3/4644 , H05K3/108 , H05K3/4602 , H05K3/4661 , H05K2201/0341 , H05K2201/0347 , H05K2201/0959 , H05K2203/073 , Y10T29/4913 , Y10T29/49156 , Y10T29/49162 , Y10T29/49165
摘要： A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.
摘要翻译：一种制造多层印刷线路板的方法包括在第一层间树脂绝缘层上形成第一层间树脂绝缘层，第一导体电路，第二层间树脂绝缘层，第二层间树脂绝缘层中的开口部分，露出面第一导体电路的第二层间树脂绝缘层上的无电镀膜和暴露面，以及化学镀膜上的电镀抗蚀剂。该方法还包括用具有比无电镀膜低的离子倾向的薄膜导体层和暴露面的金属代替化学镀膜，在化学镀膜的一部分上形成包括金属的电镀膜和薄膜导体层，剥离电镀抗蚀剂，以及除去通过剥离暴露的化学镀膜。

8. 发明授权

US08661665B2 Method for manufacturing multilayer printed wiring board 有权
标题翻译：多层印刷线路板的制造方法
公开(公告)号：US08661665B2
公开(公告)日：2014-03-04
申请号：US13315821
申请日：2011-12-09
申请人： Sho Akai , Tatsuya Imai , Iku Tokihisa
发明人： Sho Akai , Tatsuya Imai , Iku Tokihisa
IPC分类号： H01K3/10
CPC分类号： H05K3/3452 , H05K3/244 , H05K3/389 , H05K3/4644 , H05K2201/099 , H05K2203/025
摘要： A multilayer printed wiring board including a first interlayer resin insulation layer, a pad formed on the first interlayer resin insulation layer, a solder resist layer formed on the first interlayer resin insulation layer and the pad, a protective film formed on a portion of the pad exposed by an opening of the solder resist layer, and a coating layer formed between the pad and the solder resist layer. The pad mounts an electronic component. The coating layer has a metal layer and a coating film. The metal layer is formed on the surface of the pad and the coating film is formed on the metal layer.
摘要翻译：一种多层印刷线路板，包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的焊盘，形成在第一层间树脂绝缘层上的阻焊层和焊盘，形成在焊盘的一部分上的保护膜由阻焊层的开口暴露，以及形成在焊盘和阻焊层之间的涂层。垫安装电子元件。涂层具有金属层和涂膜。金属层形成在焊盘的表面上，涂膜形成在金属层上。

9. 发明申请

US20080078810A1 Manufacturing method and manufacturing apparatus of printed wiring board 有权
标题翻译：印刷电路板的制造方法和制造装置
公开(公告)号：US20080078810A1
公开(公告)日：2008-04-03
申请号：US11528539
申请日：2006-09-28
申请人： Yoichiro Kawamura , Katsuiko Tanno , Masanori Iriyama , Sho Akai
发明人： Yoichiro Kawamura , Katsuiko Tanno , Masanori Iriyama , Sho Akai
IPC分类号： A47J36/02
CPC分类号： H05K3/3478 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/11334 , H01L2924/00014 , H01L2924/15174 , H05K1/0269 , H05K3/225 , H05K2203/041 , H05K2203/043 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A solder ball is loaded on a bump having a small height (FIG. 5(B)) and the height of the bump is intensified by melting the solder ball by heating with laser (FIG. 5(C)). Thus, the heights of the bumps are adjusted within a requested allowable range. Because the bump is not removed by heating when the height of the low bump is intensified, the printed wiring board is not subjected to local heat history thereby intensifying reliability of the bump of a printed wiring board.
摘要翻译：在具有小高度的凸块上加载焊球（图5（B）），并且通过用激光加热来熔化焊球来增强凸块的高度（图5（C））。因此，凸起的高度在所要求的允许范围内被调整。由于当低凸起的高度增强时凸起不会被加热而消除，印刷电路板不会受到局部的热历史，从而增强印刷电路板的凸块的可靠性。

10. 发明授权

US09038266B2 Multilayer printed wiring board and method for manufacturing multilayer printed wiring board 有权
标题翻译：多层印刷线路板及其制造方法
公开(公告)号：US09038266B2
公开(公告)日：2015-05-26
申请号：US13314689
申请日：2011-12-08
申请人： Sho Akai , Tatsuya Imai , Iku Tokihisa
发明人： Sho Akai , Tatsuya Imai , Iku Tokihisa
IPC分类号： H05K3/46 , H05K3/38 , H05K3/24 , H05K3/42
CPC分类号： H05K3/389 , H05K3/244 , H05K3/384 , H05K3/421 , H05K3/4644 , H05K2203/0361 , H05K2203/073 , H05K2203/0789 , Y10T29/49155 , Y10T29/49165
摘要： A multilayer printed wiring board including a first interlayer resin insulation layer, a first conductive circuit formed on the first interlayer resin insulation layer, a second interlayer resin insulation layer formed on the first interlayer resin insulation layer and the first conductive circuit and having an opening portion exposing a portion of the first conductive circuit, a second conductive circuit formed on the second interlayer resin insulation layer, a via conductor formed in the opening portion of the second interlayer resin insulation layer and connecting the first conductive circuit and the second conductive circuit, and a coating layer having a metal layer and a coating film and formed between the first conductive circuit and the second interlayer resin insulation layer. The metal layer is formed on the surface of the first conductive circuit and the coating film is formed on the metal layer.
摘要翻译：一种多层印刷电路板，包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的第一导电电路，形成在第一层间树脂绝缘层上的第二层间树脂绝缘层和第一导电电路，并且具有开口部分暴露第一导电电路的一部分，形成在第二层间树脂绝缘层上的第二导电电路，形成在第二层间树脂绝缘层的开口部分并连接第一导电电路和第二导电电路的通孔导体，以及具有金属层和涂膜的涂层，形成在第一导电电路和第二层间树脂绝缘层之间。金属层形成在第一导电电路的表面上，并且涂层膜形成在金属层上。

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