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1. 发明申请

US20100328322A1 IMAGE PROCESSING APPARATUS 审中-公开
标题翻译：图像处理设备
公开(公告)号：US20100328322A1
公开(公告)日：2010-12-30
申请号：US12821503
申请日：2010-06-23
申请人： Tomonori YONEMOTO , Keisuke Nakazono , Akira Ueno , Ryosuke Mochizuki
发明人： Tomonori YONEMOTO , Keisuke Nakazono , Akira Ueno , Ryosuke Mochizuki
IPC分类号： G06T1/00
CPC分类号： G06T1/20
摘要： An image processing apparatus includes an image processing block, a plurality of control blocks, and a plurality of register sets. The image processing block carries out a specific process based on input setting data. Each of the plurality of control blocks controls the specific process of the image processing block independently. The plurality of register sets are used in data communication between each of the plurality of control blocks and the image processing block. When any one of the plurality of control blocks is controlling the specific process of the image processing block, each of the remaining control blocks performs data communication with the image processing block using the corresponding register set.
摘要翻译：图像处理装置包括图像处理块，多个控制块和多个寄存器组。图像处理块基于输入设置数据执行特定处理。多个控制块中的每一个独立地控制图像处理块的特定处理。多个寄存器组用于多个控制块和图像处理块中的每一个之间的数据通信。当多个控制块中的任何一个控制图像处理块的特定处理时，其余控制块中的每一个使用对应的寄存器组与图像处理块进行数据通信。

2. 发明申请

US20120042111A1 BUS BANDWIDTH MONITORING DEVICE AND BUS BANDWIDTH MONITORING METHOD 审中-公开
标题翻译：总线带宽监视装置和总线带宽监视方法
公开(公告)号：US20120042111A1
公开(公告)日：2012-02-16
申请号：US13209942
申请日：2011-08-15
申请人： Keisuke Nakazono , Tomonori Yonemoto , Akira Ueno
发明人： Keisuke Nakazono , Tomonori Yonemoto , Akira Ueno
IPC分类号： G06F13/14
CPC分类号： G06F13/14
摘要： A bus bandwidth monitoring device may include a buffer unit that is connected to a common bus, the buffer unit storing data that has been input via the common bus, a processing unit that performs predetermined processing based on the data stored in the buffer unit, and a detection unit that detects a bandwidth of the data of the common bus based on a state of storage of the data that is input to the buffer unit through the common bus.
摘要翻译：总线带宽监视装置可以包括连接到公共总线的缓冲器单元，该缓冲器单元存储经由公共总线输入的数据;处理单元，其基于存储在缓冲器单元中的数据执行预定处理;以及检测单元，其基于通过公共总线输入到缓冲器单元的数据的存储状态来检测公共总线的数据的带宽。

3. 发明申请

US20120042110A1 BUS BANDWIDTH MONITORING DEVICE AND BUS BANDWIDTH MONITORING METHOD 有权
标题翻译：总线带宽监视装置和总线带宽监视方法
公开(公告)号：US20120042110A1
公开(公告)日：2012-02-16
申请号：US13207877
申请日：2011-08-11
申请人： Keisuke Nakazono , Tomonori Yonemoto , Akira Ueno
发明人： Keisuke Nakazono , Tomonori Yonemoto , Akira Ueno
IPC分类号： G06F13/36 , G06F13/14
CPC分类号： G06F13/14
摘要： A bus bandwidth monitoring device may include a buffer unit that is connected to a common bus, the buffer unit storing data that has been input via the common bus, a processing unit that performs predetermined processing based on the data stored in the buffer unit, and a detection unit that detects a bandwidth of data transmitted through the common bus based on a state of data transaction between the buffer unit and the processing unit.
摘要翻译：总线带宽监视装置可以包括连接到公共总线的缓冲器单元，该缓冲器单元存储经由公共总线输入的数据;处理单元，其基于存储在缓冲器单元中的数据执行预定处理;以及检测单元，其基于所述缓冲器单元和所述处理单元之间的数据事务的状态来检测通过所述公共总线发送的数据的带宽。

4. 发明授权

US08732378B2 Bus bandwidth monitoring device and bus bandwidth monitoring method 有权
标题翻译：总线带宽监控设备和总线带宽监控方法
公开(公告)号：US08732378B2
公开(公告)日：2014-05-20
申请号：US13207877
申请日：2011-08-11
申请人： Keisuke Nakazono , Tomonori Yonemoto , Akira Ueno
发明人： Keisuke Nakazono , Tomonori Yonemoto , Akira Ueno
IPC分类号： G06F13/26
CPC分类号： G06F13/14
摘要： A bus bandwidth monitoring device may include a buffer unit that is connected to a common bus, the buffer unit storing data that has been input via the common bus, a processing unit that performs predetermined processing based on the data stored in the buffer unit, and a detection unit that detects a bandwidth of data transmitted through the common bus based on a state of data transaction between the buffer unit and the processing unit.
摘要翻译：总线带宽监视装置可以包括连接到公共总线的缓冲器单元，该缓冲器单元存储经由公共总线输入的数据;处理单元，其基于存储在缓冲器单元中的数据执行预定处理;以及检测单元，其基于所述缓冲器单元和所述处理单元之间的数据事务的状态来检测通过所述公共总线发送的数据的带宽。

5. 发明授权

US08724923B2 Image processing apparatus and image processing method for correcting distorted image data 有权
标题翻译：用于校正失真图像数据的图像处理装置和图像处理方法
公开(公告)号：US08724923B2
公开(公告)日：2014-05-13
申请号：US13190982
申请日：2011-07-26
申请人： Keisuke Nakazono , Yoshinobu Tanaka , Akira Ueno
发明人： Keisuke Nakazono , Yoshinobu Tanaka , Akira Ueno
IPC分类号： G06K9/40 , G06K9/32 , G09G5/00 , H04N11/20 , H04N7/01 , H04N9/74 , G06F7/38
CPC分类号： H04N5/3572
摘要： An image processing apparatus may include a distortion correcting unit performing distortion correction processing on input image data to generate output image data. The distortion correcting unit may include a distortion correction coordinate transforming unit that obtains coordinates indicating a position of the input image data corresponding to a position of the output image data, a range calculating unit that calculates a range of the input image data to be used in the distortion correction processing based on the coordinates of the input image data obtained by the distortion correction coordinate transforming unit, a correction information storage unit, an input image data storage unit, and an interpolation calculating unit that checks an amount of the input image data stored in the input image data storage unit based on the information regarding the range of the input image data.
摘要翻译：图像处理装置可以包括对输入图像数据执行失真校正处理以产生输出图像数据的失真校正单元。失真校正单元可以包括失真校正坐标变换单元，其获取表示与输出图像数据的位置对应的输入图像数据的位置的坐标;范围计算单元，计算要使用的输入图像数据的范围基于由失真校正坐标变换单元获得的输入图像数据的坐标，校正信息存储单元，输入图像数据存储单元和内插计算单元的失真校正处理，该内插计算单元检查存储的输入图像数据的量在输入图像数据存储单元中基于关于输入图像数据的范围的信息。

6. 发明授权

US08369632B2 Image processing apparatus and imaging apparatus 有权
标题翻译：图像处理装置和成像装置
公开(公告)号：US08369632B2
公开(公告)日：2013-02-05
申请号：US12725300
申请日：2010-03-16
申请人： Akira Ueno , Keisuke Nakazono , Yoshinobu Tanaka
发明人： Akira Ueno , Keisuke Nakazono , Yoshinobu Tanaka
IPC分类号： G06K9/36
CPC分类号： H04N19/423 , H04N19/80
摘要： An image processing apparatus includes image processors and a margin storing buffer. The image processors read an input image data from a frame memory for each image data of a plurality of block lines each having a first number of pixels along the columns and a second number of pixels along the rows. The margin storing buffer stores the image data of the margin portion used also in the image processing of the image data of the next block line, among the image data of the present block line input to each of the image processors. Each of the image processors performs the image processing on an image data including the image data of the present block line and the image data of the margin portion, at the time of image processing on the image data of the next block line.
摘要翻译：图像处理装置包括图像处理器和边缘存储缓冲器。图像处理器从帧存储器读取每个具有沿列的第一数量像素的多个块行的每个图像数据的输入图像数据和沿行的第二数量的像素。在输入到每个图像处理器的当前块行的图像数据中，边缘存储缓冲器还存储用于下一个块行的图像数据的图像处理中的边缘部分的图像数据。在对下一个块行的图像数据进行图像处理时，每个图像处理器对包括当前块行的图像数据和边缘部分的图像数据的图像数据执行图像处理。

7. 发明申请

US20120027320A1 IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US20120027320A1
公开(公告)日：2012-02-02
申请号：US13190982
申请日：2011-07-26
申请人： Keisuke Nakazono , Yoshinobu Tanaka , Akira Ueno
发明人： Keisuke Nakazono , Yoshinobu Tanaka , Akira Ueno
IPC分类号： G06K9/40
CPC分类号： H04N5/3572
摘要： An image processing apparatus may include a distortion correcting unit performing distortion correction processing on input image data to generate output image data. The distortion correcting unit may include a distortion correction coordinate transforming unit that obtains coordinates indicating a position of the input image data corresponding to a position of the output image data, a range calculating unit that calculates a range of the input image data to be used in the distortion correction processing based on the coordinates of the input image data obtained by the distortion correction coordinate transforming unit, a correction information storage unit, an input image data storage unit, and an interpolation calculating unit that checks an amount of the input image data stored in the input image data storage unit based on the information regarding the range of the input image data.
摘要翻译：图像处理装置可以包括对输入图像数据执行失真校正处理以产生输出图像数据的失真校正单元。失真校正单元可以包括失真校正坐标变换单元，其获取表示与输出图像数据的位置对应的输入图像数据的位置的坐标;范围计算单元，计算要使用的输入图像数据的范围基于由失真校正坐标变换单元获得的输入图像数据的坐标，校正信息存储单元，输入图像数据存储单元和内插计算单元的失真校正处理，该内插计算单元检查存储的输入图像数据的量在输入图像数据存储单元中基于关于输入图像数据的范围的信息。

8. 发明申请

US20100328724A1 IMAGE PROCESSING APPARATUS 有权
标题翻译：图像处理设备
公开(公告)号：US20100328724A1
公开(公告)日：2010-12-30
申请号：US12821570
申请日：2010-06-23
申请人： Tomomi Sekimoto , Keisuke Nakazono , Akira Ueno
发明人： Tomomi Sekimoto , Keisuke Nakazono , Akira Ueno
IPC分类号： G06K15/00
CPC分类号： G06T3/00
摘要： An image processing apparatus includes a processing block, a first control block, and a second control block. The first control block issues a write request signal for inputting a first write pulse to a register of the processing block. The second control block issues a second write pulse cliffs differing from the first write pulse with timing independent of the first control block. The processing block includes the register, a write pulse generating circuit which generates the first write pulse according to the write request signal from the first control block, and a switching circuit which selects either the first write pulse or the second write pulse and inputs the selected pulse to the register.
摘要翻译：图像处理装置包括处理块，第一控制块和第二控制块。第一控制块发出用于将第一写入脉冲输入到处理块的寄存器的写入请求信号。第二控制块发出与第一写入脉冲不同的第二写入脉冲悬置，与第一控制块无关。处理块包括寄存器，根据来自第一控制块的写请求信号产生第一写入脉冲的写入脉冲产生电路，以及选择第一写入脉冲或第二写入脉冲并输入所选择的输入的切换电路脉冲到寄存器。

9. 发明申请

US20100321538A1 IMAGE PROCESSING APPARATUS AND IMAGING APPARATUS 有权
标题翻译：图像处理装置和成像装置
公开(公告)号：US20100321538A1
公开(公告)日：2010-12-23
申请号：US12772414
申请日：2010-05-03
申请人： Keisuke Nakazono , Akira Ueno , Yoshinobu Tanaka
发明人： Keisuke Nakazono , Akira Ueno , Yoshinobu Tanaka
IPC分类号： H04N5/217 , G06K9/40
CPC分类号： H04N5/3572
摘要： An image processing apparatus includes a distortion correction unit, a distortion correction range calculation unit, a control unit, a storage control unit, and a margin storage memory. The distortion correction unit performs a distortion correction processing on image data stored in a frame memory. The distortion correction range calculation unit calculates distortion correction ranges. The control unit determines an input image range from present distortion correction range and next distortion correction range. The storage control unit calculates a range for a part of the image data corresponding to the input image range from the present distortion correction range and the next distortion correction range. The margin storage memory stores the image data of the range calculated by the storage control unit. The image data input to the distortion correction unit includes both the image data from the frame memory and the image data from the margin storage memory.
摘要翻译：图像处理装置包括失真校正单元，失真校正范围计算单元，控制单元，存储控制单元和余量存储存储器。失真校正单元对存储在帧存储器中的图像数据进行失真校正处理。失真校正范围计算单元计算失真校正范围。控制单元从当前失真校正范围和下一个失真校正范围确定输入图像范围。存储控制单元根据当前的失真校正范围和下一个失真校正范围来计算与输入图像范围对应的图像数据的一部分的范围。边缘存储存储器存储由存储控制单元计算的范围的图像数据。输入到失真校正单元的图像数据包括来自帧存储器的图像数据和来自边缘存储存储器的图像数据。

10. 发明授权

US07610421B2 Bus request control circuit 有权
标题翻译：总线请求控制电路
公开(公告)号：US07610421B2
公开(公告)日：2009-10-27
申请号：US11174217
申请日：2005-07-01
申请人： Keisuke Nakazono , Akira Ueno
发明人： Keisuke Nakazono , Akira Ueno
IPC分类号： G06F13/00 , G06F13/42
CPC分类号： G06F13/3625 , G06F13/364
摘要： A bus request control circuit provided in a signal processing circuit having a higher priority in an arbitration circuit includes a request signal transmitting section which transmits a request signal to request a bus right to the arbitration circuit. A request acknowledge signal receiving section receives a request acknowledge signal transmitted from the arbitration circuit in response to the request signal transmitted to the arbitration circuit. Further, the request signal from the request signal transmitting section is transmitted after lapse of a predetermined time since reception of the request acknowledge signal.
摘要翻译：设置在仲裁电路中具有较高优先级的信号处理电路中的总线请求控制电路包括请求信号发送部分，该请求信号发送部分向仲裁电路发送请求总线权限的请求信号。请求确认信号接收部分响应于发送到仲裁电路的请求信号，接收从仲裁电路发送的请求确认信号。此外，来自请求信号发送部分的请求信号在从接收到请求确认信号起经过预定时间之后发送。

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