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    • 3. 发明申请
    • Endoscope signal processor, endoscope apparatus and endoscope signal processing method
    • 内窥镜信号处理器,内窥镜装置及内窥镜信号处理方法
    • US20070139521A1
    • 2007-06-21
    • US11638755
    • 2006-12-14
    • Kazumasa Takahashi
    • Kazumasa Takahashi
    • H04N7/18
    • H04N5/23203A61B1/00006A61B1/00105A61B1/045H04N2005/2255
    • An endoscope signal processor to which an endoscope having an image pickup device is detachably connected has a phase-locked loop circuit in which a phase comparator compares a phase of a variable clock with that of a reference clock output from the image pickup device to generate a variable clock phase-synchronized with the reference clock. The processor includes a gate section opened or closed to input of the reference clock to the phase comparator, an operation control signal generation section which generates an operation control signal for setting the phase-locked loop circuit in a closed loop operable state during intermittent periods, and a sync timing setting section which synchronizes a timing of starting the generation of the operation control signal with a timing of input of the variable clock to the phase comparator at least within a predetermined time period shorter than the cycle of the variable clock.
    • 具有可拆卸地连接有图像拾取装置的内窥镜的内窥镜信号处理器具有锁相环电路,其中相位比较器将可变时钟的相位与从图像拾取装置输出的基准时钟的相位进行比较, 可变时钟与参考时钟相位同步。 该处理器包括一个开启或关闭以将参考时钟输入到相位比较器的门极部分,一个操作控制信号产生部分,在间歇期间产生用于将锁相环电路设定在闭环可操作状态的操作控制信号, 以及同步定时设定部,其至少在比可变时钟的周期短的预定时间段内,将开始生成操作控制信号的定时与可变时钟的输入定时同步到相位比较器。
    • 6. 发明授权
    • Endoscope signal processor, endoscope apparatus and endoscope signal processing method
    • 内窥镜信号处理器,内窥镜装置及内窥镜信号处理方法
    • US08248464B2
    • 2012-08-21
    • US11638755
    • 2006-12-14
    • Kazumasa Takahashi
    • Kazumasa Takahashi
    • H04N7/18
    • H04N5/23203A61B1/00006A61B1/00105A61B1/045H04N2005/2255
    • An endoscope signal processor to which an endoscope having an image pickup device is detachably connected has a phase-locked loop circuit in which a phase comparator compares a phase of a variable clock with that of a reference clock output from the image pickup device to generate a variable clock phase-synchronized with the reference clock. The processor includes a gate section opened or closed to input of the reference clock to the phase comparator, an operation control signal generation section which generates an operation control signal for setting the phase-locked loop circuit in a closed loop operable state during intermittent periods, and a sync timing setting section which synchronizes a timing of starting the generation of the operation control signal with a timing of input of the variable clock to the phase comparator at least within a predetermined time period shorter than the cycle of the variable clock.
    • 具有可拆卸地连接有图像拾取装置的内窥镜的内窥镜信号处理器具有锁相环电路,其中相位比较器将可变时钟的相位与从图像拾取装置输出的基准时钟的相位进行比较, 可变时钟与参考时钟相位同步。 该处理器包括一个开启或关闭以将参考时钟输入到相位比较器的门极部分,一个操作控制信号产生部分,在间歇期间产生用于将锁相环电路设定在闭环可操作状态的操作控制信号, 以及同步定时设定部,其至少在比可变时钟的周期短的预定时间段内,将开始生成操作控制信号的定时与可变时钟的输入定时同步到相位比较器。