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1. 发明申请

US20090108958A1 NOISE FILTER ARRAY 有权
标题翻译：噪声滤波器阵列
公开(公告)号：US20090108958A1
公开(公告)日：2009-04-30
申请号：US12352027
申请日：2009-01-12
申请人： Kenjiro HADANO , Tomohiro SASAKI , Haruhiko UENO
发明人： Kenjiro HADANO , Tomohiro SASAKI , Haruhiko UENO
IPC分类号： H03H7/00
CPC分类号： H03H7/0115 , H01F2017/0026 , H01F2017/0073 , H01G4/35 , H01G4/40 , H03H7/1725 , H03H7/1758 , H03H7/1766 , H03H2001/0085
摘要： A noise filter array includes filter elements, each of which includes an LC parallel resonant circuit having a coil and a capacitor and an LC series resonant circuit having a coil and a capacitor, are arranged substantially parallel to one another in an array and integrally provided. Grounding capacitors that define the filter elements are arranged so that a common ground-side electrode faces signal-side electrodes and is connected to an inductance adjusting conductor that defines the LC series resonant circuits along with the capacitors through a via hole. The lengths of the inductance adjusting conductor from a connection location within the via hole to ground terminals are substantially equal in each of the filter elements.
摘要翻译：噪声滤波器阵列包括滤波器元件，每个滤波器元件包括具有线圈和电容器的LC并联谐振电路和具有线圈和电容器的LC串联谐振电路，其基本上彼此平行地排列并且一体地设置。限定滤波器元件的接地电容器被布置成使得公共接地侧电极面对信号侧电极并且连接到电感调节导体，其通过通孔与电容器一起限定LC串联谐振电路。电感调节导体从通孔内的连接位置到接地端子的长度在每个滤波器元件中基本相等。

2. 发明申请

US20090121806A1 NOISE FILTER ARRAY 有权
标题翻译：噪声滤波器阵列
公开(公告)号：US20090121806A1
公开(公告)日：2009-05-14
申请号：US12358318
申请日：2009-01-23
申请人： Tomohiro SASAKI , Kenjiro HADANO , Haruhiko UENO
发明人： Tomohiro SASAKI , Kenjiro HADANO , Haruhiko UENO
IPC分类号： H03H7/01 , H03H7/12
CPC分类号： H03H7/0115 , H01F2017/0026 , H01G4/35 , H01G4/40 , H03H1/00 , H03H7/1708 , H03H7/175 , H03H7/1758 , H03H7/1766 , H03H2001/0085
摘要： A noise filter array includes filter elements including an LC parallel resonant circuit and an LC series resonant circuit each of which includes a coil and a capacitor provided in proximity in an array and integrally provided with one another. The LC series resonant circuits include ground capacitors having signal-side electrodes. Inductance adjustment conductors are connected to signal-side electrodes of the capacitors defining the respective filter elements, and a ground electrode of the capacitors is commonly arranged so as to oppose the signal-side electrodes.
摘要翻译：噪声滤波器阵列包括包括LC并联谐振电路和LC串联谐振电路的滤波器元件，每个LC串联谐振电路包括线圈和阵列附近设置并且彼此一体地设置的电容器。 LC串联谐振电路包括具有信号侧电极的接地电容器。电感调节导体连接到限定各个滤波器元件的电容器的信号侧电极，并且电容器的接地电极通常布置成与信号侧电极相对。

3. 发明申请

US20120188684A1 MULTILAYER CERAMIC ELECTRONIC COMPONENT 有权
标题翻译：多层陶瓷电子元件
公开(公告)号：US20120188684A1
公开(公告)日：2012-07-26
申请号：US13357677
申请日：2012-01-25
申请人： Teppei AKAZAWA , Kenjiro HADANO , Masahiro SAKURATANI
发明人： Teppei AKAZAWA , Kenjiro HADANO , Masahiro SAKURATANI
IPC分类号： H01G4/12
CPC分类号： H01G4/005 , H01G4/012 , H01G4/232 , H01G4/30
摘要： In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.
摘要翻译：在多层陶瓷电子部件中，当在多个陶瓷层彼此堆叠的方向上观察时，当从堆叠多个陶瓷层的方向观察时，设置第一内部电极和第二内部电极两者的陶瓷体的区域被定义为非有效层区域，虚设引线导体布置在非有效层区域中，以便导致陶瓷体的多个部分上的至少两个位置并且电连接到第二外部电极。当导电介质与虚拟导通导体的多个暴露边缘中的一个接触时，电流也被施加到其它暴露边缘。

4. 发明申请

US20120320495A1 LAMINATED CERAMIC ELECTRONIC COMPONENT 有权
标题翻译：层压陶瓷电子元件
公开(公告)号：US20120320495A1
公开(公告)日：2012-12-20
申请号：US13494042
申请日：2012-06-12
申请人： Teppei AKAZAWA , Kenjiro HADANO , Masahiro SAKURATANI
发明人： Teppei AKAZAWA , Kenjiro HADANO , Masahiro SAKURATANI
IPC分类号： H01G4/12
CPC分类号： H01G4/005 , H01G4/12 , H01G4/232 , H01G4/30
摘要： A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.
摘要翻译：层叠陶瓷电子部件包括设置在陶瓷元件组件的外表面中的弯曲表面部分和设置在陶瓷元件组件内的内部导体，其暴露在弯曲表面部分和主表面中以限定电镀沉积的起始点。在由镀膜限定的外部导体中的基底层被布置成直接覆盖内部导体的暴露部分。

5. 发明申请

US20080128860A1 MONOLITHIC ELECTRONIC COMPONENT 有权
标题翻译：单电子元件
公开(公告)号：US20080128860A1
公开(公告)日：2008-06-05
申请号：US12029613
申请日：2008-02-12
申请人： Takashi SAWADA , Kenjiro HADANO
发明人： Takashi SAWADA , Kenjiro HADANO
IPC分类号： H01L29/00
CPC分类号： H01G4/30 , H01G4/232 , H01G4/2325
摘要： In a monolithic electronic component in which a resistive element is incorporated by forming a resistor film on a terminal electrode, a plating film can be formed on the terminal electrode having the resistor film via electroplating in an efficient manner and with a uniform film thickness. In order to form the terminal electrode, the resistor film is disposed directly on the surface of the component body, and a conductive resin film having a relatively low volume resistivity is disposed over the resistor film. The conductive resin film is preferably adapted to have a specific resistance of less than about 1×10−4 Ω·m, on which a plating film having a uniform film thickness can be formed efficiently via electroplating.
摘要翻译：在通过在端子电极上形成电阻膜而并入电阻元件的单片电子部件中，可以通过电镀以具有均匀膜厚度的电镀形成具有电阻膜的端子电极上的电镀膜。为了形成端子电极，电阻膜直接配置在组件体的表面上，并且具有较低体积电阻率的导电树脂膜设置在电阻膜上。导电树脂膜优选地具有小于约1×10 -4Ω的电阻率，其上可以通过电镀有效地形成具有均匀膜厚的镀膜。

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