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1. 发明授权

US07913015B2 Implantable medical device bus system and method 有权
标题翻译：植入式医疗器械总线系统及方法
公开(公告)号：US07913015B2
公开(公告)日：2011-03-22
申请号：US12366946
申请日：2009-02-06
申请人： Todd A. Kallmyer , Kevin K. Walsh , Javaid Masoud , Xander Evers , John C. Stroebel , James Ericksen , Mark A. Stockburger , Paul J. Huelskamp
发明人： Todd A. Kallmyer , Kevin K. Walsh , Javaid Masoud , Xander Evers , John C. Stroebel , James Ericksen , Mark A. Stockburger , Paul J. Huelskamp
IPC分类号： G06F13/36
CPC分类号： G06F13/14 , A61N1/372
摘要： A bus system is provided for implantable medical devices. The bus system provides for flexible and reliable communication between subsystems in an implantable medical device. The bus system facilitates a wide variety of communications between various subsystems. These various subsystems can include one or more sensing devices, processors, data storage devices, patient alert devices, power management devices, signal processing and other devices implemented to perform a variety of different functions.
摘要翻译：为可植入医疗设备提供总线系统。总线系统提供可植入医疗设备中的子系统之间的灵活和可靠的通信。总线系统有助于各种子系统之间的各种通信。这些各种子系统可以包括一个或多个感测设备，处理器，数据存储设备，患者警报设备，电力管理设备，信号处理以及执行各种不同功能的其他设备。

2. 发明申请

US20090204168A1 IMPLANTABLE MEDICAL DEVICE BUS SYSTEM AND METHOD 有权
标题翻译：可植入医疗设备总线系统和方法
公开(公告)号：US20090204168A1
公开(公告)日：2009-08-13
申请号：US12366946
申请日：2009-02-06
申请人： Todd A. Kallmyer , Kevin K. Walsh , Javaid Masoud , Xander Evers , John C. Stroebel , James H. Ericksen , Mark A. Stockburger , Paul J. Huelskamp
发明人： Todd A. Kallmyer , Kevin K. Walsh , Javaid Masoud , Xander Evers , John C. Stroebel , James H. Ericksen , Mark A. Stockburger , Paul J. Huelskamp
IPC分类号： A61N1/37
CPC分类号： G06F13/14 , A61N1/372
摘要： A bus system is provided for implantable medical devices. The bus system provides for flexible and reliable communication between subsystems in an implantable medical device. The bus system facilitates a wide variety of communications between various subsystems. These various subsystems can include one or more sensing devices, processors, data storage devices, patient alert devices, power management devices, signal processing and other devices implemented to perform a variety of different functions.
摘要翻译：为可植入医疗设备提供总线系统。总线系统提供可植入医疗设备中的子系统之间的灵活和可靠的通信。总线系统有助于各种子系统之间的各种通信。这些各种子系统可以包括一个或多个感测设备，处理器，数据存储设备，患者警报设备，电力管理设备，信号处理以及执行各种不同功能的其他设备。

3. 发明授权

US06456875B1 Cyclic redundancy calculation circuitry for use in medical devices and methods regarding same 有权
标题翻译：用于医疗器械的循环冗余计算电路及其相关方法
公开(公告)号：US06456875B1
公开(公告)日：2002-09-24
申请号：US09416667
申请日：1999-10-12
申请人： Jeffrey D. Wilkinson , Kevin K. Walsh , Robert W. Hocken
发明人： Jeffrey D. Wilkinson , Kevin K. Walsh , Robert W. Hocken
IPC分类号： H03M1309
CPC分类号： H03M13/091
摘要： Cyclic redundancy calculations are provided by operating on a data stream, e.g., a data stream in an implantable medical device, to perform a polynomial division thereon using one of a first cyclic redundancy code generator polynomial and a second cyclic redundancy code generator polynomial. The first cyclic redundancy code generator polynomial is a higher order polynomial than the second cyclic redundancy code generator polynomial and contains all terms of the second cyclic redundancy code generator polynomial. The polynomial division may be implemented using linear feedback shift register circuitry and circuitry to select between the use of the first or second cyclic redundancy code generator polynomial.
摘要翻译：通过对数据流（例如可植入医疗装置中的数据流）进行操作，使用第一循环冗余码生成多项式和第二循环冗余码生成多项式之一对其执行多项式除法来提供循环冗余计算。第一循环冗余码生成多项式是比第二循环冗余码生成多项式更高阶的多项式，并且包含第二循环冗余码生成多项式的所有项。可以使用线性反馈移位寄存器电路和电路来实现多项式除法，以在使用第一或第二循环冗余码生成多项式之间进行选择。

4. 发明授权

US06237105B1 Signal processor with intelligent feedback to ensure functionality of microprocessor and state machine based programmable pulse generators in the presence of clock and power supply disturbances 失效
标题翻译：具有智能反馈的信号处理器，以确保在存在时钟和电源干扰的情况下，微处理器和基于状态机的可编程脉冲发生器的功能
公开(公告)号：US06237105B1
公开(公告)日：2001-05-22
申请号：US08054496
申请日：1993-04-26
申请人： Kevin K. Walsh , Roman Korsunsky , James D. Reinke
发明人： Kevin K. Walsh , Roman Korsunsky , James D. Reinke
IPC分类号： G06F104
CPC分类号： A61N1/025 , G06F1/04
摘要： A signal processor operates on a microprocessor or state machine based system to ensure that the central processing unit (CPU) and pulse generator (PG) have finished their instructions before allowing a new transition on the system master clock. The CPU and PG contain circuitry which allows them to indicate when they are busy. These signals are fed to the signal processor to indicate when the CPU and PG are ready to start another instruction. The signal processor functions to prevent a noise glitch on the system clock from causing another operation to start before the one in process has finished. The output of the signal processor becomes the master clock signal used by the system.
摘要翻译：信号处理器在基于微处理器或基于状态机的系统上操作，以确保中央处理单元（CPU）和脉冲发生器（PG）在允许在系统主时钟之间的新的转换之前完成其指令。 CPU和PG包含允许他们在忙时指示的电路。这些信号被馈送到信号处理器，以指示CPU和PG何时准备启动另一个指令。信号处理器的作用是防止在系统时钟之间的噪声干扰导致另一个操作在一个进程完成之前启动。信号处理器的输出变为系统使用的主时钟信号。

5. 发明授权

US08482964B2 Robust SRAM memory cell capacitor plate voltage generator 有权
标题翻译：坚固的SRAM存储单元电容板电压发生器
公开(公告)号：US08482964B2
公开(公告)日：2013-07-09
申请号：US12645039
申请日：2009-12-22
申请人： Kevin K. Walsh , Paul F. Gerrish , Larry E. Tyler , Mark A. Lysinger , David C. McClure , Francois Jacquet
发明人： Kevin K. Walsh , Paul F. Gerrish , Larry E. Tyler , Mark A. Lysinger , David C. McClure , Francois Jacquet
IPC分类号： G11C11/00
CPC分类号： G11C5/14 , G11C5/147 , G11C11/417
摘要： An SRAM having two capacitors connected in series between respective bit storage nodes of each memory cell. The two inverters of the memory cell are powered by a positive voltage and a low voltage. The two capacitors are connected to each other at a common node. A leakage current generator is coupled to the common node. The leakage current generator supplies to the common node a leakage current to maintain a voltage which is approximately halfway between the voltages of the high and low SRAM supplies.
摘要翻译：具有串联连接在每个存储单元的相应位存储节点之间的两个电容器的SRAM。存储单元的两个反相器由正电压和低电压供电。两个电容器在公共节点处彼此连接。泄漏电流发生器耦合到公共节点。泄漏电流发生器向公共节点提供泄漏电流，以保持大约在高和低SRAM电源的电压之间的一半的电压。

6. 发明申请

US20100165709A1 ROBUST SRAM MEMORY CELL CAPACITOR PLATE VOLTAGE GENERATOR 有权
标题翻译：稳定的SRAM存储单元电容板电压发生器
公开(公告)号：US20100165709A1
公开(公告)日：2010-07-01
申请号：US12645039
申请日：2009-12-22
申请人： Kevin K. Walsh , Paul F. Gerrish , Larry E. Tyler , Mark A. Lysinger , David C. McClure , Francois Jacquet
发明人： Kevin K. Walsh , Paul F. Gerrish , Larry E. Tyler , Mark A. Lysinger , David C. McClure , Francois Jacquet
IPC分类号： G11C11/00 , G11C5/14
CPC分类号： G11C5/14 , G11C5/147 , G11C11/417
摘要： An SRAM having two capacitors connected in series between respective bit storage nodes of each memory cell. The two inverters of the memory cell are powered by a positive voltage and a low voltage. The two capacitors are connected to each other at a common node. A leakage current generator is coupled to the common node. The leakage current generator supplies to the common node a leakage current to maintain a voltage which is approximately halfway between the voltages of the high and low SRAM supplies.
摘要翻译：具有串联连接在每个存储单元的相应位存储节点之间的两个电容器的SRAM。存储单元的两个反相器由正电压和低电压供电。两个电容器在公共节点处彼此连接。泄漏电流发生器耦合到公共节点。泄漏电流发生器向公共节点提供泄漏电流，以保持大约在高和低SRAM电源的电压之间的一半的电压。

7. 发明授权

US06286346B1 Interruptable multiply and/or divide operations for use with an interrupt in a medical device processor 失效
标题翻译：用于医疗设备处理器中断的可中断乘法和/或除法操作
公开(公告)号：US06286346B1
公开(公告)日：2001-09-11
申请号：US09070407
申请日：1998-04-30
申请人： Robert W. Hocken, Jr. , Kevin K. Walsh , Jeffrey D. Wilkinson
发明人： Robert W. Hocken, Jr. , Kevin K. Walsh , Jeffrey D. Wilkinson
IPC分类号： G06F9302
CPC分类号： G06F9/3861 , G06F9/3001 , G06F9/30094 , G06F9/3842 , G16H40/63 , Y10T70/5991
摘要： A method and apparatus including conditional add and conditional add/subtract instructions are provided for use in the instruction set of a medical device instruction processor. More specifically, the conditional add and add/subtract instructions are provided to add two operands if a predetermined condition is satisfied within the instruction processor hardware. Additionally, the conditional add/subtract instruction may be used to subtract one operand from another operand if the predetermined condition is not satisfied. These instructions are adapted for use in implementing an efficient, interruptible, firmware-controlled multiplication or division mechanism. The inventive system allows multiplication or division operations to be interrupted at various intermediate points during the multiplication or division operation to thereby reducing interrupt latency.
摘要翻译：提供了一种包括条件加法和条件加法/减法指令的方法和装置，用于医疗器械指令处理器的指令集。更具体地，如果在指令处理器硬件内满足预定条件，则提供条件加法和减法指令以添加两个操作数。此外，如果不满足预定条件，则可以使用条件加法/减法指令从另一个操作数中减去一个操作数。这些指令适用于实现高效，可中断的固件控制的乘法或除法机制。本发明的系统允许在乘法或除法操作期间在各个中间点中断乘法或除法运算，从而减少中断等待时间。

8. 发明授权

US06200265B1 Peripheral memory patch and access method for use with an implantable medical device 有权
标题翻译：用于可植入医疗器械的外围存储器补片和存取方法
公开(公告)号：US06200265B1
公开(公告)日：2001-03-13
申请号：US09293699
申请日：1999-04-16
申请人： Kevin K. Walsh , David L. Thompson
发明人： Kevin K. Walsh , David L. Thompson
IPC分类号： A61B500
CPC分类号： A61N1/37235 , A61B5/0031 , A61B5/7455 , A61M5/14276 , A61M2205/3507 , G06F19/00 , Y10S128/903
摘要： A peripheral memory patch apparatus for attachment to a patient's skin includes a high capacity memory for storing physiologic data uplinked from an implantable medical device. A resilient substrate provides support for a memory, microprocessor, receiver, and other electronic components. The substrate flexes in a complimentary manner in response to a patient's body movements. The substrate is affixed to the patient's skin with the use of an adhesive which provides for comfort and wearability. The low profile peripheral patch apparatus is preferably similar in size and shape to a standard bandage, and may be attached to the patient's skin in an inconspicuous location. A status indicator provides for a visual, verbal, or tactile indication of the operational status of the peripheral memory patch. Uplinking of physiologic telemetry data from the internal memory of an implantable medical device to the peripheral memory patch is initiated in response to a transfer signal produced by the peripheral memory patch. The transfer signal may be generated by the implantable medical device or upon actuation of a switch by the patient. Various telemetry techniques including radio frequency, acoustic, and body bus telemetry techniques, may be employed to transfer information between the implantable medical device and the peripheral memory patch.
摘要翻译：用于附接到患者皮肤的外围存储器贴片装置包括用于存储从可植入医疗装置上行链接的生理数据的高容量存储器。弹性基板为存储器，微处理器，接收器和其他电子部件提供支持。衬底以互补的方式响应于患者的身体运动而弯曲。使用提供舒适性和耐磨性的粘合剂将基底固定到患者的皮肤上。优选的外形贴片装置的尺寸和形状优选与标准绷带相似，并且可以在不显眼的位置附接到患者的皮肤上。状态指示器提供对外围存储器补丁的操作状态的视觉，口头或触觉指示。响应于由外围存储器补片产生的传送信号，启动从可植入医疗装置的内部存储器到外围存储器补片的生理遥测数据的上行。转移信号可以由可植入医疗装置产生，也可以由患者致动开关产生。可以使用包括射频，声学和身体总线遥测技术在内的各种遥测技术来在可植入医疗设备和外围存储器补片之间传送信息。

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