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1. 发明授权

US6055489A Temperature measurement and compensation scheme 失效
标题翻译：温度测量和补偿方案
公开(公告)号：US6055489A
公开(公告)日：2000-04-25
申请号：US843327
申请日：1997-04-15
申请人： Timothy S. Beatty , Christopher P. McAllister , Thomas D. Fletcher
发明人： Timothy S. Beatty , Christopher P. McAllister , Thomas D. Fletcher
IPC分类号： G01K3/00 , G01K7/01
CPC分类号： G01K3/005 , G01K7/01
摘要： An integrated circuit includes: a comparator coupled in a configuration to compare two voltages. One of the two voltages includes a semiconductor junction voltage drop. The other of the two voltages includes a voltage signal, X V.sub.t, where V.sub.t is a thermal voltage and X includes a selected signal value, which modulates the thermal voltage. The configuration includes a feedback path to vary X until X V.sub.t approximately equals the voltage including the semiconductor junction voltage drop.
摘要翻译：集成电路包括：比较器，被配置成比较两个电压。两个电压中的一个包括半导体结电压降。两个电压中的另一个包括电压信号X Vt，其中Vt是热电压，X包括调节热电压的选择的信号值。该配置包括用于改变X的反馈路径，直到X Vt近似等于包括半导体结电压降的电压。

2. 发明授权

US06266793B1 JTAG boundary scan cell with enhanced testability feature 有权
标题翻译： JTAG边界扫描单元具有增强的可测性特征
公开(公告)号：US06266793B1
公开(公告)日：2001-07-24
申请号：US09258656
申请日：1999-02-26
申请人： Thomas J. Mozdzen , Orlando Davila , Christopher P. McAllister
发明人： Thomas J. Mozdzen , Orlando Davila , Christopher P. McAllister
IPC分类号： G01R3128
CPC分类号： G01R31/318541
摘要： A boundary scan cell for testing an integrated circuit comprises an output buffer for driving a pad of the integrated circuit, a capture register coupled to the pad through the output buffer, and an input buffer drives a signal present at the pad to a node coupled to core logic of the IC. A first multiplexer is included to have a first input coupled to the node, a second input coupled to data of a previous scan stage, and an output coupled to the capture register. Logic circuitry selectively enables/disables the input and output buffers responsive to first and second control signals such that the I/O buffers can drive the pad and, at the same time, drive the input buffer, the output of which is coupled to the input of the capture register.
摘要翻译：用于测试集成电路的边界扫描单元包括用于驱动集成电路的焊盘的输出缓冲器，通过输出缓冲器耦合到焊盘的捕获寄存器，以及输入缓冲器将存在于焊盘的信号驱动到耦合到 IC的核心逻辑。包括第一多路复用器以具有耦合到节点的第一输入，耦合到先前扫描级的数据的第二输入和耦合到捕获寄存器的输出。逻辑电路根据第一和第二控制信号有选择地启用/禁用输入和输出缓冲器，使得I / O缓冲器可以驱动焊盘，并且同时驱动输入缓冲器，其输出端耦合到输入端的捕获寄存器。

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