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    • 1. 发明申请
    • INTEGRATED CIRCUIT WITH ON-CHIP POWER PROFILING
    • 集成电路与片上电源配置
    • US20160259397A1
    • 2016-09-08
    • US14635607
    • 2015-03-02
    • Tian Yan PuChenbo LiuThuyen LeLars Melzer
    • Tian Yan PuChenbo LiuThuyen LeLars Melzer
    • G06F1/32
    • G06F1/26G06F1/3206G06F11/2273
    • Embodiments include apparatuses, methods, and systems for determining a power consumption of a circuit block in an integrated circuit. The integrated circuit may include first and second power supply networks. In some embodiments, the integrated circuit may include a plurality of instances of a circuit block under test. A first instance of the circuit block may be coupled to the first power supply network during a first test run, and a second instance of the circuit block may be coupled to the second power supply network during a second test run. In other embodiments, a single instance of a circuit block under test may be coupled with the first power supply network during a first test run and coupled with the second power supply network during a second test run. The power consumption of the circuit block may be determined based on the first and second test runs.
    • 实施例包括用于确定集成电路中的电路块的功耗的装置,方法和系统。 集成电路可以包括第一和第二电源网络。 在一些实施例中,集成电路可以包括被测电路块的多个实例。 电路块的第一实例可以在第一测试运行期间耦合到第一电源网络,并且在第二测试运行期间电路块的第二实例可耦合到第二电源网络。 在其他实施例中,被测电路块的单个实例可以在第一测试运行期间与第一电源网络耦合,并且在第二测试运行期间与第二电源网络耦合。 可以基于第一和第二测试运行来确定电路块的功耗。