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1. 发明授权

US07460040B1 High-speed serial interface architecture for a programmable logic device 有权
标题翻译：用于可编程逻辑器件的高速串行接口架构
公开(公告)号：US07460040B1
公开(公告)日：2008-12-02
申请号：US11754670
申请日：2007-05-29
申请人： Thungoc M. Tran , Yu Xu , Kwong-Wen Wei , Sergey Shumarayev
发明人： Thungoc M. Tran , Yu Xu , Kwong-Wen Wei , Sergey Shumarayev
IPC分类号： H03M9/00
CPC分类号： H03M9/00 , H03K5/135 , H03K19/1774 , H03K19/17744
摘要： A high-speed serial interface for a programmable logic device includes a plurality of features to handle the various issues that may arise with data rates over 1 Gbps and particularly over 1.25 Gbps. Those features may include dynamic phase alignment to control clock-data skew, data realignment (e.g., bit slip circuitry) to account for channel-to-channel skew, full-duplex serializer and deserializer, out-of-range frequency support for low frequencies, and a soft-CDR mode.
摘要翻译：用于可编程逻辑器件的高速串行接口包括多个特征，以处理在1Gbps，特别是超过1.25Gbps的数据速率下可能出现的各种问题。这些特征可以包括动态相位对准以控制时钟数据偏移，数据重新对准（例如位移电路）以解决通道间通道偏移，全双工串行器和解串器，超低频率频率支持，和软CDR模式。

2. 发明授权

US07372295B1 Techniques for calibrating on-chip termination impedances 有权
标题翻译：用于校准片上终端阻抗的技术
公开(公告)号：US07372295B1
公开(公告)日：2008-05-13
申请号：US11615579
申请日：2006-12-22
申请人： Kwong-Wen Wei
发明人： Kwong-Wen Wei
IPC分类号： H03K19/003
CPC分类号： H04L25/0278 , H04L25/0272 , H04L25/0292
摘要： A calibration circuit block includes a first resistor network, a second resistor network, and a feedback loop. The first resistor network includes a set of transistors and receives a constant current from a constant current source. The second resistor network receives a tracking current from a tracking current source. The impedance of the second resistor network changes with temperature and process variations on the integrated circuit. The tracking current source compensates for variations in the impedance of the second resistor network that are caused by process and temperature variations to maintain a constant reference voltage at the second resistor network. The feedback loop generates calibration control signals for controlling the conductive states of the transistors in the first resistor network. The feedback loop adjusts the calibration control signals to maintain a constant impedance in the first resistor network.
摘要翻译：校准电路块包括第一电阻器网络，第二电阻器网络和反馈回路。第一电阻网络包括一组晶体管，并从恒定电流源接收恒定电流。第二电阻网络从跟踪电流源接收跟踪电流。第二个电阻网络的阻抗随着集成电路的温度和工艺变化而变化。跟踪电流源补偿由过程和温度变化引起的第二电阻网络的阻抗的变化，以在第二电阻网络处保持恒定的参考电压。反馈回路产生用于控制第一电阻器网络中的晶体管的导通状态的校准控制信号。反馈环路调整校准控制信号，以在第一电阻网络中保持恒定的阻抗。

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