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    • 5. 发明授权
    • Integrated segmented and interdigitated broadside- and edge-coupled transmission lines
    • 集成分段和交叉的宽边和边耦合传输线
    • US06806558B2
    • 2004-10-19
    • US10121066
    • 2002-04-11
    • Thomas R. Apel
    • Thomas R. Apel
    • H01L3900
    • H01P5/10H01L2924/0002H01L2924/00
    • A combination edge- and broadside-coupled transmission line element formed in an integrated circuit chip, using semiconductor processes, in a stack of metal layers separated by dielectric layers. Each of the metal layers includes a number of transmission lines. Interconnects between the transmission lines are formed at predetermined locations, each interconnect electrically connecting together a group of the transmission lines to form a conductor. The efficiency of the coupling between the lines in the different conductor is increased by positioning the lines such that both edge and broadside-coupling is realized. For example, at least one of the transmission lines in one of the conductors is positioned either above or below a transmission line in the other conductor to achieve broadside-coupling and laterally adjacent to another transmission line in the other conductor to achieve edge-coupling. In a preferred embodiment each of the lines in one of the conductors is edge- and broadside-coupled to lines in the other conductor. The transmission line element may contain two, three or more conductors, and each conductor may contain two, three or more transmission lines. The transmission line element can be used, for example, to fabricate various types of balanced and unbalanced transformers.
    • 在由电介质层分离的金属层的堆叠中,使用半导体工艺形成在集成电路芯片中的组合边缘和宽边耦合传输线元件。 每个金属层包括多个传输线。 传输线之间的互连形成在预定位置处,每个互连将一组传输线电连接在一起以形成导体。 通过定位线以使得实现边缘和宽侧耦合两者来增加不同导体中的线之间的耦合效率。 例如,其中一个导体中的至少一根传输线位于另一导体中的传输线的上方或下方,以实现与另一导体中的另一传输线的宽侧耦合并横向相邻以实现边缘耦合。 在优选实施例中,一个导体中的每条线与另一个导体中的线边缘和宽边耦合。 传输线元件可以包含两个,三个或更多个导体,并且每个导体可以包含两个,三个或更多个传输线。 传输线元件可以用于例如制造各种类型的平衡和不平衡变压器。
    • 7. 发明授权
    • Omnidirectional helically arrayed antenna
    • 全向螺旋排列天线
    • US09276310B1
    • 2016-03-01
    • US13341915
    • 2011-12-31
    • Thomas R. Apel
    • Thomas R. Apel
    • H01Q1/36
    • H01Q1/362H01Q1/46H01Q21/10
    • A method and apparatus for an omnidirectional helically arrayed antenna are described. In accordance with at least one embodiment, a horizontally polarized omnidirectional helically arrayed antenna is provided. In accordance with at least one embodiment, an antenna comprises a helical array of coaxial transmission line radiating elements coupled to one another successively by phase changing couplings. In accordance with at least one embodiment, the antenna is configured to provide an omnidirectional radiation pattern and a polarization dominated by a magnetic field vector component parallel to an axis of the helical array and an electric field vector component perpendicular to the axis of the helical array. In accordance with at least one embodiment, an electrical length of each of the coaxial transmission line radiating elements is an odd integer multiple of a half wavelength in the coaxial medium with a pitch in the range of 0.35 wavelength to 0.50 wavelength.
    • 描述了一种全向螺旋排列天线的方法和装置。 根据至少一个实施例,提供水平极化全向螺旋排列的天线。 根据至少一个实施例,天线包括通过相变耦合而相继耦合的同轴传输线辐射元件的螺旋阵列。 根据至少一个实施例,天线被配置为提供全向辐射图案和由平行于螺旋阵列的轴线的磁场矢量分量主导的偏振和垂直于螺旋阵列的轴线的电场矢量分量 。 根据至少一个实施例,每个同轴传输线辐射元件的电长度是在0.35波长至0.50波长范围内的间距的同轴介质中的半波长的奇整数倍。
    • 8. 发明授权
    • Linear power amplifier with multiple output power levels
    • 具有多个输出功率电平的线性功率放大器
    • US07345537B2
    • 2008-03-18
    • US10666552
    • 2003-09-19
    • Thomas R. ApelTarun Juneja
    • Thomas R. ApelTarun Juneja
    • H03G9/00H03G5/16
    • H03F1/0261H03F1/0244H03F1/0277H03F1/302H03F2203/21178H03F2203/7206H03F2203/7236
    • A power amplifier stage has a first amplifier subsection and a second amplifier subsection coupled in a parallel configuration. The first amplifier subsection receives a signal to be amplified and the second amplifier subsection receives the signal to be amplified via a first delay line. The amplified output signal of the first amplifier subsection is passed through a second impedance inverter and is combined with the amplified output signal from the second amplifier subsection. In a low power mode, the first amplifier subsection operates as a linear amplifier and the second subsection is biased off. In a high power mode, both the first and second amplifier subsections operate as linear amplifiers. Selecting the impedances of the second delay element and the first amplifier to be equal is essential for high power mode operation and greatly improves the amplifier efficiency in the low power mode.
    • 功率放大器级具有以并联结构耦合的第一放大器子部分和第二放大器部分。 第一放大器部分接收要被放大的信号,并且第二放大器部分经由第一延迟线接收待放大的信号。 第一放大器子部分的放大的输出信号通过第二阻抗反相器并与来自第二放大器子部分的放大的输出信号组合。 在低功率模式下,第一放大器部分作为线性放大器工作,第二部分被偏置掉。 在高功率模式下,第一和第二放大器子部分都作为线性放大器工作。 选择第二延迟元件和第一放大器相等的阻抗对于高功率模式操作是必需的,并且极大地提高了低功率模式下的放大器效率。
    • 9. 发明授权
    • Bias circuit with mode control and compensation for voltage and temperature
    • 具有模式控制和电压和温度补偿的偏置电路
    • US07224230B2
    • 2007-05-29
    • US11065208
    • 2005-02-22
    • Thomas R. ApelRebouh Benelbar
    • Thomas R. ApelRebouh Benelbar
    • H03F3/04
    • H03F3/04H03F1/301H03F3/345H03F2200/447
    • An amplifier bias system. The amplifier bias system includes a battery voltage supply coupled with an amplifier transistor to be biased; an output node coupled with a gate of the amplifier transistor; and a current source coupled with the battery voltage supply, wherein the current source provides a current to a node in response to the battery voltage supply. The amplifier bias system further includes a first transistor coupled between the battery voltage supply and the output node, the first transistor having a gate coupled with the first node; a second transistor coupled with the first node, the second transistor having a gate coupled with the output node; and a current load coupled with the output node.
    • 放大器偏置系统。 放大器偏置系统包括与待偏置的放大器晶体管耦合的电池电压源; 与放大器晶体管的栅极耦合的输出节点; 以及与电池电压源耦合的电流源,其中电流源响应于电池电压供应而向节点提供电流。 所述放大器偏置系统还包括耦合在所述电池电压源和所述输出节点之间的第一晶体管,所述第一晶体管具有与所述第一节点耦合的栅极; 与所述第一节点耦合的第二晶体管,所述第二晶体管具有与所述输出节点耦合的栅极; 以及与输出节点耦合的电流负载。