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1. 发明授权

US5392292A Configurable spare memory chips 失效
标题翻译：可配置的备用内存芯片
公开(公告)号：US5392292A
公开(公告)日：1995-02-21
申请号：US149967
申请日：1993-11-10
申请人： Thomas J. Davis , Michael T. Bye , Richard D. Pribnow , Bricky A. Stephenson
发明人： Thomas J. Davis , Michael T. Bye , Richard D. Pribnow , Bricky A. Stephenson
IPC分类号： G11C29/00 , G06F11/20
CPC分类号： G11C29/848 , G11C29/832
摘要： A memory reconfiguration system dynamically configures spare chips into memory during system operation by shifting data around defective chips. The shifting of data around an entire memory chip allows the system to correct bit, addressing, and control errors or faults within the chip. When the system detects an error, or otherwise initiates a memory reconfiguration, it transmits a configuration code to shift registers for a memory write driver. The shift registers, in response to the configuration code, shift write data so that the data is effectively shifted around a particular memory chip and into a spare memory chip. The system selectively transmits the configuration code to shift registers for a memory read driver. Therefore, the system independently shifts data written to the memory inputs and data read from the memory outputs.
摘要翻译：存储器重新配置系统通过在缺陷芯片周围移动数据来在系统操作期间将备用芯片动态地配置到存储器中。数据在整个存储器芯片周围的移位允许系统校正位，寻址和控制芯片内的错误或故障。当系统检测到错误或以其他方式启动存储器重新配置时，它将配置代码发送到存储器写入驱动器的移位寄存器。移位寄存器响应于配置代码移位写入数据，使得数据被有效地围绕特定存储器芯片移位到备用存储器芯片中。系统选择性地将配置代码发送到用于存储器读取驱动器的移位寄存器。因此，系统独立地将写入存储器输入的数据和从存储器输出读取的数据进行移位。

2. 发明授权

US06256677B1 Message buffering for a computer-based network 失效
标题翻译：基于计算机的网络的消息缓冲
公开(公告)号：US06256677B1
公开(公告)日：2001-07-03
申请号：US08991233
申请日：1997-12-16
申请人： Richard D. Pribnow , Michael T. Bye , James G. Bravatto , John Theodore Kline
发明人： Richard D. Pribnow , Michael T. Bye , James G. Bravatto , John Theodore Kline
IPC分类号： G06F1324
CPC分类号： H04L47/10 , H04L12/42
摘要： A ring computer network system having a communication controller for controller the receipt and sending of packets or messages at each client computer. The interface associated with each client computer includes a send message buffer and a receive message buffer. The send message buffer has a send message buffer counter which increments upwardly in response to messages being received from the client computer for sending on the ring network. The communication controller sends messages from the send buffer until the send message buffer counter reaches the address or a value associated with the last received message. Similarly, the receive message buffer includes a receive message buffer counter which increments as each message is received to a receive message buffer counter value. The receive message buffer is emptied until the receive message buffer counter value is reached. The receive buffer can also have a foreground portion and a background portion. The send buffer can also have a background portion and a foreground portion of memory. The communication controller continually switches between the foreground and background portions of memory and redesignates each memory portion after the switch. The communications controller can also recognize priority schemes for the messages.
摘要翻译：一种环形计算机网络系统，具有通信控制器，用于控制在每个客户计算机处接收和发送分组或消息。与每个客户端计算机相关联的接口包括发送消息缓冲器和接收消息缓冲器。发送消息缓冲器具有响应于从客户端计算机接收的消息向上增加的发送消息缓冲器计数器，用于在环形网络上发送。通信控制器从发送缓冲器发送消息，直到发送消息缓冲区计数器到达地址或与最后接收到的消息相关联的值。类似地，接收消息缓冲器包括接收消息缓冲器计数器，其随着每个消息被接收到接收消息缓冲器计数器值而递增。接收消息缓冲区被清空，直到达到接收消息缓冲区计数器值。接收缓冲器还可以具有前景部分和背景部分。发送缓冲器还可以具有背景部分和存储器的前景部分。通信控制器在存储器的前景和背景部分之间连续地切换，并且在切换之后重新指定每个存储器部分。通信控制器还可以识别消息的优先级方案。

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