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1. 发明授权

US4772966A Synchronization method and apparatus 失效
标题翻译：同步方法和装置
公开(公告)号：US4772966A
公开(公告)日：1988-09-20
申请号：US657948
申请日：1984-10-05
申请人： Thomas D. Sharples , Michael L. Collette , Kelly Quan , George Wong
发明人： Thomas D. Sharples , Michael L. Collette , Kelly Quan , George Wong
IPC分类号： G11B15/18 , G11B15/467 , G11B27/00 , G11B27/024 , G11B27/028 , G11B27/10 , G11B27/32 , G11B27/34 , G11B27/36 , H04N9/797 , G11B , G11B15/46
CPC分类号： H04N9/7976 , G11B15/1808 , G11B15/4675 , G11B27/002 , G11B27/028 , G11B27/10 , G11B27/323 , G11B27/34 , G11B27/36 , G11B2220/90 , G11B27/024
摘要： A synchronizer for synchronizing a slave tape recorder to a master tape recorder. When the speed of the master recorder exceeds 2.5 times the nominal play speed, the synchronizer causes the slave recorder to lag behind the master recorder by an amount related to the speed of the slave recorder. At lower speeds, the synchronizer causes the slave recorder to lock onto the position and speed of the master recorder. The synchronizer employs time-code readers to read time-code on address tracks on the master and slave recorders. The time-code readers produce not only time-code but also clock pulses which are employed to determine the speed of master and slave with high resolution. Both the time-code readers and a resolver employed in the synchronizer are constructed from gate assemblies rather than processors to reduce execution times for the processor in the synchronizer. The resolver is a digital resolver which includes a phase comparator which produces pulses having a width related to the phase difference between indications of the synchronization word in the time-code and polarity to indicate whether the master leads or lags the slave. This signal is applied to a counter which generates a digital error signal based on the phase difference which is employed to control the speed of the slave recorder.
摘要翻译：用于将从属磁带录音机同步到主磁带录音机的同步器。当主记录仪的速度超过标称播放速度的2.5倍时，同步器会使从属录像机落后于主记录仪，与从机速度相关。在较低的速度下，同步器使从机记录器锁定到主记录仪的位置和速度。同步器采用时间码读取器来读取主和从记录器上的地址轨道上的时间码。时间码读取器不仅产生时间码，而且产生用于确定具有高分辨率的主机和从机速度的时钟脉冲。同步器中使用的时间码读取器和解析器都是由门组件而不是处理器构成的，以减少同步器中处理器的执行时间。解算器是数字解析器，其包括相位比较器，其产生具有与时间码中的同步字的指示之间的相位差相关的宽度的脉冲和极性，以指示主器件是引线还是滞后从器件。该信号被施加到计数器，该计数器基于用于控制从记录器的速度的相位差产生数字误差信号。

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