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1. 发明授权

US07787279B2 Integrated circuit having a resistive memory 有权
标题翻译：具有电阻存储器的集成电路
公开(公告)号：US07787279B2
公开(公告)日：2010-08-31
申请号：US11441805
申请日：2006-05-26
申请人： Thomas D. Happ , Cay-Uwe Pinnow , Ralf Symanczyk , Klaus-Dieter Ufert
发明人： Thomas D. Happ , Cay-Uwe Pinnow , Ralf Symanczyk , Klaus-Dieter Ufert
IPC分类号： G11C11/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/1666
摘要： An integrated semiconductor memory includes a storage medium (6) arranged between two electrodes (10, 20), which storage medium may be a phase change medium, for example. The storage medium (6) can be put into a first state or a second state by means of an electric current, as a result of which an item of information can be stored. According to embodiments of the invention, a layer plane (L) is provided in which impurity particles made from a material (4) are embedded, as a result of which the current density in the storage medium is locally increased and the programming current required for reprogramming is reduced. As a result, the current consumption of memory elements containing a phase change medium is reduced, so that for the first time they can be embodied with minimal feature size, together with other components such as transistors, and integrated into a single semiconductor circuit and no longer have to be arranged in separate subcircuits.
摘要翻译：集成半导体存储器包括布置在两个电极（10,20）之间的存储介质（6），该存储介质可以是例如相变介质。存储介质（6）可以通过电流进入第一状态或第二状态，结果可以存储信息项。根据本发明的实施例，提供了一种层状平面（L），其中嵌入由材料（4）制成的杂质颗粒，结果存储介质中的电流密度局部增加，并且需要编程电流重编程减少。结果，包含相变介质的存储元件的电流消耗减少，使得它们可以首次以最小的特征尺寸与其他元件（例如晶体管）一体化，并且集成到单个半导体电路中，并且不存在更长的时间必须在单独的子电路中排列。

2. 发明授权

US07215564B2 Semiconductor memory component in cross-point architecture 失效
标题翻译：交叉点架构中的半导体存储器组件
公开(公告)号：US07215564B2
公开(公告)日：2007-05-08
申请号：US11115953
申请日：2005-04-27
申请人： Thomas D. Happ , Ralf Symanczyk
发明人： Thomas D. Happ , Ralf Symanczyk
IPC分类号： G11C17/06
CPC分类号： G11C13/0011 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/1641 , H01L45/1683
摘要： A programmable metallization memory cell with a storage region (3) formed from a chalcogenide glass and an electrode (4) which is preferably silver is located at the crossing point of a respective bit line (1) and a respective word line (2). There is a pn junction between the bit lines (1) and the chalcogenide glass.
摘要翻译：具有由硫族化物玻璃形成的存储区域（3）和优选为银的电极（4）的可编程金属化存储单元位于相应位线（1）和相应字线（2）的交叉点处。位线（1）和硫族化物玻璃之间有一个pn结。

3. 发明授权

US07337282B2 Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component 有权
标题翻译：用于控制存储器组件以在同一存储器组件上实现不同种类的存储器特性的存储器系统和过程
公开(公告)号：US07337282B2
公开(公告)日：2008-02-26
申请号：US10722576
申请日：2003-11-28
申请人： Thomas D. Happ , Michael Kund , Ralf Symanczyk
发明人： Thomas D. Happ , Michael Kund , Ralf Symanczyk
IPC分类号： G06F12/00
CPC分类号： G06F13/1694 , G11C7/1045 , G11C11/005 , G11C14/00
摘要： According to the invention, a memory system, and a process for controlling a memory component, to achieve different kinds of memory characteristics on one and the same memory component, is provided, the process comprising the steps: Sending out a signal to select one of several possible modes for the memory component; and Operating the memory component in accordance with the specific mode selected by the signal.
摘要翻译：根据本发明，提供了存储器系统和用于控制存储器组件以在同一存储器组件上实现不同种类的存储器特性的过程，该过程包括以下步骤：发送信号以选择存储器组件的几种可能的模式; 并根据信号选择的特定模式操作存储器组件。

4. 发明申请

US20120134204A1 CONCENTRIC PHASE CHANGE MEMORY ELEMENT 有权
标题翻译：集中相变记忆元素
公开(公告)号：US20120134204A1
公开(公告)日：2012-05-31
申请号：US13364727
申请日：2012-02-02
申请人： Thomas D. Happ , Alejandro G. Schrott
发明人： Thomas D. Happ , Alejandro G. Schrott
IPC分类号： G11C11/00 , H01L21/06
CPC分类号： G11C13/0004 , G11C11/5678 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/165 , H01L45/1675 , H01L45/1683
摘要： The present invention in one embodiment provides a memory device including a first electrode; a second electrode; and a memory cell positioned between the first electrode and the second electrode, the memory cell including a core of a first phase change material and a cladding of a second phase change material, wherein the first phase change material has a lower crystallization temperature than the second phase change material. The present invention also provides methods of forming the above described memory device.
摘要翻译：在一个实施例中的本发明提供了一种包括第一电极的存储器件; 第二电极; 以及位于所述第一电极和所述第二电极之间的存储单元，所述存储单元包括第一相变材料的芯和第二相变材料的包层，其中所述第一相变材料具有比所述第二相变材料低的结晶温度相变材料本发明还提供了形成上述存储器件的方法。

5. 发明授权

US08030634B2 Memory array with diode driver and method for fabricating the same 有权
标题翻译：具有二极管驱动器的存储器阵列及其制造方法
公开(公告)号：US08030634B2
公开(公告)日：2011-10-04
申请号：US12060075
申请日：2008-03-31
申请人： Hsiang-Lan Lung , Min Yang , Thomas D. Happ , Bipin Rajendran
发明人： Hsiang-Lan Lung , Min Yang , Thomas D. Happ , Bipin Rajendran
IPC分类号： H01L29/02 , H01L47/00
CPC分类号： H01L27/24
摘要： A memory array with self-centered diode access devices results from a process in which diodes are formed in the fill material, each diode having a lightly-doped first layer of the same conductivity type as the conductive lines; a heavily doped second layer of opposite conductivity type; and a conductive cap. Self-aligned, and self-centered spacers in the self-aligned vias define pores that expose the conductive cap. Memory material is deposited within the pores, the memory material making contact with the conductive cap. A top electrode is formed in contact with the memory material.
摘要翻译：具有自中心二极管接入装置的存储器阵列是由填充材料中形成二极管的过程产生的，每个二极管具有与导电线相同导电类型的轻掺杂第一层; 相反导电类型的重掺杂第二层; 和导电帽。自对准和自对准的自对准通孔中的间隔物限定暴露导电盖的孔。记忆材料沉积在孔内，记忆材料与导电帽接触。形成与记忆材料接触的顶部电极。

6. 发明授权

US09111609B2 Concentric phase change memory element 有权
标题翻译：同心相变存储元件
公开(公告)号：US09111609B2
公开(公告)日：2015-08-18
申请号：US13364727
申请日：2012-02-02
申请人： Thomas D. Happ , Alejandro G. Schrott
发明人： Thomas D. Happ , Alejandro G. Schrott
IPC分类号： H01L21/00 , G11C13/00 , H01L45/00 , G11C11/56
CPC分类号： G11C13/0004 , G11C11/5678 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/165 , H01L45/1675 , H01L45/1683
摘要： The present invention in one embodiment provides a memory device including a first electrode; a second electrode; and a memory cell positioned between the first electrode and the second electrode, the memory cell including a core of a first phase change material and a cladding of a second phase change material, wherein the first phase change material has a lower crystallization temperature than the second phase change material. The present invention also provides methods of forming the above described memory device.
摘要翻译：本发明在一个实施例中提供了一种包括第一电极的存储器件; 第二电极; 以及位于所述第一电极和所述第二电极之间的存储单元，所述存储单元包括第一相变材料的芯和第二相变材料的包层，其中所述第一相变材料具有比所述第二相变材料低的结晶温度相变材料本发明还提供了形成上述存储器件的方法。

7. 发明授权

US08138028B2 Method for manufacturing a phase change memory device with pillar bottom electrode 有权
标题翻译：具有柱底电极的相变存储器件的制造方法
公开(公告)号：US08138028B2
公开(公告)日：2012-03-20
申请号：US11764678
申请日：2007-06-18
申请人： Hsiang Lan Lung , Chieh Fang Chen , Yi Chou Chen , Shih Hung Chen , Chung Hon Lam , Eric Andrew Joseph , Alejandro Gabriel Schrott , Matthew J. Breitwisch , Geoffrey William Burr , Thomas D. Happ , Jan Boris Philipp
发明人： Hsiang Lan Lung , Chieh Fang Chen , Yi Chou Chen , Shih Hung Chen , Chung Hon Lam , Eric Andrew Joseph , Alejandro Gabriel Schrott , Matthew J. Breitwisch , Geoffrey William Burr , Thomas D. Happ , Jan Boris Philipp
IPC分类号： H01L45/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/14 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A method for manufacturing a mushroom-cell type phase change memory is based upon manufacturing a pillar of bottom electrode material upon a substrate including an array of conductive contacts in electrical communication with access circuitry. A layer of electrode material is deposited making reliable electrical contact with the array of conductive contacts. Electrode material is etched to form a pattern of electrode pillars on corresponding conductive contacts. Next, a dielectric material is deposited over the pattern and planarized to provide an electrode surface exposing top surfaces of the electrode pillars. Next, a layer of programmable resistive material, such as a chalcogenide or other phase change material, is deposited, followed by deposition of a layer of a top electrode material. A device including bottom electrode pillars with larger bottom surfaces than top surfaces is described.
摘要翻译：用于制造蘑菇细胞型相变存储器的方法是基于在包括与接入电路电连通的导电触点阵列的基板上制造底部电极材料的柱。沉积一层电极材料，使其与导电触点阵列可靠地电接触。蚀刻电极材料以在对应的导电触点上形成电极柱的图案。接下来，将介电材料沉积在图案上并且被平坦化以提供暴露电极柱顶表面的电极表面。接下来，沉积诸如硫族化物或其它相变材料的可编程电阻材料层，随后沉积顶层电极材料层。描述了包括具有比顶表面更大的底表面的底部电极柱的装置。

8. 发明申请

US20090315090A1 Isolation Trenches with Conductive Plates 有权
标题翻译：带导电板的隔离沟
公开(公告)号：US20090315090A1
公开(公告)日：2009-12-24
申请号：US12144482
申请日：2008-06-23
申请人： Rolf Weis , Thomas D. Happ
发明人： Rolf Weis , Thomas D. Happ
IPC分类号： H01L29/00 , H01L21/20
CPC分类号： H01L21/76224 , H01L27/2409 , H01L27/2445 , H01L27/2454 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144
摘要： Methods of forming isolation trenches, semiconductor devices, structures thereof, and methods of operating memory arrays are disclosed. In one embodiment, an isolation trench includes a recess disposed in a workpiece. A conductive material is disposed in a lower portion of the channel. An insulating material is disposed in an upper portion of the recess over the conductive material.
摘要翻译：公开了形成隔离沟槽的方法，半导体器件，其结构以及操作存储器阵列的方法。在一个实施例中，隔离沟槽包括设置在工件中的凹部。导电材料设置在通道的下部。绝缘材料设置在导电材料上的凹部的上部。

9. 发明授权

US08124950B2 Concentric phase change memory element 失效
标题翻译：同心相变存储元件
公开(公告)号：US08124950B2
公开(公告)日：2012-02-28
申请号：US12198383
申请日：2008-08-26
申请人： Thomas D. Happ , Alejandro G. Schrott
发明人： Thomas D. Happ , Alejandro G. Schrott
IPC分类号： H01L29/06
CPC分类号： G11C13/0004 , G11C11/5678 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/165 , H01L45/1675 , H01L45/1683
摘要： A memory device including a first electrode; a second electrode; and a memory cell positioned between the first electrode and the second electrode, the memory cell including a core of a first phase change material and a cladding of a second phase change material, wherein the first phase change material has a lower crystallization temperature than the second phase change material.
摘要翻译：一种存储器件，包括第一电极; 第二电极; 以及位于所述第一电极和所述第二电极之间的存储单元，所述存储单元包括第一相变材料的芯和第二相变材料的包层，其中所述第一相变材料具有比所述第二相变材料低的结晶温度相变材料

10. 发明授权

US07825398B2 Memory cell having improved mechanical stability 有权
标题翻译：具有改善的机械稳定性的记忆单元
公开(公告)号：US07825398B2
公开(公告)日：2010-11-02
申请号：US12098556
申请日：2008-04-07
申请人： Thomas D. Happ , Yi-Chou Chen , Jan Boris Philipp , Hsiang-Lan Lung
发明人： Thomas D. Happ , Yi-Chou Chen , Jan Boris Philipp , Hsiang-Lan Lung
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , G11C11/5678 , G11C13/0004 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1273 , H01L45/14 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1675
摘要： Memory cells are described along with methods for manufacturing. A memory cell described herein includes a bottom electrode comprising a base portion and a pillar portion on the base portion, the pillar portion and the base portion having respective outer surfaces and the pillar portion having a width less than that of the base portion. A memory element is on a top surface of the pillar portion of the bottom electrode, and a top electrode is on the memory element. A dielectric spacer contacts the outer surface of the pillar portion, the outer surface of the base portion of the bottom electrode self-aligned with an outer surface of the dielectric spacer.
摘要翻译：描述存储单元以及制造方法。本文所述的存储单元包括底部电极，其包括基部和基部上的柱部，所述柱部和基部具有各自的外表面，并且所述柱部的宽度小于所述基部的宽度。存储元件位于底电极的柱部的顶面上，上电极位于存储元件上。电介质隔离物与柱部分的外表面接触，底电极的基部的外表面与电介质间隔物的外表面自对准。

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