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1. 发明申请

US20120135566A1 Monolithic Integration Of Photonics And Electronics In CMOS Processes 有权
标题翻译： CMOS工艺中光子学与电子学的一体化
公开(公告)号：US20120135566A1
公开(公告)日：2012-05-31
申请号：US13364845
申请日：2012-02-02
申请人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , Guckenberger John , Attila Mekis
发明人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , Guckenberger John , Attila Mekis
IPC分类号： H01L21/50
CPC分类号： H04B10/2575 , H01L21/84 , H01L27/1203 , H04B10/40
摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices with at least a portion of each of the wafers bonded together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
摘要翻译：公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件用于光子和电子器件，其中每个晶片的至少一部分结合在一起其中第一CMOS晶片包括光子器件，并且第二CMOS晶片包括电子器件。电子器件可以利用穿硅通孔耦合到光学器件。可以使用选择性区域生长过程来制造不同的厚度。可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。可以利用选择性背面蚀刻来制造包覆层。可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

2. 发明授权

US09053980B2 Monolithic integration of photonics and electronics in CMOS processes 有权
标题翻译：光电子学与电子学在CMOS工艺中的整体集成
公开(公告)号：US09053980B2
公开(公告)日：2015-06-09
申请号：US13364845
申请日：2012-02-02
申请人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , Guckenberger John , Attila Mekis
发明人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , Guckenberger John , Attila Mekis
IPC分类号： H01L27/12 , H01L21/782 , H01L21/84
CPC分类号： H04B10/2575 , H01L21/84 , H01L27/1203 , H04B10/40
摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices with at least a portion of each of the wafers bonded together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
摘要翻译：公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件用于光子和电子器件，其中每个晶片的至少一部分结合在一起其中第一CMOS晶片包括光子器件，并且第二CMOS晶片包括电子器件。电子器件可以利用穿硅通孔耦合到光学器件。可以使用选择性区域生长过程来制造不同的厚度。可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。可以利用选择性背面蚀刻来制造包覆层。可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

3. 发明申请

US20100059822A1 METHOD AND SYSTEM FOR MONOLITHIC INTEGRATION OF PHOTONICS AND ELECTRONICS IN CMOS PROCESSES 有权
标题翻译： CMOS工艺中光电子和电子单片集成的方法与系统
公开(公告)号：US20100059822A1
公开(公告)日：2010-03-11
申请号：US12554449
申请日：2009-09-04
申请人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
发明人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
IPC分类号： H01L27/12 , H01L21/782
CPC分类号： H04B10/2575 , H01L21/84 , H01L27/1203 , H04B10/40
摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
摘要翻译：公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的单个CMOS晶片上制造光子和电子器件。利用体CMOS工艺和/或利用SOI CMOS工艺的SOI晶片，可以在绝缘体上半导体（SOI）晶片上制造器件。可以使用双重SOI工艺和/或选择性区域生长工艺来制造不同的厚度。可以利用一个或多个氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。可以利用选择性背面蚀刻来制造包覆层。可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。集成在CMOS晶片中的二氧化硅或硅锗可以用作蚀刻停止层。

4. 发明授权

US08895413B2 Monolithic integration of photonics and electronics in CMOS processes 有权
标题翻译：光电子学与电子学在CMOS工艺中的整体集成
公开(公告)号：US08895413B2
公开(公告)日：2014-11-25
申请号：US13364909
申请日：2012-02-02
申请人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
发明人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
IPC分类号： H01L27/12 , H01L21/782 , H01L21/84
CPC分类号： H04B10/2575 , H01L21/84 , H01L27/1203 , H04B10/40
摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices bonded to at least a portion of each of the wafers together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
摘要翻译：公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件，用于光子和电子器件，其结合到每个晶片的至少一部分其中第一CMOS晶片包括光子器件，并且第二CMOS晶片包括电子器件。电子器件可以利用穿硅通孔耦合到光学器件。可以使用选择性区域生长过程来制造不同的厚度。可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。可以利用选择性背面蚀刻来制造包覆层。可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

5. 发明授权

US08877616B2 Method and system for monolithic integration of photonics and electronics in CMOS processes 有权
标题翻译： CMOS工艺中光子学与电子学的单片集成方法与系统
公开(公告)号：US08877616B2
公开(公告)日：2014-11-04
申请号：US12554449
申请日：2009-09-04
申请人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
发明人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
IPC分类号： H01L27/12 , H01L21/782 , H01L21/84
CPC分类号： H04B10/2575 , H01L21/84 , H01L27/1203 , H04B10/40
摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
摘要翻译：公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的单个CMOS晶片上制造光子和电子器件。利用体CMOS工艺和/或利用SOI CMOS工艺的SOI晶片，可以在绝缘体上半导体（SOI）晶片上制造器件。可以使用双重SOI工艺和/或选择性区域生长工艺来制造不同的厚度。可以利用一个或多个氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。可以利用选择性背面蚀刻来制造包覆层。可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。集成在CMOS晶片中的二氧化硅或硅锗可以用作蚀刻停止层。

6. 发明申请

US20120132993A1 Monolithic Integration Of Photonics And Electronics In CMOS Processes 有权
标题翻译： CMOS工艺中光子学与电子学的一体化
公开(公告)号：US20120132993A1
公开(公告)日：2012-05-31
申请号：US13364909
申请日：2012-02-02
申请人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
发明人： Thierry Pinguet , Steffen Gloeckner , Peter De Dobbelaere , Sherif Abdalla , Daniel Kucharski , Gianlorenzo Masini , Kosei Yokoyama , John Guckenberger , Attila Mekis
IPC分类号： H01L27/12 , H01L21/782
CPC分类号： H04B10/2575 , H01L21/84 , H01L27/1203 , H04B10/40
摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices bonded to at least a portion of each of the wafers together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
摘要翻译：公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件，用于光子和电子器件，其结合到每个晶片的至少一部分其中第一CMOS晶片包括光子器件，并且第二CMOS晶片包括电子器件。电子器件可以利用穿硅通孔耦合到光学器件。可以使用选择性区域生长过程来制造不同的厚度。可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。可以利用选择性背面蚀刻来制造包覆层。可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

7. 发明申请

US20130094865A9 METHOD AND SYSTEM FOR OPTOELECTRONICS TRANSCEIVERS INTEGRATED ON A CMOS CHIP 有权
公开(公告)号：US20130094865A9
公开(公告)日：2013-04-18
申请号：US12241961
申请日：2008-09-30
申请人： Thierry Pinguet , Steffen Gloeckner , Sherif Abdalla , Sina Mirsaidi , Peter De Dobbelaere , Lawrence C. Gunn, III
发明人： Thierry Pinguet , Steffen Gloeckner , Sherif Abdalla , Sina Mirsaidi , Peter De Dobbelaere , Lawrence C. Gunn, III
IPC分类号： H04B10/00
CPC分类号： H04B10/25 , G02B6/1228 , G02B6/124 , G02B6/4214 , G02B6/43
摘要： Methods and systems for optoelectronics transceivers integrated on a CMOS chip are disclosed and may include receiving optical signals from optical fibers via grating couplers on a top surface of a CMOS chip, which may include a guard ring. Photodetectors may be integrated in the CMOS chip. A CW optical signal may be received from a laser source via grating couplers, and may be modulated using optical modulators, which may be Mach-Zehnder and/or ring modulators. Circuitry in the CMOS chip may drive the optical modulators. The modulated optical signal may be communicated out of the top surface of the CMOS chip into optical fibers via grating couplers. The received optical signals may be communicated between devices via waveguides. The photodetectors may include germanium waveguide photodiodes, avalanche photodiodes, and/or heterojunction diodes. The CW optical signal may be generated using an edge-emitting and/or a vertical-cavity surface emitting semiconductor laser.

8. 发明授权

US09813152B2 Method and system for optoelectronics transceivers integrated on a CMOS chip 有权
公开(公告)号：US09813152B2
公开(公告)日：2017-11-07
申请号：US12241961
申请日：2008-09-30
申请人： Thierry Pinguet , Steffen Gloeckner , Sherif Abdalla , Sina Mirsaidi , Peter De Dobbelaere , Lawrence C. Gunn, III
发明人： Thierry Pinguet , Steffen Gloeckner , Sherif Abdalla , Sina Mirsaidi , Peter De Dobbelaere , Lawrence C. Gunn, III
IPC分类号： H04B10/25 , G02B6/122 , G02B6/124 , G02B6/43 , G02B6/42
CPC分类号： H04B10/25 , G02B6/1228 , G02B6/124 , G02B6/4214 , G02B6/43
摘要： Methods and systems for optoelectronics transceivers integrated on a CMOS chip are disclosed and may include receiving optical signals from optical fibers via grating couplers on a top surface of a CMOS chip, which may include a guard ring. Photodetectors may be integrated in the CMOS chip. A CW optical signal may be received from a laser source via grating couplers, and may be modulated using optical modulators, which may be Mach-Zehnder and/or ring modulators. Circuitry in the CMOS chip may drive the optical modulators. The modulated optical signal may be communicated out of the top surface of the CMOS chip into optical fibers via grating couplers. The received optical signals may be communicated between devices via waveguides. The photodetectors may include germanium waveguide photodiodes, avalanche photodiodes, and/or heterojunction diodes. The CW optical signal may be generated using an edge-emitting and/or a vertical-cavity surface emitting semiconductor laser.

9. 发明申请

US20090022500A1 METHOD AND SYSTEM FOR OPTOELECTRONICS TRANSCEIVERS INTEGRATED ON A CMOS CHIP 有权
标题翻译：集成在CMOS芯片上的光电收发器的方法和系统
公开(公告)号：US20090022500A1
公开(公告)日：2009-01-22
申请号：US12241961
申请日：2008-09-30
申请人： Thierry Pinguet , Steffen Gloeckner , Sherif Abdalla , Sina Mirsaidi , Peter De Dobbelaere
发明人： Thierry Pinguet , Steffen Gloeckner , Sherif Abdalla , Sina Mirsaidi , Peter De Dobbelaere
IPC分类号： H04B10/00
CPC分类号： H04B10/25 , G02B6/1228 , G02B6/124 , G02B6/4214 , G02B6/43
摘要： Methods and systems for optoelectronics transceivers integrated on a CMOS chip are disclosed and may include receiving optical signals from optical fibers via grating couplers on a top surface of a CMOS chip, which may include a guard ring. Photodetectors may be integrated in the CMOS chip. A CW optical signal may be received from a laser source via grating couplers, and may be modulated using optical modulators, which may be Mach-Zehnder and/or ring modulators. Circuitry in the CMOS chip may drive the optical modulators. The modulated optical signal may be communicated out of the top surface of the CMOS chip into optical fibers via grating couplers. The received optical signals may be communicated between devices via waveguides. The photodetectors may include germanium waveguide photodiodes, avalanche photodiodes, and/or heterojunction diodes. The CW optical signal may be generated using an edge-emitting and/or a vertical-cavity surface emitting semiconductor laser.
摘要翻译：公开了集成在CMOS芯片上的光电收发器的方法和系统，并且可以包括通过可以包括保护环的CMOS芯片的顶表面上的光栅耦合器从光纤接收光信号。光电检测器可以集成在CMOS芯片中。 CW光信号可以经由光栅耦合器从激光源接收，并且可以使用可以是马赫曾德和/或环形调制器的光学调制器进行调制。 CMOS芯片中的电路可以驱动光学调制器。调制的光信号可以通过光栅耦合器从CMOS芯片的顶表面传送到光纤中。所接收的光信号可以经由波导在设备之间传送。光电检测器可以包括锗波导光电二极管，雪崩光电二极管和/或异质结二极管。可以使用边缘发射和/或垂直腔表面发射半导体激光器来产生CW光信号。

10. 发明申请

US20190215079A1 Method And System For Large Silicon Photonic Interposers By Stitching 审中-公开
公开(公告)号：US20190215079A1
公开(公告)日：2019-07-11
申请号：US16353591
申请日：2019-03-14
申请人： Peter De Dobbelaere , Attila Mekis , Gianlorenzo Masini
发明人： Peter De Dobbelaere , Attila Mekis , Gianlorenzo Masini
IPC分类号： H04B10/80 , G02B6/34 , G02B6/122 , G02B6/42 , G02B6/43
CPC分类号： H04B10/801 , G02B6/1228 , G02B6/34 , G02B6/4279 , G02B6/428 , G02B6/4292 , G02B6/43
摘要： Methods and systems for large silicon photonic interposers by stitching are disclosed and may include, in an optical communication system including a silicon photonic interposer, where the interposer includes a plurality of reticle sections: communicating an optical signal between two of the plurality of reticle sections utilizing a waveguide. The waveguide may include a taper region at a boundary between the two reticle sections, the taper region expanding an optical mode of the communicated optical signal prior to the boundary and narrowing the optical mode after the boundary. A continuous wave (CW) optical signal may be received in a first of the reticle sections from an optical source external to the interposer. The CW optical signal may be received in the interposer from an optical source assembly coupled to a grating coupler in the first of the reticle sections in the silicon photonic interposer.

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