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    • 2. 发明申请
    • Yield profile manipulator
    • 产量轮廓机械手
    • US20050229144A1
    • 2005-10-13
    • US10801310
    • 2004-03-16
    • Chandra DesuNima BehkamiBruce WhitefieldDavid AbercrombieDavid Sturtevant
    • Chandra DesuNima BehkamiBruce WhitefieldDavid AbercrombieDavid Sturtevant
    • G06F17/50
    • G06F17/5068
    • A graphical profile map for integrated circuits on a substrate. The graphical profile map includes a depiction of die placement boundaries and shot placement boundaries for the integrated circuits on the substrate. Also included are integrated circuit property information contours, where the contours are not limited to either of the die placement boundaries or the shot placement boundaries. In this manner, three key pieces of information for the integrated circuits are presented, including integrated circuit property information, die placement, and shot placement. Because these three pieces of information are presented in a graphical form, it is much easier to interpret the information. For example, it is much easier to determine which shot and die placements have properties that are at risk, and which shot and die placements have adequate property profiles.
    • 衬底上集成电路的图形配置图。 图形轮廓图包括对基片上的集成电路的管芯放置边界和镜头放置边界的描绘。 还包括集成电路属性信息轮廓,其中轮廓不限于管芯放置边界或射击放置边界中的任何一个。 以这种方式,提供了用于集成电路的三个关键信息,包括集成电路属性信息,管芯放置和射击放置。 因为这三条信息以图形形式呈现,所以解释信息要容易得多。 例如,确定哪些投篮和投篮位置具有处于风险中的属性以及哪些投篮和投篮位置具有足够的财产配置文件将变得更加容易。