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1. 发明授权

US09606563B2 Bandgap reference voltage failure detection 有权
公开(公告)号：US09606563B2
公开(公告)日：2017-03-28
申请号：US14247918
申请日：2014-04-08
申请人： Texas Instruments Deutschland GmbH
发明人： Frank Dornseifer , Matthias Arnold , Johannes Gerber
IPC分类号： G01R31/40 , G05F3/08 , G05F3/30
CPC分类号： G05F3/16 , G01R31/40 , G05F3/08 , G05F3/30 , H03K5/24
摘要： An integrated circuit is provided with a bandgap voltage reference circuit having a bandgap reference voltage output. A bandgap failure detection circuit is coupled to the bandgap reference voltage output. The bandgap failure detection forms a model value of the reference voltage from a first time, compares a present value of the reference voltage at a second time to the model value; and asserts a bandgap fail signal to indicate when the present value is less than the model value by a threshold value. The integrated circuit is reset by the bandgap fail signal. The detection circuit may be operated from a failsafe voltage domain that also allows a critical circuit to complete a pending operation during a reset.

2. 发明申请

US20150286236A1 Bandgap Reference Voltage Failure Detection 有权
标题翻译：带隙参考电压故障检测
公开(公告)号：US20150286236A1
公开(公告)日：2015-10-08
申请号：US14247918
申请日：2014-04-08
申请人： Texas Instruments Deutschland GmbH
发明人： Frank Dornseifer , Matthias Arnold , Johannes Gerber
IPC分类号： G05F3/08
CPC分类号： G05F3/16 , G01R31/40 , G05F3/08 , G05F3/30 , H03K5/24
摘要： An integrated circuit is provided with a bandgap voltage reference circuit having a bandgap reference voltage output. A bandgap failure detection circuit is coupled to the bandgap reference voltage output. The bandgap failure detection forms a model value of the reference voltage from a first time, compares a present value of the reference voltage at a second time to the model value; and asserts a bandgap fail signal to indicate when the present value is less than the model value by a threshold value. The integrated circuit is reset by the bandgap fail signal. The detection circuit may be operated from a failsafe voltage domain that also allows a critical circuit to complete a pending operation during a reset.
摘要翻译：集成电路具有带隙基准电压输出的带隙电压参考电路。带隙故障检测电路耦合到带隙参考电压输出。带隙故障检测从第一次形成参考电压的模型值，将第二时间的参考电压的当前值与模型值进行比较; 并且断言带隙失败信号，以指示当前值小于模型值的阈值阈值。集成电路由带隙失败信号复位。检测电路可以从故障安全电压域操作，该故障安全电压域也允许关键电路在复位期间完成等待操作。

3. 发明申请

US20170147027A1 Bandgap Reference Voltage Failure Detection 审中-公开
公开(公告)号：US20170147027A1
公开(公告)日：2017-05-25
申请号：US15427854
申请日：2017-02-08
申请人： TEXAS INSTRUMENTS DEUTSCHLAND GMBH
发明人： Frank Dornseifer , Matthias Arnold , Johannes Gerber
IPC分类号： G05F3/16 , G01R31/40 , H03K5/24
CPC分类号： G05F3/16 , G01R31/40 , G05F3/08 , G05F3/30 , H03K5/24
摘要： An integrated circuit is provided with a bandgap voltage reference circuit having a bandgap reference voltage output. A bandgap failure detection circuit is coupled to the bandgap reference voltage output. The bandgap failure detection forms a model value of the reference voltage from a first time, compares a present value of the reference voltage at a second time to the model value; and asserts a bandgap fail signal to indicate when the present value is less than the model value by a threshold value. The integrated circuit is reset by the bandgap fail signal. The detection circuit may be operated from a failsafe voltage domain that also allows a critical circuit to complete a pending operation during a reset.

4. 发明授权

US09577630B2 Adaptive system controlled power supply transient filter 有权
标题翻译：自适应系统控制电源瞬态滤波器
公开(公告)号：US09577630B2
公开(公告)日：2017-02-21
申请号：US14317094
申请日：2014-06-27
申请人： TEXAS INSTRUMENTS DEUTSCHLAND GMBH
发明人： Matthias Arnold , Ruediger Kuhn , Johannes Gerber
IPC分类号： G06F1/30 , H03K17/22 , G06F1/32
CPC分类号： H03K17/22 , G06F1/24 , G06F1/26 , G06F1/305 , G06F1/32
摘要： An electronic device that includes a power on reset, a variable power supply filter coupled to the power on reset, and control logic coupled to the power on reset and the variable power supply filter. The control logic is configured to activate the variable power supply filter based on a core domain of the electronic device being active.
摘要翻译：包括上电复位的电子设备，耦合到上电复位的可变电源滤波器，以及耦合到上电复位的控制逻辑和可变电源滤波器。所述控制逻辑被配置为基于所述电子设备的核心域激活所述可变电源滤波器。

5. 发明授权

US09342089B2 Verification of bandgap reference startup 有权
标题翻译：带隙参考启动的验证
公开(公告)号：US09342089B2
公开(公告)日：2016-05-17
申请号：US14262278
申请日：2014-04-25
申请人： Texas Instruments Deutschland GmbH
发明人： Asif Qaiyum , Matthias Arnold , Johannes Gerber
IPC分类号： G05F3/30 , G01R19/165
CPC分类号： G05F3/30 , G01R19/16528
摘要： A bandgap reference (BGR) startup verification circuit includes a current minor for receiving an output current from a bandgap reference (BGR) circuit and generating output currents therefrom. A first verification sub-circuit is coupled to receive a first output current to generate a detection voltage (Vdet) and includes a voltage comparator receiving Vdet and a voltage output of the BGR circuit (VBG) to provide a first verification output. A second verification sub-circuit including a voltage comparator is coupled to receive a second output current and a second reference current and provide a second verification output. A third verification sub-circuit includes a current comparator coupled to receive a third output current and a third reference current and provide a third verification output. A digital state machine has inputs receiving the first, second and third verification output, and circuitry for processing these outputs to determine whether the BGR circuit has properly started.
摘要翻译：带隙参考（BGR）启动验证电路包括用于从带隙基准（BGR）电路接收输出电流并从其产生输出电流的电流辅助电路。第一验证子电路被耦合以接收第一输出电流以产生检测电压（Vdet），并且包括接收Vdet的电压比较器和BGR电路（VBG）的电压输出以提供第一验证输出。包括电压比较器的第二验证子电路被耦合以接收第二输出电流和第二参考电流并提供第二验证输出。第三验证子电路包括耦合以接收第三输出电流和第三参考电流的电流比较器，并提供第三验证输出。数字状态机具有接收第一，第二和第三验证输出的输入端以及用于处理这些输出的电路，以确定BGR电路是否正确启动。

6. 发明授权

US09383393B2 Dual-comparator circuit with dynamic VIO shift protection 有权
标题翻译：具有动态VIO转换保护的双比较电路
公开(公告)号：US09383393B2
公开(公告)日：2016-07-05
申请号：US14327947
申请日：2014-07-10
申请人： Texas Instruments Deutschland GmbH
发明人： Johannes Gerber , Bernhard Ruck , Asif Qaiyum , Ruediger Kuhn
IPC分类号： H03K5/22 , G01R19/165 , H03M1/12 , H03M1/46
CPC分类号： G01R19/16576 , H03M1/1245 , H03M1/46
摘要： A dual-comparator circuit includes a main comparator providing a first decision output (outmain) including a main MOS differential pair, and an auxiliary comparator including an auxiliary MOS differential pair providing a second decision output (outaux). The auxiliary comparator receives a differential input voltage (Vin), and generates a control signal that is coupled to an enable input of the main comparator. A first operating mode (OM) is implemented when |Vin|
摘要翻译：双比较器电路包括提供包括主MOS差分对的第一判定输出（outmain）的主比较器和包括提供第二判定输出（outaux）的辅助MOS差分对的辅助比较器。辅助比较器接收差分输入电压（Vin），并产生耦合到主比较器的使能输入的控制信号。当| Vin | <预定电压电平（PVL）时，第一操作模式（OM）被实现，其中控制信号激活主比较器。当| Vin |≧PVL时，第二个OM被实现，其中主差分对被开关保护以产生瞬态电压输入偏移（VIO）。逻辑电路具有接收outaux和outmain的逻辑输入，以及当在第二OM中在第一OM和outaux时，使用outmain提供双比较器电路的判定结果的逻辑输出。

7. 发明申请

US20150286231A1 Control for Voltage Regulators 有权
标题翻译：电压调节器的控制
公开(公告)号：US20150286231A1
公开(公告)日：2015-10-08
申请号：US14245293
申请日：2014-04-04
申请人： Texas Instruments Deutschland GmbH
发明人： Johannes Gerber , Matthias Arnold , Ronald Nerlich
IPC分类号： G05F1/56 , G01R19/00
CPC分类号： G05F1/565 , G01R19/00 , G01R19/0092 , G05F1/56
摘要： A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in discrete time using a mixed analog and digital approach. For application to various low drop-out voltage regulator situations, a sensing transistor can be connected in parallel with a feedback loop transistor of the low drop-out voltage regulator circuit to create a sensing current that is proportional to the current passing through the feedback loop transistor and thus the output current provided to the load. This sensing approach can be adapted to sense both overload and light load conditions to allow dynamic power control of the device.
摘要翻译：应用混合信号方法来检测应用于负载的输出电压状况。可以采用混合模拟和数字方式在离散时间采用电流模式监测方法。为了应用于各种低压差稳压器情况，感测晶体管可以与低压差稳压器电路的反馈环形晶体管并联连接，以产生与通过反馈环路的电流成比例的感测电流晶体管，从而将输出电流提供给负载。该感测方法可以适应于检测过载和轻负载条件以允许设备的动态功率控制。

8. 发明申请

US20160231762A1 Control for Voltage Regulators 审中-公开
公开(公告)号：US20160231762A1
公开(公告)日：2016-08-11
申请号：US15132294
申请日：2016-04-19
申请人： TEXAS INSTRUMENTS DEUTSCHLAND GMBH
发明人： Johannes Gerber , Matthias Arnold , Ronald Nerlich
IPC分类号： G05F1/565
CPC分类号： G05F1/565 , G01R19/00 , G01R19/0092 , G05F1/56
摘要： A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in discrete time using a mixed analog and digital approach. For application to various low drop-out voltage regulator situations, a sensing transistor can be connected in parallel with a feedback loop transistor of the low drop-out voltage regulator circuit to create a sensing current that is proportional to the current passing through the feedback loop transistor and thus the output current provided to the load. This sensing approach can be adapted to sense both overload and light load conditions to allow dynamic power control of the device.

9. 发明授权

US09348349B2 Control for voltage regulators 有权
标题翻译：电压调节器的控制
公开(公告)号：US09348349B2
公开(公告)日：2016-05-24
申请号：US14245293
申请日：2014-04-04
申请人： Texas Instruments Deutschland GmbH
发明人： Johannes Gerber , Matthias Arnold , Ronald Nerlich
IPC分类号： G05F1/00 , G05F3/16 , G05F3/20 , H02H3/08 , H02H9/02 , G05F1/56 , G01R19/00
CPC分类号： G05F1/565 , G01R19/00 , G01R19/0092 , G05F1/56
摘要： A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in discrete time using a mixed analog and digital approach. For application to various low drop-out voltage regulator situations, a sensing transistor can be connected in parallel with a feedback loop transistor of the low drop-out voltage regulator circuit to create a sensing current that is proportional to the current passing through the feedback loop transistor and thus the output current provided to the load. This sensing approach can be adapted to sense both overload and light load conditions to allow dynamic power control of the device.
摘要翻译：应用混合信号方法来检测应用于负载的输出电压状况。可以采用混合模拟和数字方式在离散时间采用电流模式监测方法。为了应用于各种低压差稳压器情况，感测晶体管可以与低压差稳压器电路的反馈环形晶体管并联连接，以产生与通过反馈环路的电流成比例的感测电流晶体管，从而将输出电流提供给负载。该感测方法可以适应于检测过载和轻负载条件以允许设备的动态功率控制。

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