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1. 发明授权

US07977675B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07977675B2
公开(公告)日：2011-07-12
申请号：US12423053
申请日：2009-04-14
申请人： Tetsufumi Kawamura , Takeshi Sato , Mutsuko Hatano , Hiroyuki Uchiyama
发明人： Tetsufumi Kawamura , Takeshi Sato , Mutsuko Hatano , Hiroyuki Uchiyama
IPC分类号： H01L29/12
CPC分类号： H01L27/1225 , H01L27/1214 , H01L27/127 , H01L29/7869
摘要： A metallic oxide semiconductor device with high performance and small variations. It is a field effect transistor using a metallic oxide film for the channel, which includes a channel region and a source region and comprises a drain region with a lower oxygen content than the channel region in the metallic oxide, in which the channel region exhibits semiconductor characteristics and the oxygen content decreases with depth below the surface.
摘要翻译：具有高性能和小变化的金属氧化物半导体器件。它是一种使用金属氧化物膜作为沟道的场效应晶体管，其包括沟道区和源极区，并且包括具有比金属氧化物中的沟道区更低的氧含量的漏区，其中沟道区表现出半导体特性和氧含量随着表面深度的减小而减小。

2. 发明申请

US20090261325A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090261325A1
公开(公告)日：2009-10-22
申请号：US12423053
申请日：2009-04-14
申请人： Tetsufumi Kawamura , Takeshi Sato , Mutsuko Hatano , Hiroyuki Uchiyama
发明人： Tetsufumi Kawamura , Takeshi Sato , Mutsuko Hatano , Hiroyuki Uchiyama
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/1225 , H01L27/1214 , H01L27/127 , H01L29/7869
摘要： A metallic oxide semiconductor device with high performance and small variations. It is a field effect transistor using a metallic oxide film for the channel, which includes a channel region and a source region and comprises a drain region with a lower oxygen content than the channel region in the metallic oxide, in which the channel region exhibits semiconductor characteristics and the oxygen content decreases with depth below the surface.
摘要翻译：具有高性能和小变化的金属氧化物半导体器件。它是一种使用金属氧化物膜作为沟道的场效应晶体管，其包括沟道区和源极区，并且包括具有比金属氧化物中的沟道区更低的氧含量的漏区，其中沟道区表现出半导体特性和氧含量随着表面深度的减小而减小。

3. 发明申请

US20110042667A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110042667A1
公开(公告)日：2011-02-24
申请号：US12838451
申请日：2010-07-17
申请人： Tetsufumi KAWAMURA , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano , Takeshi Sato
发明人： Tetsufumi KAWAMURA , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano , Takeshi Sato
IPC分类号： H01L29/24 , H01L21/34
CPC分类号： H01L29/7869
摘要： A method for manufacturing a thin film transistor (TFT) through a process including back exposure, in which oxide semiconductor is used for a channel layer; using an electrode over a substrate as a mask, negative resist is exposed to light from the back of the substrate; the negative resist except its exposed part is removed; and an electrode is shaped by etching a conductive film using the exposed part as an etching mask.
摘要翻译：一种通过包括反向曝光的工艺制造薄膜晶体管（TFT）的方法，其中将氧化物半导体用于沟道层; 使用基板上的电极作为掩模，负光刻胶从基板的背面暴露于光; 去除其外露部分的负光刻胶; 并且通过使用暴露部分作为蚀刻掩模蚀刻导电膜来成形电极。

4. 发明授权

US08314032B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08314032B2
公开(公告)日：2012-11-20
申请号：US12838451
申请日：2010-07-17
申请人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano , Takeshi Sato
发明人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano , Takeshi Sato
IPC分类号： H01L21/311
CPC分类号： H01L29/7869
摘要： A method for manufacturing a thin film transistor (TFT) through a process including back exposure, in which oxide semiconductor is used for a channel layer; using an electrode over a substrate as a mask, negative resist is exposed to light from the back of the substrate; the negative resist except its exposed part is removed; and an electrode is shaped by etching a conductive film using the exposed part as an etching mask.
摘要翻译：一种通过包括反向曝光的工艺制造薄膜晶体管（TFT）的方法，其中将氧化物半导体用于沟道层; 使用基板上的电极作为掩模，负光刻胶从基板的背面暴露于光; 去除其外露部分的负光刻胶; 并且通过使用暴露部分作为蚀刻掩模蚀刻导电膜来成形电极。

5. 发明授权

US08377742B2 Thin film transistor and method for manufacturing the same 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US08377742B2
公开(公告)日：2013-02-19
申请号：US12843977
申请日：2010-07-27
申请人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano
发明人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano
IPC分类号： H01L21/16
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78696
摘要： In a manufacturing method for thin film transistors, the following procedure is taken: a sacrifice layer comprised of a metal oxide semiconductor is formed over a conductive layer comprised of a metal oxide semiconductor; a metal film is formed over the sacrifice layer; the metal film is processed by dry etching; and the portion of the sacrifice layer exposed by this dry etching is subjected to wet etching.
摘要翻译：在薄膜晶体管的制造方法中，采取以下步骤：在由金属氧化物半导体构成的导电层上形成由金属氧化物半导体构成的牺牲层; 在牺牲层之上形成金属膜; 金属膜通过干蚀刻加工; 并且通过该干蚀刻暴露的牺牲层的部分进行湿蚀刻。

6. 发明申请

US20110049508A1 THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20110049508A1
公开(公告)日：2011-03-03
申请号：US12843977
申请日：2010-07-27
申请人： Tetsufumi KAWAMURA , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano
发明人： Tetsufumi KAWAMURA , Hiroyuki Uchiyama , Hironori Wakana , Mutsuko Hatano
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78696
摘要： In a manufacturing method for thin film transistors, the following procedure is taken: a sacrifice layer comprised of a metal oxide semiconductor is formed over a conductive layer comprised of a metal oxide semiconductor; a metal film is formed over the sacrifice layer; the metal film is processed by dry etching; and the portion of the sacrifice layer exposed by this dry etching is subjected to wet etching.
摘要翻译：在薄膜晶体管的制造方法中，采取以下步骤：在由金属氧化物半导体构成的导电层上形成由金属氧化物半导体构成的牺牲层; 在牺牲层上形成金属膜; 金属膜通过干蚀刻加工; 并且通过该干蚀刻暴露的牺牲层的部分进行湿蚀刻。

7. 发明授权

US08912537B2 Semiconductor device, RFID tag using the same and display device 有权
标题翻译：半导体器件，使用其的RFID标签和显示器件
公开(公告)号：US08912537B2
公开(公告)日：2014-12-16
申请号：US13642612
申请日：2011-04-22
申请人： Hironori Wakana , Tetsufumi Kawamura , Hiroyuki Uchiyama , Kuniharu Fujii
发明人： Hironori Wakana , Tetsufumi Kawamura , Hiroyuki Uchiyama , Kuniharu Fujii
IPC分类号： H01L29/78 , H01L29/786
CPC分类号： H01L29/7869
摘要： Disclosed is an oxide semiconductor layer (13) which forms a channel for a thin-film transistor and which includes at least In and oxygen and one or more types of elements from among Zn, Cd, Al, Ga, Si, Sn, Ce, and Ge. A high concentration region (13d) is disposed on one section of the oxide semiconductor layer (13), whereby said region has a maximum In concentration 30 at %; or higher than other regions on the oxide semiconductor layer (13). The film thickness of the oxide semiconductor layer (13) is 100 nm max., and the film thickness of the high concentration region (13d) is 20 nm max. or, preferably, 6 nm max. This enables a thin-film transistor with a sub-threshold slope of 100 mV/decade max., a high on-current, and a high field effect mobility to be achieved.
摘要翻译：公开了一种氧化物半导体层（13），其形成用于薄膜晶体管的沟道，并且至少包括In和氧，以及从Zn，Cd，Al，Ga，Si，Sn，Ce中选出的一种或多种元素，和格。高浓度区域（13d）设置在氧化物半导体层（13）的一个部分上，由此所述区域的最大In浓度为30原子％。或高于氧化物半导体层（13）上的其它区域。氧化物半导体层（13）的膜厚最大为100nm，高浓度区域（13d）的膜厚为20nm以下。或者优选地，最多6nm。这使得能够实现具有100mV / 10倍的次阈值斜率，高导通电流和高场效应迁移率的薄膜晶体管。

8. 发明申请

US20100140614A1 OXIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME AND ACTIVE MATRIX SUBSTRATE 失效
标题翻译：氧化物半导体器件及其制造方法和有源矩阵衬底
公开(公告)号：US20100140614A1
公开(公告)日：2010-06-10
申请号：US12633577
申请日：2009-12-08
申请人： Hiroyuki Uchiyama , Tetsufumi Kawamura , Hironori Wakana
发明人： Hiroyuki Uchiyama , Tetsufumi Kawamura , Hironori Wakana
IPC分类号： H01L29/24 , H01L21/36
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02617 , H01L21/28291 , H01L27/10873 , H01L27/112 , H01L27/11206 , H01L27/1225 , H01L27/3262 , H01L51/5206
摘要： A phenomenon of change of a contact resistance between an oxide semiconductor and a metal depending on an oxygen content ratio in introduced gas upon depositing an oxide semiconductor film made of indium gallium zinc oxide, zinc tin oxide, or others in an oxide semiconductor thin-film transistor. A contact layer is formed with an oxygen content ratio of 10% or higher in a region from a surface, where the metal and the oxide semiconductor are contacted, down to at least 3 nm deep in depth direction, and a region to be a main channel layer is further formed with an oxygen content ratio of 10% or lower, so that a multilayered structure is formed, and both of ohmic characteristics to the electrode metal and reliability such as the suppression of threshold potential shift are achieved.
摘要翻译：在氧化物半导体薄膜中沉积由铟镓锌氧化物，氧化锌锡等制成的氧化物半导体膜时，导入气体中的氧含量比的氧化物半导体与金属之间的接触电阻发生变化的现象晶体管。在从金属和氧化物半导体接触的表面的区域的氧含量比为10％以上形成接触层，深度为深度至少3nm以下的区域进一步形成具有10％或更低的氧含量比的沟道层，从而形成多层结构，并且实现了与电极金属的欧姆特性和诸如抑制阈值电位移动之类的可靠性。

9. 发明授权

US08653517B2 Thin-film transistor and method for manufacturing the same 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US08653517B2
公开(公告)日：2014-02-18
申请号：US13639455
申请日：2011-04-01
申请人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana
发明人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , G02F1/1368 , H01L29/66765 , H01L29/78618 , H01L29/78624
摘要： In a TFT that adopts an oxide semiconductor as an active layer and has a resistance layer interposed between the active layer and one of a source and drain electrode, while Vth close to 0 V and a small off current are sustained, an on-current is increased. In a thin-film transistor including a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode, the semiconductor layer that links the source electrode and drain electrode is made of a metal oxide. The semiconductor layer includes three regions of first, second, and third regions. The first region is connected with the source electrode, the third region is connected with the drain electrode, and the second region is connected between the first region and third region. The resistivities of the three regions have the relationship of the first region>the second region>the third region.
摘要翻译：在采用氧化物半导体作为有源层并且在有源层和源极和漏极中的一个之间插入电阻层的TFT中，当维持接近0V的Vth和小的截止电流时，导通电流为增加。在包括栅电极，栅极绝缘膜，半导体层，源电极和漏电极的薄膜晶体管中，连接源电极和漏电极的半导体层由金属氧化物制成。半导体层包括第一，第二和第三区域的三个区域。第一区域与源电极连接，第三区域与漏电极连接，第二区域连接在第一区域和第三区域之间。三个区域的电阻率具有第一区域>第二区域>第三区域的关系。

10. 发明申请

US20130043469A1 Thin-Film Transistor and Method for Manufacturing the Same 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20130043469A1
公开(公告)日：2013-02-21
申请号：US13639455
申请日：2011-04-01
申请人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana
发明人： Tetsufumi Kawamura , Hiroyuki Uchiyama , Hironori Wakana
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , G02F1/1368 , H01L29/66765 , H01L29/78618 , H01L29/78624
摘要： In a TFT that adopts an oxide semiconductor as an active layer and has a resistance layer interposed between the active layer and one of a source and drain electrode, while Vth close to 0 V and a small off current are sustained, an on-current is increased. In a thin-film transistor including a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode, the semiconductor layer that links the source electrode and drain electrode is made of a metal oxide. The semiconductor layer includes three regions of first, second, and third regions. The first region is connected with the source electrode, the third region is connected with the drain electrode, and the second region is connected between the first region and third region. The resistivities of the three regions have the relationship of the first region>the second region>the third region.
摘要翻译：在采用氧化物半导体作为有源层并且在有源层和源极和漏极中的一个之间插入电阻层的TFT中，当维持接近0V的Vth和小的截止电流时，导通电流为增加。在包括栅电极，栅极绝缘膜，半导体层，源电极和漏电极的薄膜晶体管中，连接源电极和漏电极的半导体层由金属氧化物制成。半导体层包括第一，第二和第三区域的三个区域。第一区域与源极连接，第三区域与漏电极连接，第二区域连接在第一区域和第三区域之间。三个区域的电阻率具有第一区域>第二区域>第三区域的关系。

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