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1. 发明授权

US4954982A Method and circuit for checking storage protection by pre-checking an access request key 失效
标题翻译：通过预检查访问请求密钥来检查存储保护的方法和电路
公开(公告)号：US4954982A
公开(公告)日：1990-09-04
申请号：US315213
申请日：1989-02-24
申请人： Terutaka Tateishi , Minoru Koshino , Kazuyuki Shimizu
发明人： Terutaka Tateishi , Minoru Koshino , Kazuyuki Shimizu
IPC分类号： G06F13/00 , G06F12/14
CPC分类号： G06F12/14 , G06F12/1466
摘要： A storage-protection-check circuit includes a storage key corresponding to the unit area of a storage region, the storage key being stored in a key storage. The value of the access request key having an access request corresponding to the storage region is checked. When the access request key has a specified value, the storage region is accessed without reading the storage key out of the key storage.
摘要翻译：存储保护检查电路包括与存储区域的单位区域对应的存储密钥，存储密钥存储在密钥存储器中。检查具有对应于存储区域的访问请求的访问请求密钥的值。当访问请求密钥具有指定值时，访问存储区域而不从密钥存储区读取存储密钥。

2. 发明授权

US4514847A Key storage error processing system 失效
标题翻译：密钥存储错误处理系统
公开(公告)号：US4514847A
公开(公告)日：1985-04-30
申请号：US419927
申请日：1982-09-20
申请人： Terutaka Tateishi , Kazuyuki Shimizu
发明人： Terutaka Tateishi , Kazuyuki Shimizu
IPC分类号： G06F3/00 , G06F11/10 , G06F12/10 , G06F12/12 , G06F12/14
CPC分类号： G06F12/1466 , G06F11/1008 , G06F11/1076 , G06F12/126 , G06F2212/1032
摘要： In a system which is provided with a key storage having stored therein main storage keys respectively corresponding to pages into which a main storage is split, each main storage key having at least a reference bit indicating whether the corresponding page is being accessed and a change bit indicating whether information has been written in the page, and in which a parity bit is added to each of the reference bits and the change bits to form the main storage key. There are provided a detecting device for detecting a parity error in a pair of the reference bit and the parity bit and a pair of the change bit and the parity bit when the main storage key is read out, and a device for rewriting the main storage key after setting the reference bit to a "1" indicating the corresponding page is being accessed and adding a new parity bit "0" to the reference bit when a parity error is detected by the detecting device in the pair of the reference bit and the parity bit and after setting the change bit to a "1" indicating a write in the corresponding page and adding an new parity bit "0" to the change bit when a parity error is detected in the pair of the change bit and the parity bit, thereby controlling the saving of the pages of the main storage into external storage.
摘要翻译：在具有密钥存储器的系统中，其中存储有分别对应于主存储器被分割的页面的主存储密钥，每个主存储密钥至少具有指示是否正在被访问的对应页面的参考位和改变位指示信息是否已被写入页面中，并且其中将奇偶校验位添加到每个参考位和更改位以形成主存储密钥。提供了一种检测装置，用于在读取主存储密钥时检测一对参考位和奇偶校验位以及一对改变位和奇偶校验位的奇偶校验错误，以及用于重写主存储器在将参考位设置为指示相应页面的“1”之后，在参考位对中检测设备检测到奇偶校验错误时，向参考位添加新的奇偶校验位“0” 奇偶校验位，并且在将改变位设置为指示对应页面中的写入的“1”，并且当在该对改变位和奇偶校验位中检测到奇偶校验错误时，向改变位添加新的奇偶校验位“0” 从而控制将主存储器的页面保存到外部存储器中。

3. 发明授权

US4547848A Access control processing system in computer system 失效
标题翻译：计算机系统中的访问控制处理系统
公开(公告)号：US4547848A
公开(公告)日：1985-10-15
申请号：US509869
申请日：1983-06-30
申请人： Hidehiko Nishida , Minoru Koshino , Terutaka Tateishi , Akira Hattori
发明人： Hidehiko Nishida , Minoru Koshino , Terutaka Tateishi , Akira Hattori
IPC分类号： G06F12/08 , G06F13/18 , G06F13/00
CPC分类号： G06F13/18
摘要： This invention relates to a system for processing access requests issued from a plurality of access requesting units to a memory. In particular, in a storage system where the buffer storage BS and main storage MS are provided, access is first made to BS based on and access request and if the desired data is not found in BS, access is made to MS. When the desired data is not found in BS and access is then made to MS, acces to BS is carried out based on the next access request from the same access requesting unit in parallel with the access to MS by the first access request.
摘要翻译：本发明涉及一种用于处理从多个访问请求单元向存储器发出的访问请求的系统。特别地，在提供缓冲存储BS和主存储MS的存储系统中，首先基于和访问请求对BS进行访问，并且如果在BS中没有找到所需的数据，则对MS进行访问。当在BS中没有找到期望的数据，然后对MS进行访问时，基于来自同一访问请求单元的下一个访问请求，与通过第一访问请求访问MS并行地执行对BS的访问。

4. 发明授权

US4507729A Error processing system using two different types of replace logic 失效
标题翻译：错误处理系统使用两种不同类型的替换逻辑
公开(公告)号：US4507729A
公开(公告)日：1985-03-26
申请号：US411318
申请日：1982-08-25
申请人： Masanori Takahashi , Terutaka Tateishi
发明人： Masanori Takahashi , Terutaka Tateishi
IPC分类号： G06F13/00 , G06F12/12 , G06F12/16 , G06F11/00
CPC分类号： G06F12/126 , G06F2212/1032
摘要： A buffer storage which stores some of the blocks, into which a main storage is divided, and, when a new block is to be stored, designates a block to be replaced based on least recently used logic designating the least recently used block as the block to be replaced. When the buffer storage is put in a state in which the designation of the block to be replaced is not carried out, it is detected and logic different from the least recently used logic is used to designate the block to be replaced, thereby preventing failure of designation of the block to be replaced and consequently a block is replaced.
摘要翻译：一个缓冲存储器，其存储一些主存储器被划分成的块，并且当一个新块被存储时，根据最近最少使用的指定最近使用的块的逻辑指定要替换的块作为块被替换。当缓冲存储器被置于未被替换的块的指定的状态时，检测到它，并且使用与最近最少使用的逻辑不同的逻辑来指定要替换的块，从而防止指定要更换的块，从而替换块。

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