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1. 发明授权

US07534629B2 Manufacturing method of semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US07534629B2
公开(公告)日：2009-05-19
申请号：US11448071
申请日：2006-06-07
申请人： Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Motoji Murakami , Masayoshi Okamoto , Yasunori Narizuka , Susumu Kasukabe
发明人： Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Motoji Murakami , Masayoshi Okamoto , Yasunori Narizuka , Susumu Kasukabe
IPC分类号： H01L21/66
CPC分类号： G01R1/0735
摘要： By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each pusher being formed of a POGO pin insulator, POGO pins, an FPC connector, a membrane probe HMS, an impact easing sheet, an impact easing plate, a chip condenser YRS and so on, wherein one or two POGO pins press a plurality of metal films arranged like islands. One or more cuts are made into what matches the chip to be tested in the area of the membrane probe in a direction substantially parallel to the extending direction of wiring electrically connected to probes formed in the membrane probe.
摘要翻译：通过使用通过使用半导体集成电路器件的制造技术形成的膜探针，将提高在多个芯片上共同执行的探测的产量。通过使用多个推动器形成探针卡，每个推动器由POGO针绝缘体，POGO针，FPC连接器，膜探针HMS，冲击缓冲片，冲击缓冲板，芯片冷凝器YRS等形成其中一个或两个POGO销按压布置成岛状的多个金属膜。将一个或多个切口制成与膜探针区域中基本上平行于电连接到形成在膜探针中的探针的布线的延伸方向的方向匹配的待测芯片。

2. 发明申请

US20060281222A1 Manufacturing method of semiconductor integrated circuit device 失效
公开(公告)号：US20060281222A1
公开(公告)日：2006-12-14
申请号：US11448071
申请日：2006-06-07
申请人： Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Motoji Murakami , Masayoshi Okamoto , Yasunori Narizuka
发明人： Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Motoji Murakami , Masayoshi Okamoto , Yasunori Narizuka
IPC分类号： H01L21/00
CPC分类号： G01R1/0735
摘要： By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each pusher being formed of a POGO pin insulator, POGO pins, an FPC connector, a membrane probe HMS, an impact easing sheet, an impact easing plate, a chip condenser YRS and so on, wherein one or two POGO pins press a plurality of metal films arranged like islands. One or more cuts are made into what matches the chip to be tested in the area of the membrane probe in a direction substantially parallel to the extending direction of wiring electrically connected to probes formed in the membrane probe.

3. 发明授权

US07423439B2 Probe sheet adhesion holder, probe card, semiconductor test device, and manufacturing method of semiconductor device 失效
标题翻译：探针片粘合保持器，探针卡，半导体测试装置和半导体器件的制造方法
公开(公告)号：US07423439B2
公开(公告)日：2008-09-09
申请号：US11543021
申请日：2006-10-05
申请人： Susumu Kasukabe , Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Yasunori Narizuka
发明人： Susumu Kasukabe , Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Yasunori Narizuka
IPC分类号： G01R31/02
CPC分类号： G01R1/0735 , G01R3/00
摘要： In a prove card comprising: a probe sheet having a contact terminal contacting with an electrode provided on a wafer, a wiring led from the contact terminal, and an electrode electrically connected to the wiring; and a multilayered wiring substrate having an electrode electrically connected to the electrode of the probe sheet, wherein a contact between the contact terminal and the electrode of the wafer is established by one or more adhesion holder for pressing, from the backside of a terminal group of the terminal contacts, the terminal group via a press block with a spring to contact with the electrode pad. A device in which the probe sheet is attached to the adhesion holder and a plurality of chips are tested simultaneously by combining the adhesion holder.
摘要翻译：一种证明卡，包括：探针片，其具有与设置在晶片上的电极接触的接触端子，从接触端子引出的布线和电连接到布线的电极; 以及多层布线基板，其具有与所述探针片的电极电连接的电极，其中，所述接触端子和所述晶片的电极之间的接触由一个或多个粘合保持器建立，所述粘合保持器从所述端子组的端子组的背面端子触点，端子组通过具有弹簧的压块与电极焊盘接触。通过组合粘合保持器，将探针片附接到粘合保持器和多个芯片的装置同时测试。

4. 发明申请

US20070103178A1 Probe sheet adhesion holder, probe card, semiconductor test device, and manufacturing method of semiconductor device 失效
标题翻译：探针片粘合保持器，探针卡，半导体测试装置和半导体器件的制造方法
公开(公告)号：US20070103178A1
公开(公告)日：2007-05-10
申请号：US11543021
申请日：2006-10-05
申请人： Susumu Kasukabe , Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Yasunori Narizuka
发明人： Susumu Kasukabe , Teruo Shoji , Akio Hasebe , Yoshinori Deguchi , Yasunori Narizuka
IPC分类号： G01R31/02
CPC分类号： G01R1/0735 , G01R3/00
摘要： In a prove card comprising: a probe sheet having a contact terminal contacting with an electrode provided on a wafer, a wiring led from the contact terminal, and an electrode electrically connected to the wiring; and a multilayered wiring substrate having an electrode electrically connected to the electrode of the probe sheet, wherein a contact between the contact terminal and the electrode of the wafer is established by one or more adhesion holder for pressing, from the backside of a terminal group of the terminal contacts, the terminal group via a press block with a spring to contact with the electrode pad. A device in which the probe sheet is attached to the adhesion holder and a plurality of chips are tested simultaneously by combining the adhesion holder.
摘要翻译：一种证明卡，包括：探针片，其具有与设置在晶片上的电极接触的接触端子，从接触端子引出的布线和电连接到布线的电极; 以及多层布线基板，其具有与所述探针片的电极电连接的电极，其中，所述接触端子和所述晶片的电极之间的接触由一个或多个粘合保持器建立，所述粘合保持器从所述端子组的端子组的背面端子触点，端子组通过具有弹簧的压块与电极焊盘接触。通过组合粘合保持器，将探针片附接到粘合保持器和多个芯片的装置同时测试。

5. 发明授权

US07701063B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07701063B2
公开(公告)日：2010-04-20
申请号：US10590276
申请日：2005-02-22
申请人： Teruaki Kanzaki , Yoshinori Deguchi , Kazunobu Miki
发明人： Teruaki Kanzaki , Yoshinori Deguchi , Kazunobu Miki
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L24/05 , H01L24/03 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/4809 , H01L2224/48091 , H01L2224/48463 , H01L2224/4899 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/19043 , H01L2924/30105 , H01L2224/45099 , H01L2924/00
摘要： The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like metals are formed under the first metal formed using the wiring layer of the top layer. And a bonding pad is put in order and located along the long-side direction of a second metal to achieve the above objects. That is, a bonding pad is put in order and located so that the long-side direction of a second metal and the arrangement direction of a bonding pad may become in the same direction.
摘要翻译：本发明的目的在于提供一种半导体器件，其能够提高由焊盘产生的应力的强度。在本发明的半导体装置中，在半导体芯片上形成有多个接合焊盘。在每个接合焊盘中，在使用顶层的布线层形成的第一金属之下形成多个第二线状金属。并且沿着第二金属的长边方向依次放置接合焊盘，以实现上述目的。也就是说，依次放置焊盘，使得第二金属的长边方向和焊盘的排列方向可以变成相同的方向。

6. 发明授权

US08178981B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08178981B2
公开(公告)日：2012-05-15
申请号：US12715925
申请日：2010-03-02
申请人： Teruaki Kanzaki , Yoshinori Deguchi , Kazunobu Miki
发明人： Teruaki Kanzaki , Yoshinori Deguchi , Kazunobu Miki
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L24/05 , H01L24/03 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/4809 , H01L2224/48091 , H01L2224/48463 , H01L2224/4899 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/19043 , H01L2924/30105 , H01L2224/45099 , H01L2924/00
摘要： The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like metals are formed under the first metal formed using the wiring layer of the top layer. And a bonding pad is put in order and located along the long-side direction of a second metal to achieve the above objects. That is, a bonding pad is put in order and located so that the long-side direction of a second metal and the arrangement direction of a bonding pad may become in the same direction.
摘要翻译：本发明的目的在于提供一种半导体器件，其能够提高由焊盘产生的应力的强度。在本发明的半导体装置中，在半导体芯片上形成有多个接合焊盘。在每个接合焊盘中，在使用顶层的布线层形成的第一金属之下形成多个第二线状金属。并且沿着第二金属的长边方向依次放置接合焊盘，以实现上述目的。也就是说，依次放置焊盘，使得第二金属的长边方向和焊盘的排列方向可以变成相同的方向。

7. 发明申请

US20100155960A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100155960A1
公开(公告)日：2010-06-24
申请号：US12715925
申请日：2010-03-02
申请人： Teruaki KANZAKI , Yoshinori Deguchi , Kazunobu Miki
发明人： Teruaki KANZAKI , Yoshinori Deguchi , Kazunobu Miki
IPC分类号： H01L23/485
CPC分类号： H01L24/05 , H01L24/03 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/4809 , H01L2224/48091 , H01L2224/48463 , H01L2224/4899 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/19043 , H01L2924/30105 , H01L2224/45099 , H01L2924/00
摘要： The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like metals are formed under the first metal formed using the wiring layer of the top layer. And a bonding pad is put in order and located along the long-side direction of a second metal to achieve the above objects. That is, a bonding pad is put in order and located so that the long-side direction of a second metal and the arrangement direction of a bonding pad may become in the same direction.
摘要翻译：本发明的目的在于提供一种半导体器件，其能够提高由焊盘产生的应力的强度。在本发明的半导体装置中，在半导体芯片上形成有多个接合焊盘。在每个接合焊盘中，在使用顶层的布线层形成的第一金属之下形成多个第二线状金属。并且沿着第二金属的长边方向依次放置接合焊盘，以实现上述目的。也就是说，依次放置焊盘，使得第二金属的长边方向和焊盘的排列方向可以变成相同的方向。

8. 发明申请

US20050189955A1 SEMICONDUCTOR DEVICE TEST PROBE HAVING IMPROVED TIP PORTION 有权
标题翻译：具有改进提示部分的半导体器件测试探针
公开(公告)号：US20050189955A1
公开(公告)日：2005-09-01
申请号：US10645595
申请日：2003-08-22
申请人： Megumi Takemoto , Shigeki Maekawa , Yoshihiro Kashiba , Yoshinori Deguchi , Kazunobu Miki
发明人： Megumi Takemoto , Shigeki Maekawa , Yoshihiro Kashiba , Yoshinori Deguchi , Kazunobu Miki
IPC分类号： G01R1/067 , H01L21/66 , G01R31/02
CPC分类号： G01R1/06738 , G01R1/06711 , H01L2224/48463 , H01L2924/01037 , H01L2924/01057 , H01L2924/01079
摘要： A semiconductor device test probe having a tip portion for being urged against an electrode pad of an integrated semiconductor device to establish an electrical contact against the electrode pad for testing functions of the semiconductor device. The spherical tip portion has a radius of curvature r expressed by 9t≦r≦35t, where r is the radius of curvature of the spherical surface and t is the thickness of the electrode pad. The tip portion may have a first curved surface substantially positioned in the direction of slippage of the probe when the probe is urged against the electrode pad and slipped relative to the electrode pad and a second curved surface opposite to the first curved surface. The first curved surface has a radius of curvature of from 7 μm to 30 μm and larger than that of the second curved surface. The test probe may be manufactured by a method comprising the steps of roughing the tip portion of the curved surface by abrasing by means of electrolyte abrasion or abrasing particles to form a symmetrical spherical curved surface, and finishing the tip portion by sliding it on an abrasive member comprising an elastically deformable thick film fixed to a substrate and having abrasive particles therein or thereon directly or through a metallic film.
摘要翻译：一种半导体器件测试探针，其具有尖端部分，用于抵抗集成半导体器件的电极焊盘，以建立与电极焊盘的电接触，以测试半导体器件的功能。球形尖端部分具有由9t <= r <= 35t表示的曲率半径r，其中r是球面的曲率半径，t是电极焊盘的厚度。尖端部分可以具有基本上位于探头滑动方向上的第一弯曲表面，当探头被推靠在电极垫上并相对于电极焊盘滑动时，第一弯曲表面与第一弯曲表面相对的第二弯曲表面。第一曲面的曲率半径为7μm〜30μm，大于第二曲面的曲率半径。测试探针可以通过以下方法制造，该方法包括以下步骤：通过利用电解质磨损或磨损颗粒进行磨损来粗糙化弯曲表面的尖端部分以形成对称的球形曲面，并且通过将其磨削在磨料上来完成尖端部分其包括固定到基底的可弹性变形的厚膜，其上直接或通过金属膜在其中或其上具有磨料颗粒。

9. 发明授权

US06727714B2 Probe card 有权
标题翻译：探针卡
公开(公告)号：US06727714B2
公开(公告)日：2004-04-27
申请号：US10225193
申请日：2002-08-22
申请人： Yoshinori Deguchi
发明人： Yoshinori Deguchi
IPC分类号： G01R3102
CPC分类号： G01R1/07342
摘要： A probe card has an offset substrate electrically connected between a probe card substrate and an interposer substrate with solders. It is possible to secure the thickness of the interposer substrate plus the thickness of the offset substrate for the depth of the positioning holes of the probe needles, which results in the improved positioning accuracy of the probe needle.
摘要翻译：探针卡具有电连接在探针卡衬底和具有焊料的插入器衬底之间的偏移衬底。探针的定位孔的深度可以确保插入器基板的厚度加上偏移基板的厚度，这样可以提高探针的定位精度。

10. 发明授权

US06628127B2 Probe card for testing semiconductor integrated circuit and method of manufacturing the same 失效
标题翻译：用于测试半导体集成电路的探针卡及其制造方法
公开(公告)号：US06628127B2
公开(公告)日：2003-09-30
申请号：US09748279
申请日：2000-12-27
申请人： Megumi Takemoto , Shigeki Maekawa , Yoshihiro Kashiba , Yoshinori Deguchi , Masahiro Tanaka
发明人： Megumi Takemoto , Shigeki Maekawa , Yoshihiro Kashiba , Yoshinori Deguchi , Masahiro Tanaka
IPC分类号： G01R1073
CPC分类号： G01R1/06761 , G01R1/06738 , G01R1/07314 , G01R3/00
摘要： A probe card 8 for testing a semiconductor integrated circuit is provided with a plurality of probes for inputting/outputting an electric signal for verifying the operation of a semiconductor integrated circuit 6 to/from bonding pads 7 of the semiconductor integrated circuit. The probes 9 are formed by depositing a conductive film 11 on a surface of a plurality of convex portions formed on a surface of an insulating substrate 10.
摘要翻译：用于测试半导体集成电路的探针卡8设置有用于输入/输出用于验证半导体集成电路6到半导体集成电路的焊盘7的半导体集成电路6的操作的电信号的多个探针。探针9通过在形成在绝缘基板10的表面上的多个凸部的表面上沉积导电膜11而形成。

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