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    • 2. 发明授权
    • Method and apparatus for decoding an encoded signal
    • 用于解码编码信号的方法和装置
    • US5862190A
    • 1999-01-19
    • US581696
    • 1995-12-29
    • Terry Michael Schaffner
    • Terry Michael Schaffner
    • H03M13/23H03M13/27H03M13/41H03M13/45H04B7/08H04B7/26H04L1/00H04L25/03H04L27/10H03D1/00H04L27/06
    • H04L1/0059H04L25/03178H04L27/10H04L27/103
    • A decoder (215) implemented in a receiver of a wireless communication system employs an improved method and apparatus for decoding an encoded signal. The receiver sums the energy values (156A, 156B, . . . 156N) from a plurality of fingers within to produce an aggregate energy value (166). From the aggregate energy value (166), a set of log-likelihood values (207) are generated with a non-linear function generator (205) before being deinterleaved by a deinterleaver (210). The deinterleaved values (213) are input to the decoder (215) which estimates the original signal (178) by incorporating path histories of bits in the estimation of subsequent, related bits. Use of the path histories of bits improves the estimates of the original signal (178), which translates into an increase in the sensitivity of the receiver.
    • 在无线通信系统的接收机中实现的解码器(215)采用改进的编码信号解码方法和装置。 接收器从多个指状物中合并能量值(156A,156B,... 156N)以产生总能量值(166)。 从聚合能量值(166),在由解交织器(210)解交织之前,用非线性函数发生器(205)生成一组对数似然值(207)。 解交织值(213)被输入到解码器(215),解码器(215)通过在随后相关比特的估计中并入比特的路径历史来估计原始信号(178)。 使用比特的路径历史改进了原始信号(178)的估计,这转化为接收机的灵敏度的增加。
    • 6. 发明授权
    • Cache and caching method for conventional decoders
    • 常规解码器的缓存和缓存方法
    • US06580767B1
    • 2003-06-17
    • US09425756
    • 1999-10-22
    • Kevin P. KoehlerTerry Michael Schaffner
    • Kevin P. KoehlerTerry Michael Schaffner
    • H03D100
    • H04L1/0055H03M13/3905H03M13/3972H03M13/6566
    • A method and cache for caching encoded symbols for a convolutional decoder with forward and backward recursion includes storing different encoded symbols of an encoded frame in each of a plurality of symbol memory elements (200, 202, 400) and routing the same encoded symbols from one of the plurality of symbol memory elements (200, 202, 400) to at least both a forward recursion decoder (208) and a backward recursion decoder (210, 402). The plurality of symbol memory elements may be, for example, single port RAM cells, each operatively controlled to receive different encoded symbols of an encoded frame as input. Control logic (204) routes the same encoded symbols from one of the plurality of symbol memory elements (200, 202, 400) to all of the recursion decoders (208, 210, 402).
    • 一种用于对具有前向和后向递归的卷积解码器进行编码符号的高速缓存的方法和缓存器包括在多个符号存储器元件(200,202,400)的每一个中存储编码帧的不同编码符号,并将相同编码符号从一个 所述多个符号存储元件(200,202,400)中的至少一个至少是向前递归解码器(208)和反向递归解码器(210,402)。 多个符号存储器元件可以是例如单端口RAM单元,每个单端口RAM单元被操作地控制以接收编码帧的不同编码符号作为输入。 控制逻辑(204)将相同的编码符号从多个符号存储元件(200,202,400)中的一个路由到所有的递归解码器(208,210,402)。