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1. 发明授权

US08816906B2 Chip packages including through-silicon via dice with vertically inegrated phased-array antennas and low-frequency and power delivery substrates 有权
标题翻译：芯片封装包括通过骰子的穿硅，垂直集成的相控阵天线和低频和功率输送基板
公开(公告)号：US08816906B2
公开(公告)日：2014-08-26
申请号：US13101883
申请日：2011-05-05
申请人： Telesphor Kamgaing , Valluri R. Rao , Yorgos Palaskas
发明人： Telesphor Kamgaing , Valluri R. Rao , Yorgos Palaskas
IPC分类号： H01Q3/00
CPC分类号： H01Q3/30 , H01L23/66 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L2223/6677 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06517 , H01L2924/15321 , H01Q1/2283 , H01Q9/0414 , H01Q21/065 , H01Q23/00 , Y10T29/49004 , Y10T29/49018
摘要： An apparatus includes a die with through-silicon vias and radio frequency integrated circuit capabilities and it is vertically integrated with a phased-array antenna substrate. The through-silicon via and a radio frequency integrated circuit is coupled to a plurality of antenna elements disposed on the phased-array antenna substrate where each of the plurality of antenna elements is coupled to the through-silicon vias and radio frequency integrated circuit through a plurality of through-silicon vias. A process of assembling the through-silicon vias and radio frequency integrated circuit to the phased-array antenna substrate includes testing the apparatus.
摘要翻译：一种装置包括具有通硅通孔和射频集成电路能力的管芯，并且其与相控阵天线基板垂直集成。穿硅通孔和射频集成电路耦合到布置在相控阵天线基板上的多个天线元件，其中多个天线元件中的每一个天线元件通过一个通孔硅通孔和射频集成电路多个通硅通孔。将穿硅通孔和射频集成电路组装到相控阵天线基板的过程包括测试该装置。

2. 发明申请

US20120280860A1 CHIP PACKAGES INCLUDING THROUGH-SILICON VIA DICE WITH VERTICALLY INEGRATED PHASED-ARRAY ANTENNAS AND LOW-FREQUENCY AND POWER DELIVERY SUBSTRATES 有权
标题翻译：芯片包装，包括通过硅片通过垂直激活的相位阵列天线和低频和电力输送基板
公开(公告)号：US20120280860A1
公开(公告)日：2012-11-08
申请号：US13101883
申请日：2011-05-05
申请人： Telesphor Kamgaing , Valluri R. Rao , Yorgos Palaskas
发明人： Telesphor Kamgaing , Valluri R. Rao , Yorgos Palaskas
IPC分类号： H01Q3/00 , H01P11/00 , H05K13/04
CPC分类号： H01Q3/30 , H01L23/66 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L2223/6677 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06517 , H01L2924/15321 , H01Q1/2283 , H01Q9/0414 , H01Q21/065 , H01Q23/00 , Y10T29/49004 , Y10T29/49018
摘要： An apparatus includes a die with through-silicon vias and radio frequency integrated circuit capabilities and it is vertically integrated with a phased-array antenna substrate. The through-silicon via and a radio frequency integrated circuit is coupled to a plurality of antenna elements disposed on the phased-array antenna substrate where each of the plurality of antenna elements is coupled to the through-silicon vias and radio frequency integrated circuit through a plurality of through-silicon vias. A process of assembling the through-silicon vias and radio frequency integrated circuit to the phased-array antenna substrate includes testing the apparatus.
摘要翻译：一种装置包括具有通硅通孔和射频集成电路能力的管芯，并且其与相控阵天线基板垂直集成。穿硅通孔和射频集成电路耦合到布置在相控阵天线基板上的多个天线元件，其中多个天线元件中的每一个天线元件通过一个通孔硅通孔和射频集成电路多个通硅通孔。将穿硅通孔和射频集成电路组装到相控阵天线基板的过程包括测试该装置。

3. 发明授权

US07729445B2 Digital outphasing transmitter architecture 有权
标题翻译：数字异相发射机架构
公开(公告)号：US07729445B2
公开(公告)日：2010-06-01
申请号：US11528812
申请日：2006-09-27
申请人： Ashoke Ravi , Mostafa A. Elmala , Richard B. Nicholls , Yorgos Palaskas , Krishnamurthy Soumyanath , Dinesh Somasekhar
发明人： Ashoke Ravi , Mostafa A. Elmala , Richard B. Nicholls , Yorgos Palaskas , Krishnamurthy Soumyanath , Dinesh Somasekhar
IPC分类号： H04K1/02
CPC分类号： H04L27/361 , H03F1/0294 , H03F3/211 , H03F3/245 , H04L27/368
摘要： Architectures including digital outphasing transmitters. Digital signal generation circuitry generates at least two base-band sinusoid signals. Bandpass modulation circuitry is coupled to receive the base-band sinusoid signals and generates at least two modulated digital signals. Power amplifiers are coupled to receive the modulated digital signals to amplify the modulated digital signals. The amplified modulated signals are combined and transmitted.
摘要翻译：架构包括数字异相变送器。数字信号产生电路产生至少两个基带正弦信号。带通调制电路被耦合以接收基带正弦信号并产生至少两个调制的数字信号。功率放大器被耦合以接收经调制的数字信号以放大调制的数字信号。放大的调制信号被组合并传输。

4. 发明申请

US20080075194A1 Digital outphasing transmitter architecture 有权
标题翻译：数字异相发射机架构
公开(公告)号：US20080075194A1
公开(公告)日：2008-03-27
申请号：US11528812
申请日：2006-09-27
申请人： Ashoke Ravi , Mostafa A. Elmala , Richard B. Nicholls , Yorgos Palaskas , Krishnamurthy Soumyanath , Dinesh Somasekhar
发明人： Ashoke Ravi , Mostafa A. Elmala , Richard B. Nicholls , Yorgos Palaskas , Krishnamurthy Soumyanath , Dinesh Somasekhar
IPC分类号： H04L25/49
CPC分类号： H04L27/361 , H03F1/0294 , H03F3/211 , H03F3/245 , H04L27/368
摘要： Architectures including digital outphasing transmitters.
摘要翻译：架构包括数字异相变送器。

5. 发明授权

US08098726B2 Subranging for a pulse position and pulse width modulation based transmitter 有权
标题翻译：基于脉冲位置和基于脉宽调制的发射机的分组
公开(公告)号：US08098726B2
公开(公告)日：2012-01-17
申请号：US12176646
申请日：2008-07-21
申请人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
发明人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
IPC分类号： H03K7/08
CPC分类号： H03K7/10 , H03F3/2178 , H04B1/0483 , H04L25/4902
摘要： Briefly, in accordance with one or more embodiments, in a pulse position and pulse position modulation out-phasing transmitter, the range of the phase angle, theta, may be divided into more than one range to drive a first power amplifier with a first range of theta, and to drive a second power amplifier with a second range of theta. In one or more embodiments, a main power amplifier is driven with a first phase range having a higher probability density function, and an overload power amplifier is driven with a first phase range having a lower probability density function. In one or more embodiments, a full adder may be used to combine the two phases wherein the sum signal is used to drive the main power amplifier, and the carry signal is used to drive the overload power amplifier.
摘要翻译：简而言之，根据一个或多个实施例，在脉冲位置和脉冲位置调制输出相位变送器中，相位角θ的范围可被划分成多于一个范围以驱动具有第一范围的第一功率放大器的θ，并驱动具有θ的第二范围的第二功率放大器。在一个或多个实施例中，主功率放大器由具有较高概率密度函数的第一相位范围驱动，而过载功率放大器由具有较低概率密度函数的第一相位范围驱动。在一个或多个实施例中，全加器可以用于组合两相，其中求和信号用于驱动主功率放大器，并且进位信号用于驱动过载功率放大器。

6. 发明申请

US20070279225A1 Non-backscatter passive RFID 审中-公开
标题翻译：无反向散射无源RFID
公开(公告)号：US20070279225A1
公开(公告)日：2007-12-06
申请号：US11443592
申请日：2006-05-30
申请人： Stefano Pellerano , Javier Alvarado , Yorgos Palaskas
发明人： Stefano Pellerano , Javier Alvarado , Yorgos Palaskas
IPC分类号： G08B13/14
CPC分类号： G06K19/0723 , G06K19/0707
摘要： A radio frequency identification (RFID) system may use passive RFID tags that harvest electrical energy from a received signal and store that harvested electrical energy in a capacitor. The stored electrical energy may then be used to transmit from the RFID tag after the received signal has stopped. To decrease the size of the capacitor that is needed, the RFID tag may transmit only briefly, and then use a subsequent received signal to charge up the capacitor for another brief transmission. In some embodiments, each transmission only represents a single binary bit, but a series of such transmissions may be used to transmit multiple bits. Some embodiments may use a radio frequency of 10's of gigahertz.
摘要翻译：射频识别（RFID）系统可以使用无源RFID标签，其从接收到的信号中收集电能并将收集的电能存储在电容器中。然后，所存储的电能可以在接收信号停止之后用于从RFID标签发送。为了减小所需的电容器的尺寸，RFID标签可以仅短暂地传输，然后使用随后的接收信号对电容器充电以进行另一短暂的传输。在一些实施例中，每个传输仅表示单个二进制位，但是可以使用一系列这样的传输来传输多个位。一些实施例可以使用千兆赫兹的10的射频。

7. 发明授权

US07907018B2 Phase noise minimized phase/frequency-locked voltage-controlled oscillator circuit 有权
标题翻译：相位噪声最小相/锁频压控振荡电路
公开(公告)号：US07907018B2
公开(公告)日：2011-03-15
申请号：US12579149
申请日：2009-10-14
申请人： Stefano Pellerano , Ashoke Ravi , Yorgos Palaskas
发明人： Stefano Pellerano , Ashoke Ravi , Yorgos Palaskas
IPC分类号： H03L7/099
CPC分类号： H03L7/099 , H03L7/0995 , H03L7/18 , H03L2207/06
摘要： A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise minimization circuit includes a noise power meter to analyze the control voltage fed into the VCO by the feedback system and determine its voltage noise power. Since the VCO is controlled by the feedback system, the control voltage noise power is also an indication of the VCO phase noise power for frequencies offset within the bandwidth of the feedback system. The VCO has several parameters that can be adjusted to affect its phase noise. A minimization algorithm generates the optimum set of parameters that minimize the control voltage noise power (and thus the VCO phase noise power), and sends them to the oscillator. The phase noise minimization circuit may be used in a variety of applications, particularly in phase-locked loop and frequency-locked loop VCOs.
摘要翻译：公开了一种用于嵌入在反馈系统中的压控振荡器（VCO）电路中的相位噪声最小化电路。相位噪声最小化电路包括噪声功率计，用于分析由反馈系统馈送到VCO的控制电压并确定其电压噪声功率。由于VCO由反馈系统控制，所以控制电压噪声功率也是在反馈系统的带宽内偏移的频率的VCO相位噪声功率的指示。 VCO具有几个参数，可以调整以影响其相位噪声。最小化算法生成最小化控制电压噪声功率（从而使VCO相位噪声功率）最小化的最佳参数集，并将其发送到振荡器。相位噪声最小化电路可以用于各种应用中，特别是在锁相环和锁相环VCO中。

8. 发明申请

US20090034603A1 SUBRANGING FOR A PULSE POSITION AND PULSE WIDTH MODULATION BASED TRANSMITTER 有权
标题翻译：用于脉冲位置和脉冲宽度调制的发射机的SUBRANGING
公开(公告)号：US20090034603A1
公开(公告)日：2009-02-05
申请号：US12176646
申请日：2008-07-21
申请人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
发明人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
IPC分类号： H03K7/08
CPC分类号： H03K7/10 , H03F3/2178 , H04B1/0483 , H04L25/4902
摘要： Briefly, in accordance with one or more embodiments, in a pulse position and pulse position modulation out-phasing transmitter, the range of the phase angle, theta, may be divided into more than one range to drive a first power amplifier with a first range of theta, and to drive a second power amplifier with a second range of theta. In one or more embodiments, a main power amplifier is driven with a first phase range having a higher probability density function, and an overload power amplifier is driven with a first phase range having a lower probability density function. In one or more embodiments, a full adder may be used to combine the two phases wherein the sum signal is used to drive the main power amplifier, and the carry signal is used to drive the overload power amplifier.
摘要翻译：简而言之，根据一个或多个实施例，在脉冲位置和脉冲位置调制输出相位变送器中，相位角θ的范围可被划分成多于一个范围以驱动具有第一范围的第一功率放大器的θ，并驱动具有θ的第二范围的第二功率放大器。在一个或多个实施例中，主功率放大器由具有较高概率密度函数的第一相位范围驱动，而过载功率放大器由具有较低概率密度函数的第一相位范围驱动。在一个或多个实施例中，全加器可以用于组合两相，其中求和信号用于驱动主功率放大器，并且进位信号用于驱动过载功率放大器。

9. 发明申请

US20100033257A1 PHASE NOISE MINIMIZED PHASE/FREQUENCY-LOCKED VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT 有权
标题翻译：相位噪声最小相位/频率锁定电压控制振荡器电路
公开(公告)号：US20100033257A1
公开(公告)日：2010-02-11
申请号：US12579149
申请日：2009-10-14
申请人： Stefano Pellerano , Ashoke Ravi , Yorgos Palaskas
发明人： Stefano Pellerano , Ashoke Ravi , Yorgos Palaskas
IPC分类号： H03L7/00
CPC分类号： H03L7/099 , H03L7/0995 , H03L7/18 , H03L2207/06
摘要： A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise minimization circuit includes a noise power meter to analyze the control voltage fed into the VCO by the feedback system and determine its voltage noise power. Since the VCO is controlled by the feedback system, the control voltage noise power is also an indication of the VCO phase noise power for frequencies offset within the bandwidth of the feedback system. The VCO has several parameters that can be adjusted to affect its phase noise. A minimization algorithm generates the optimum set of parameters that minimize the control voltage noise power (and thus the VCO phase noise power), and sends them to the oscillator. The phase noise minimization circuit may be used in a variety of applications, particularly in phase-locked loop and frequency-locked loop VCOs.
摘要翻译：公开了一种用于嵌入在反馈系统中的压控振荡器（VCO）电路中的相位噪声最小化电路。相位噪声最小化电路包括噪声功率计，用于分析由反馈系统馈送到VCO的控制电压并确定其电压噪声功率。由于VCO由反馈系统控制，所以控制电压噪声功率也是在反馈系统的带宽内偏移的频率的VCO相位噪声功率的指示。 VCO具有几个参数，可以调整以影响其相位噪声。最小化算法生成最小化控制电压噪声功率（从而使VCO相位噪声功率）最小化的最佳参数集，并将其发送到振荡器。相位噪声最小化电路可以用于各种应用中，特别是在锁相环和锁相环VCO中。

10. 发明申请

US20080284530A1 PHASE NOISE MINIMIZED PHASE/FREQUENCY-LOCKED VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT 审中-公开
标题翻译：相位噪声最小相位/频率锁定电压控制振荡器电路
公开(公告)号：US20080284530A1
公开(公告)日：2008-11-20
申请号：US11747927
申请日：2007-05-14
申请人： Stefano PELLERANO , Ashoke Ravi , Yorgos Palaskas
发明人： Stefano PELLERANO , Ashoke Ravi , Yorgos Palaskas
IPC分类号： H03L7/099
CPC分类号： H03L7/099 , H03L7/0995 , H03L7/18 , H03L2207/06
摘要： A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise minimization circuit includes a noise power meter to analyze the control voltage fed into the VCO by the feedback system and determine its voltage noise power. Since the VCO is controlled by the feedback system, the control voltage noise power is also an indication of the VCO phase noise power for frequencies offset within the bandwidth of the feedback system. The VCO has several parameters that can be adjusted to affect its phase noise. A minimization algorithm generates the optimum set of parameters that minimize the control voltage noise power (and thus the VCO phase noise power), and sends them to the oscillator. The phase noise minimization circuit may be used in a variety of applications, particularly in phase-locked loop and frequency-locked loop VCOs.
摘要翻译：公开了一种用于嵌入在反馈系统中的压控振荡器（VCO）电路中的相位噪声最小化电路。相位噪声最小化电路包括噪声功率计，用于分析由反馈系统馈送到VCO的控制电压并确定其电压噪声功率。由于VCO由反馈系统控制，所以控制电压噪声功率也是在反馈系统的带宽内偏移的频率的VCO相位噪声功率的指示。 VCO具有几个参数，可以调整以影响其相位噪声。最小化算法生成最小化控制电压噪声功率（从而使VCO相位噪声功率）最小化的最佳参数集，并将其发送到振荡器。相位噪声最小化电路可以用于各种应用中，特别是在锁相环和锁相环VCO中。

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