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1. 发明授权

US07025615B2 Fabrication method, varactor, and integrated circuit 有权
标题翻译：制造方法，变容二极管和集成电路
公开(公告)号：US07025615B2
公开(公告)日：2006-04-11
申请号：US10873781
申请日：2004-06-22
申请人： Ted Johansson , Hans Norström , Stefan Sahl
发明人： Ted Johansson , Hans Norström , Stefan Sahl
IPC分类号： H01L21/20
CPC分类号： H01L29/93
摘要： A method in the fabrication of an integrated bipolar circuit for forming a p/n-junction varactor is disclosed. The method featuring the steps of providing a p-doped substrate (10; 10, 41); forming a buried n+-doped region (31) in the substrate; forming in the substrate an n-doped region (41) above the buried n+-doped region (31); forming field isolation (81) around the n-doped region (41); multiple ion implanting the n-doped region (41); forming a p+-doped region (151) on the n-doped region (41); forming an n+-doped contact region to the buried n+-doped region (31), the contact region being separated from the n-doped region (41); and heat treating the hereby obtained structure to set the doping profiles of the doped regions. The multiple ion implantation of the n-doped region (41); the formation of the p+-doped region (151); and the heat treatment are performed to obtain a hyper-abrupt p+/n-junction within the n-doped region (41).
摘要翻译：公开了一种用于形成p / n结变容二极管的集成双极性电路的制造方法。该方法的特征在于提供p掺杂衬底（10; 10,41）的步骤; 在衬底中形成掩埋的n + +掺杂区域（31）; 在衬底上形成掩埋的n + +掺杂区域（31）之上的n掺杂区域（41）; 在所述n掺杂区域（41）周围形成场隔离（81）。多个离子注入n掺杂区域（41）; 在所述n掺杂区域（41）上形成p + +掺杂区域（151）。形成n + +掺杂的接触区域到掩埋的n + +掺杂区域（31），所述接触区域与n掺杂区域（41）分离; 并对由此获得的结构进行热处理以设定掺杂区域的掺杂分布。 n掺杂区域（41）的多次离子注入; 形成p + +掺杂区域（151）; 并执行热处理以在n掺杂区域（41）内获得超突变的p + SUP / N / N结。

2. 发明授权

US08768280B2 Method and apparatus relating to signal control 有权
标题翻译：与信号控制相关的方法和装置
公开(公告)号：US08768280B2
公开(公告)日：2014-07-01
申请号：US13509826
申请日：2009-12-30
申请人： Stefan Sahl
发明人： Stefan Sahl
IPC分类号： H04B1/26 , H04B15/00 , H04B1/18 , H03J7/04 , H03G3/30
CPC分类号： H03G3/3052 , H03J7/04
摘要： The present invention relates to automatic gain control methods and apparatus for controlling a signal level of a signal at a predetermined location in a signal path of a receiver chain. An automatic gain controller comprises a local signal modifier device for selecting based on an error signal and an oscillator signal from a plurality of alternative oscillator signals, and for providing the selected oscillator signal to a signal mixer located in the receiver chain upstream of said predetermined location for frequency translation of an input signal to said signal mixer.
摘要翻译：本发明涉及一种自动增益控制方法和装置，用于控制在接收机链的信号路径中的预定位置处的信号的信号电平。自动增益控制器包括本地信号修正器装置，用于基于来自多个替代振荡器信号的误差信号和振荡器信号进行选择，并且将所选择的振荡器信号提供给位于所述预定位置上游的接收机链路中的信号混合器用于将输入信号频率转换到所述信号混频器。

3. 发明授权

US5633878A Self-diagnostic data buffers 失效
标题翻译：自诊断数据缓冲区
公开(公告)号：US5633878A
公开(公告)日：1997-05-27
申请号：US376147
申请日：1995-01-20
申请人： Mats Ernkell , Stefan Sahl
发明人： Mats Ernkell , Stefan Sahl
IPC分类号： G06F11/22 , G06F5/10 , G06F5/12 , G06F11/10 , G11C29/00 , G06F11/00
CPC分类号： G06F5/10 , G06F11/1008 , G11C29/88
摘要： A self-diagnostic asynchronous data buffer includes an addressable buffer having a write address determined by a write counter and a read address determined by a read counter. A write clock controls storage into the buffer and updating of the write counter. A read clock controls reading from the buffer and updating of the read counter. The self-diagnostic asynchronous data buffer additionally has a test register, an address counter, and a state machine. To determine whether a hardware fault exists, the state machine compares the address counter output with the output of the write counter. When the two are equal, the next write to the addressable buffer causes the input data to also be stored in the test register. Next, the address counter output is compared with the output of the read counter. When the two addresses are equal, the output data from the addressable buffer is compared to the value stored in the test register. Inequality between these two values indicates a hardware fault. In an alternative embodiment, a parallel asynchronous data buffer operates by storing into a parity register a parity value of the input data, rather than the input data itself. When the address counter output is equal to the output address of the read counter, parity of the output data from the data buffer is computed and then compared with the value stored in the parity register. Inequality between these two values indicates a hardware fault.
摘要翻译：自诊断异步数据缓冲器包括具有由写计数器确定的写入地址的可寻址缓冲器和由读取计数器确定的读取地址。写入时钟将存储器控制到缓冲区并更新写入计数器。读时钟控制从缓冲器的读取和读取计数器的更新。自诊断异步数据缓冲器还具有测试寄存器，地址计数器和状态机。为了确定是否存在硬件故障，状态机将地址计数器输出与写计数器的输出进行比较。当两者相等时，下一次写入可寻址缓冲区会导致输入数据也存储在测试寄存器中。接下来，将地址计数器输出与读计数器的输出进行比较。当两个地址相等时，来自可寻址缓冲器的输出数据与存储在测试寄存器中的值进行比较。这两个值之间的不等式表示硬件故障。在替代实施例中，并行异步数据缓冲器通过将输入数据的奇偶校验值而不是输入数据本身存入奇偶校验寄存器来进行操作。当地址计数器输出等于读计数器的输出地址时，计算来自数据缓冲器的输出数据的奇偶性，然后与存储在奇偶寄存器中的值进行比较。这两个值之间的不等式表示硬件故障。

4. 发明申请

US20120264386A1 METHOD AND APPARATUS RELATING TO SIGNAL CONTROL 有权
标题翻译：与信号控制相关的方法和装置
公开(公告)号：US20120264386A1
公开(公告)日：2012-10-18
申请号：US13509826
申请日：2009-12-30
申请人： Stefan Sahl
发明人： Stefan Sahl
IPC分类号： H04B1/06 , H04B17/00
CPC分类号： H03G3/3052 , H03J7/04
摘要： The present invention relates to automatic gain control methods and apparatus for controlling a signal level of a signal at a predetermined location in a signal path of a receiver chain. An automatic gain controller comprises a local signal modifier device for selecting based on an error signal eg and an oscillator signal from a plurality of alternative oscillator signals, and for providing the selected oscillator signal as to a signal mixer located in the receiver chain upstream of said predetermined location for frequency translation of an input signal to said signal mixer.
摘要翻译：本发明涉及一种自动增益控制方法和装置，用于控制在接收机链的信号路径中的预定位置处的信号的信号电平。一种自动增益控制器包括一个本地信号修正装置，用于根据来自多个替代振荡器信号的一个误差信号和一个振荡器信号进行选择，并提供所选择的振荡器信号，该信号混合器位于所述接收机链上游的所述接收机链路中用于将输入信号频率转换到所述信号混合器的预定位置。

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