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1. 发明授权

US08710643B2 Electronic package with fluid flow barriers 失效
标题翻译：电子封装带流体阻流阀
公开(公告)号：US08710643B2
公开(公告)日：2014-04-29
申请号：US13019815
申请日：2011-02-02
申请人： Teck-Gyu Kang , Yuan Li , Yuanlin Xie
发明人： Teck-Gyu Kang , Yuan Li , Yuanlin Xie
IPC分类号： H01L23/22
CPC分类号： H01L21/563 , H01L23/16 , H01L2224/16225 , H01L2224/26175 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/15311 , H01L2924/19105 , H01L2924/00 , H01L2924/00012
摘要： The present invention is directed to a method and electronic computer package that is formed by placing an integrated circuit, having a plurality of bonding pads with solder bumps deposited thereon, in contact with the substrate so that one of the plurality of solder bumps is in superimposition with respect to one of the contacts and one of the plurality of bonding pads, with a volume being defined between region of the substrate in superimposition with the integrated circuit. A portion of the volume is filled with a quantity of underfill. A fluid flow bather is formed on the substrate and defines a perimeter of the volume, defining a flow restricted region. The fluid flow barrier has dimensions sufficient to control the quantity of underfill egressing from the flow restricted region.
摘要翻译：本发明涉及一种方法和电子计算机包装，其通过放置集成电路而形成，所述集成电路具有多个焊料焊盘，其上沉积有焊料凸块，与衬底接触，使得多个焊料凸块中的一个叠加相对于触点之一和多个接合焊盘中的一个，其中在与集成电路叠加的基板的区域之间限定了体积。体积的一部分充满了一定量的底部填充物。在衬底上形成流体流动泳池并且限定容积的周长，限定流动限制区域。流体流动阻挡层具有足以控制从流动限制区域排出的底部填充物的量的尺寸。

2. 发明申请

US20110204476A1 Electronic Package with Fluid Flow Barriers 失效
标题翻译：具有流体流动障碍的电子封装
公开(公告)号：US20110204476A1
公开(公告)日：2011-08-25
申请号：US13019815
申请日：2011-02-02
申请人： Teck-Gyu Kang , Yuan Li , Yuanlin Xie
发明人： Teck-Gyu Kang , Yuan Li , Yuanlin Xie
IPC分类号： H01L29/02
CPC分类号： H01L21/563 , H01L23/16 , H01L2224/16225 , H01L2224/26175 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/15311 , H01L2924/19105 , H01L2924/00 , H01L2924/00012
摘要： The present invention is directed to a method and electronic computer package that is formed by placing an integrated circuit, having a plurality of bonding pads with solder bumps deposited thereon, in contact with the substrate so that one of the plurality of solder bumps is in superimposition with respect to one of the contacts and one of the plurality of bonding pads, with a volume being defined between region of the substrate in superimposition with the integrated circuit. A portion of the volume is filled with a quantity of underfill. A fluid flow bather is formed on the substrate and defines a perimeter of the volume, defining a flow restricted region. The fluid flow barrier has dimensions sufficient to control the quantity of underfill egressing from the flow restricted region.
摘要翻译：本发明涉及一种方法和电子计算机包装，该方法和电子计算机包装通过放置集成电路而形成，该集成电路具有多个焊盘，其上沉积有焊料凸块，与衬底接触，使得多个焊料凸块中的一个叠加相对于触点之一和多个接合焊盘中的一个，其中在与集成电路叠加的基板的区域之间限定了体积。体积的一部分充满了一定量的底部填充物。在衬底上形成流体流动泳池并且限定容积的周长，限定流动限制区域。流体流动阻挡层具有足以控制从流动限制区域排出的底部填充物的量的尺寸。

3. 发明授权

US07883937B1 Electronic package and method of forming the same 有权
标题翻译：电子封装及其形成方法
公开(公告)号：US07883937B1
公开(公告)日：2011-02-08
申请号：US11742521
申请日：2007-04-30
申请人： Teck-Gyu Kang , Yuan Li , Yuanlin Xie
发明人： Teck-Gyu Kang , Yuan Li , Yuanlin Xie
IPC分类号： H01L21/00
CPC分类号： H01L21/563 , H01L23/16 , H01L2224/16225 , H01L2224/26175 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/15311 , H01L2924/19105 , H01L2924/00 , H01L2924/00012
摘要： The present invention is directed to a method and electronic computer package that is formed by placing an integrated circuit, having a plurality of bonding pads with solder bumps deposited thereon, in contact with the substrate so that one of the plurality of solder bumps is in superimposition with respect to one of the contacts and one of the plurality of bonding pads, with a volume being defined between region of the substrate in superimposition with the integrated circuit. A portion of the volume is filled with a quantity of underfill. A fluid flow barrier is formed on the substrate and defines a perimeter of the volume, defining a flow restricted region. The fluid flow barrier has dimensions sufficient to control the quantity of underfill egressing from the flow restricted region.
摘要翻译：本发明涉及一种方法和电子计算机包装，该方法和电子计算机包装通过放置集成电路而形成，该集成电路具有多个焊盘，其上沉积有焊料凸块，与衬底接触，使得多个焊料凸块中的一个叠加相对于触点之一和多个接合焊盘中的一个，其中在与集成电路叠加的基板的区域之间限定了体积。体积的一部分充满了一定量的底部填充物。在衬底上形成流体阻流层，并限定了体积的周长，限定了流动限制区域。流体流动阻挡层具有足以控制从流动限制区域排出的底部填充物的量的尺寸。

4. 发明授权

US08198699B1 Integrated circuit package with non-solder mask defined like pads 有权
标题翻译：集成电路封装，非焊锡掩模定义为焊盘
公开(公告)号：US08198699B1
公开(公告)日：2012-06-12
申请号：US12762958
申请日：2010-04-19
申请人： Yuanlin Xie , Yuan Li
发明人： Yuanlin Xie , Yuan Li
IPC分类号： H01L21/70
CPC分类号： H01L23/49816 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/48227
摘要： Provided is an IC package. In one implementation, the IC package includes a metal pad having a first metal pad surface and a second metal pad surface substantially parallel to the first metal pad surface; a first dielectric layer having a first surface, a second surface, and a third surface, where the first dielectric layer covers a first end portion of the second metal pad surface, and the third surface of the first dielectric layer is substantially parallel to the first and second surfaces of the first dielectric layer; a second dielectric layer having a first surface, a second surface, and a third surface, where the second dielectric layer covers a second end portion of the second metal pad surface, and the third surface of the second dielectric layer is substantially parallel to the first and second surfaces of the second dielectric layer; and a metal structure covering a middle portion of the second metal pad surface, a first end portion of the third surface of the first dielectric layer, and a first end portion of the third surface of the second dielectric layer.
摘要翻译：提供了一个IC封装。在一个实施方案中，IC封装包括具有第一金属焊盘表面和基本上平行于第一金属焊盘表面的第二金属焊盘表面的金属焊盘; 具有第一表面，第二表面和第三表面的第一电介质层，其中所述第一电介质层覆盖所述第二金属焊盘表面的第一端部，并且所述第一电介质层的所述第三表面基本上平行于所述第一电介质层和第一介电层的第二表面; 具有第一表面，第二表面和第三表面的第二介电层，其中所述第二介电层覆盖所述第二金属焊盘表面的第二端部，并且所述第二介电层的所述第三表面基本上平行于所述第一表面和第二介电层的第二表面; 以及覆盖第二金属焊盘表面的中间部分，第一电介质层的第三表面的第一端部分和第二电介质层的第三表面的第一端部的金属结构。

5. 发明申请

US20180267929A1 Reconfigurable Parallel Processing 审中-公开
公开(公告)号：US20180267929A1
公开(公告)日：2018-09-20
申请号：US15919681
申请日：2018-03-13
申请人： Yuan Li , Jianbin Zhu
发明人： Yuan Li , Jianbin Zhu
IPC分类号： G06F15/80 , G06F9/30
摘要： Processors, systems and methods are provided for thread level parallel processing. A processor may comprise a plurality of processing elements (PEs) that each may comprise a configuration buffer, a sequencer coupled to the configuration buffer of each of the plurality of PEs and configured to distribute one or more PE configurations to the plurality of PEs, and a gasket memory coupled to the plurality of PEs and being configured to store at least one PE execution result to be used by at least one of the plurality of PEs during a next PE configuration.

6. 发明授权

US09805265B2 Surveillance camera control device and video surveillance system 有权
公开(公告)号：US09805265B2
公开(公告)日：2017-10-31
申请号：US14403771
申请日：2012-05-30
申请人： Masaya Itoh , Ryo Yumiba , Yuan Li
发明人： Masaya Itoh , Ryo Yumiba , Yuan Li
IPC分类号： G06K9/00 , H04N7/18 , G08B13/196
CPC分类号： G06K9/00718 , G06K9/00771 , G06K2009/00738 , G08B13/19641 , G08B13/19693 , H04N7/181
摘要： In a video surveillance system, confirming videos from plurality of cameras causes a heavy burden on surveillance officers, and it is difficult to select a suitable video for observation.A video surveillance system includes a plurality of cameras which pick up images in a surveillance area, and a recognition unit which detects an object from videos acquired by the plurality of cameras. In the case where an object is detected in a surveillance area where images are picked up duplicately by the plurality of cameras, the recognition unit acquires a recognition result that is a feature quantity of the object for each camera. A display selection unit is, provided which, on the basis of the recognition result and a degree of priority of the recognition result, prioritizes the video from each of the cameras according to the degree of priority.

7. 发明授权

US08918695B2 Methods and apparatus for early stop algorithm of turbo decoding 有权
标题翻译： turbo解码的早期停止算法的方法和装置
公开(公告)号：US08918695B2
公开(公告)日：2014-12-23
申请号：US12973951
申请日：2010-12-21
申请人： Yuan Li , Jianbin Zhu , Tao Zhang
发明人： Yuan Li , Jianbin Zhu , Tao Zhang
IPC分类号： H03M13/00 , H04L1/00
CPC分类号： H04L1/005 , H04L1/006
摘要： Methods and apparatus for early stop algorithm of turbo decoding are disclosed. An example method comprises of combination of comparing of hard decisions of soft outputs of the current iteration and the previous iteration and comparing the minimum log likelihood results against a threshold. The decoding iteration is stopped once the hard decisions are matched and the minimum soft decoding result exceeds a threshold.
摘要翻译：公开了用于turbo解码的早期停止算法的方法和装置。一个示例性方法包括将当前迭代的软输出的硬判决与先前迭代进行比较并将最小对数似然结果与阈值进行比较的组合。一旦硬判决匹配并且最小软解码结果超过阈值，则停止解码迭代。

8. 发明授权

US08896124B2 Via network structures and method therefor 有权
标题翻译：通过网络结构及其方法
公开(公告)号：US08896124B2
公开(公告)日：2014-11-25
申请号：US13079579
申请日：2011-04-04
申请人： Yuan Li , Som Nath , Maarten Jeroen Van Dort
发明人： Yuan Li , Som Nath , Maarten Jeroen Van Dort
IPC分类号： H01L23/48 , H01L23/52 , H01L23/00
CPC分类号： H01L21/76877 , H01L21/76805 , H01L24/05 , H01L2224/02166 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05025 , H01L2224/05086 , H01L2224/05088 , H01L2224/05093 , H01L2224/05096 , H01L2224/05098 , H01L2224/05556 , H01L2224/45124 , H01L2924/00013 , H01L2924/00014 , H01L2924/01029 , H01L2924/01074 , H01L2924/01022 , H01L2924/01007 , H01L2924/01073 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/48
摘要： A circuit device is configured with robust circuit connectors. In connection with various example embodiments, an integrated circuit device includes one or more via network layers below a bond pad contact, connecting the bond pad contact with one or more underlying metal layers. Each via network layer includes a plurality of via strips extending about parallel to the bond pad contact and in different directions to structurally support the bond pad contact.
摘要翻译：电路设备配置有鲁棒的电路连接器。结合各种示例实施例，集成电路器件包括在接合焊盘触点下方的一个或多个通孔网络层，将接合焊盘触点与一个或多个下面的金属层相连接。每个通孔网络层包括多个通孔，其平行于接合焊盘触点并沿不同的方向延伸，以在结构上支撑接合焊盘触点。

9. 发明授权

US08829245B2 3-aminomethyl-3, 5, 5-trimethyl cyclohexylamine preparation method 有权
标题翻译： 3-氨基甲基-3,5,5-三甲基环己胺制备方法
公开(公告)号：US08829245B2
公开(公告)日：2014-09-09
申请号：US14113907
申请日：2011-09-06
申请人： Changsheng Chen , Yuan Li , Wenjuan Zhao , Hongyin Cui , Weiqi Hua
发明人： Changsheng Chen , Yuan Li , Wenjuan Zhao , Hongyin Cui , Weiqi Hua
IPC分类号： C07C209/48 , C07C209/62 , C07C211/36
CPC分类号： C07C209/62 , C07C209/48 , C07C209/52 , C07C211/36 , C07C253/30 , C07C2601/14 , C07C255/61 , C07C255/46
摘要： Provided is a 3-aminomethyl-3,5,5-trimethylcyclohexylamine preparation method. A feeding flow of 3-cyano-3,5,5-trimethylcyclohexylamine is reacted with NH3 and hydrogen in the presence of a hydrogenation catalyst; the method is characterized by: firstly adding a basic compound to the feeding flow of 3-cyano-3,5,5-trimethylcyclohexylamine, and then after a portion of 3-cyano-3,5,5-trimethylcyclohexylamine has reacted, adding an acidic compound to reaction materials for further hydrogenation reaction to prepare the product. The method ensures that the aminonitrile content in the product is low, thus effectively reducing the duration of the reaction and greatly reducing the consumption of the catalyst during the hydrogenation reaction process.
摘要翻译：提供了3-氨基甲基-3,5,5-三甲基环己胺的制备方法。在氢化催化剂存在下，使3-氰基-3,5,5-三甲基环己胺的进料流与NH 3和氢气反应; 该方法的特征在于：首先向3-氰基-3,5,5-三甲基环己胺的进料流中加入碱性化合物，然后在一部分3-氰基-3,5,5-三甲基环己胺反应后，加入酸性化合物与反应物进行进一步氢化反应制备产物。该方法可确保产品中的氨腈含量低，有效降低反应持续时间，大大降低催化剂在氢化反应过程中的消耗。

10. 发明授权

US08806310B2 Rate matching and de-rate matching on digital signal processors 有权
标题翻译：数字信号处理器的速率匹配和去速率匹配
公开(公告)号：US08806310B2
公开(公告)日：2014-08-12
申请号：US13100190
申请日：2011-05-03
申请人： Yuan Li , Julien Nicolas , Jianbin Zhu
发明人： Yuan Li , Julien Nicolas , Jianbin Zhu
IPC分类号： H03M13/03 , H04L1/00
CPC分类号： H04L1/0068
摘要： Provided are systems and methods for rate matching and de-rate matching on digital signal processors. For example, there is a system for rate matching and de-rate matching, where the system includes a memory configured to contain a plurality of blocks of data, and a digital signal processor configured to pre-compute permutation parameters common to the plurality of blocks, wherein the plurality of blocks are subject to a set of given puncturing parameters. The digital signal processor is configured to process each block in the plurality of blocks by computing a block signature from pre-computed puncturing thresholds, matching the block signature to one of a set of pre-computed zone signatures, deriving a zone index corresponding to the one matched pre-computed zone signature, and applying pre-computed permutation and puncturing transformations corresponding to the zone index to the block.
摘要翻译：提供了用于数字信号处理器上的速率匹配和去速率匹配的系统和方法。例如，存在用于速率匹配和去速率匹配的系统，其中系统包括被配置为包含多个数据块的存储器，以及数字信号处理器，被配置为预先计算多个块共同的置换参数，其中所述多个块经受一组给定的删截参数。数字信号处理器被配置为通过从预先计算的穿孔阈值计算块签名来处理多个块中的每个块，将块签名与一组预先计算的区域签名中的一个相匹配，导出对应于一个匹配的预先计算的区域签名，并且将对应于区域索引的预先计算的置换和删截变换应用于块。

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