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    • 2. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US6107128A
    • 2000-08-22
    • US324693
    • 1999-06-02
    • Kazutoshi IshiiSumitaka GotouYasuhiro MoyaTatsuya KittaYoshihide Kanakubo
    • Kazutoshi IshiiSumitaka GotouYasuhiro MoyaTatsuya KittaYoshihide Kanakubo
    • H01L29/78H01L21/8238H01L27/092
    • H01L27/0925H01L21/823857
    • Since a field effect MOS transistor can be formed with a reduced number of manufacturing processes, a semiconductor integrated circuit device can be materialized at a low cost. A semiconductor device has a structure in which a gate electrode is provided in the vicinity of the surface of a semiconductor substrate through a gate insulating film, a second conductive type heavily doped impurity region is provided in a region adjacent to a part of the gate electrode through a part of the gate insulating film and a part of a thick oxide film, another second conductive type heavily doped impurity region is provided in a region adjacent to an opposite part of the gate electrode opposing the part of the gate electrode through the part of the gate insulating film and a part of another thick oxide film, and a first conductive type heavily doped impurity region for device isolation is provided so as to surround the gate electrode and the second conductive type heavily doped impurity regions.
    • 由于能够以较少数量的制造工艺形成场效应MOS晶体管,所以能够以低成本实现半导体集成电路器件。 半导体器件具有其中通过栅极绝缘膜在半导体衬底的表面附近设置栅电极的结构,在与栅电极的一部分相邻的区域中设置第二导电型重掺杂杂质区 通过栅极绝缘膜的一部分和厚氧化物膜的一部分,另一个第二导电型重掺杂杂质区设置在与栅电极的与栅电极的一部分相对的相对部分附近的区域中, 设置栅绝缘膜和另一厚氧化膜的一部分,以及用于器件隔离的第一导电型重掺杂杂质区域,以围绕栅电极和第二导电型重掺杂杂质区。