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1. 发明授权

US5666270A Bump electrode, semiconductor integrated circuit device using the same, multi-chip module having the semiconductor integrated circuit devices and method for producing semicondutcor device having the bump electrode 失效
标题翻译：凸起电极，使用该半导体集成电路的半导体集成电路器件，具有半导体集成电路器件的多芯片模块以及具有突起电极的半交互设备的制造方法
公开(公告)号：US5666270A
公开(公告)日：1997-09-09
申请号：US280327
申请日：1994-07-25
申请人： Tatsuharu Matsuda , Masaharu Minamizawa
发明人： Tatsuharu Matsuda , Masaharu Minamizawa
IPC分类号： H01L21/60 , H01L23/485 , H05K7/20
CPC分类号： H01L24/81 , H01L24/11 , H01L24/13 , H01L24/75 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73253 , H01L2224/75 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15312 , H01L2924/16195
摘要： A bump electrode includes a core portion provided on an intermediate electrode layer formed on an electrode pad formed on a surface of an element. The core portion contains a material having a Young's modulus less than that of soldering. An electrically conductive film covers the core portion.
摘要翻译：凸块电极包括设置在形成在元件表面上的电极焊盘上的中间电极层上的芯部。芯部包含杨氏模量低于焊接的材料。导电膜覆盖芯部。

2. 发明授权

US5937277A Semiconductor device with reliable electrodes of projecting shape and method of forming same 失效
标题翻译：具有可靠电极形状的半导体器件及其形成方法
公开(公告)号：US5937277A
公开(公告)日：1999-08-10
申请号：US814106
申请日：1997-03-10
申请人： Tatsuharu Matsuda , Masataka Mizukoshi , Masaharu Minamizawa , Toshiyuki Motooka
发明人： Tatsuharu Matsuda , Masataka Mizukoshi , Masaharu Minamizawa , Toshiyuki Motooka
IPC分类号： H01L21/60 , H01L23/49 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/10 , H01L24/13 , H01L2224/13 , H01L2224/13099 , H01L2224/16 , H01L2224/83192 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/15312 , Y10T29/49169
摘要： A method of forming a semiconductor device having a semiconductor chip having electrodes on which electrode pins are formed includes the steps of forming a complex having the electrode pins fixed in a fixing member, an arrangement of the electrode pins corresponding to that of the electrodes, connecting the electrode pins with the electrodes by mounting the complex on the semiconductor chip, and removing the fixing member from the complex mounted on the semiconductor chip.
摘要翻译：一种形成半导体器件的方法，该半导体器件具有形成电极的电极的半导体芯片，包括以下步骤：形成具有固定在固定部件中的电极引脚的复合体，与电极引脚对应的电极引脚的布置电极引脚与电极通过将复合体安装在半导体芯片上，以及从安装在半导体芯片上的复合体移除固定部件。

3. 发明授权

US5607877A Projection-electrode fabrication method 失效
标题翻译：投影电极制作方法
公开(公告)号：US5607877A
公开(公告)日：1997-03-04
申请号：US321013
申请日：1994-10-06
申请人： Tatsuharu Matsuda , Masaharu Minamizawa
发明人： Tatsuharu Matsuda , Masaharu Minamizawa
IPC分类号： H01L21/60 , H01L23/485 , H01L21/283
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/0237 , H01L2224/114 , H01L2224/11436 , H01L2224/1161 , H01L2224/1302 , H01L2224/13022 , H01L2224/13124 , H01L2224/13644 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/3025
摘要： A projection-electrode fabrication method having the steps of: (a) fabricating at least one projection electrode directly on a substrate; and (b) forming a semiconductor circuit layer adjacent to the projection electrode on the substrate so as to contact at least one projection electrode after the step of fabricating the projection electrode. The projection electrode is projected higher as compared to the semiconductor circuit layer.
摘要翻译：一种投影电极制造方法，具有以下步骤：（a）直接在基板上制造至少一个投影电极; 以及（b）在所述基板上形成与所述投影电极相邻的半导体电路层，以在制造所述投影电极的步骤之后接触至少一个投影电极。与半导体电路层相比，投影电极投射得更高。

4. 发明授权

US5637535A Semiconductor device with reliable electrodes of projecting shape and method of forming same 失效
标题翻译：具有可靠电极形状的半导体器件及其形成方法
公开(公告)号：US5637535A
公开(公告)日：1997-06-10
申请号：US371370
申请日：1995-01-11
申请人： Tatsuharu Matsuda , Masataka Mizukoshi , Masaharu Minamizawa , Toshiyuki Motooka
发明人： Tatsuharu Matsuda , Masataka Mizukoshi , Masaharu Minamizawa , Toshiyuki Motooka
IPC分类号： H01L21/60 , H01L23/49
CPC分类号： H01L24/10 , H01L24/13 , H01L2224/13 , H01L2224/13099 , H01L2224/16 , H01L2224/83192 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/15312 , Y10T29/49169
摘要： A method of forming a semiconductor device having a semiconductor chip having electrodes on which electrode pins are formed includes the steps of forming a complex having the electrode pins fixed in a fixing member, an arrangement of the electrode pins corresponding to that of the electrodes, connecting the electrode pins with the electrodes by mounting the complex on the semiconductor chip, and removing the fixing member from the complex mounted on the semiconductor chip.
摘要翻译：一种形成半导体器件的方法，该半导体器件具有形成电极的电极的半导体芯片，包括以下步骤：形成具有固定在固定部件中的电极引脚的复合体，与电极引脚对应的电极引脚的布置电极引脚与电极通过将复合体安装在半导体芯片上，以及从安装在半导体芯片上的复合体移除固定部件。

5. 发明授权

US5574311A Device having pins formed of hardened mixture of conductive metal particle and resin 失效
标题翻译：具有由导电金属颗粒和树脂的硬化混合物形成的销的装置
公开(公告)号：US5574311A
公开(公告)日：1996-11-12
申请号：US350986
申请日：1994-11-29
申请人： Tatsuharu Matsuda
发明人： Tatsuharu Matsuda
IPC分类号： H01L21/60 , H01L21/66 , H01L23/485 , H01L23/49 , H01L23/498
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/1147 , H01L2224/13099 , H01L2224/45144 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01079 , H01L2924/014
摘要： An electrode-pin forming mask is used to form electrode pins on the semiconductor chip. The electrode-pin forming mask has electrode-pin forming holes matching electrode pads previously formed on the semiconductor chip. A screen-printing technique is used to form the electrode pins on the semiconductor chip through the electrode-pin forming mask. That is, conductive material in a paste state is pushed into the electrode-pin forming holes in a condition where the electrode-pin forming mask has been placed on the semiconductor chip and positions of the electrode-pin forming holes match positions of the electrode pads of the semiconductor chip, respectively. The conductor material thus pushed into the electrode-pin forming holes is thus shaped as to form the electrode pins projecting from the electrode pads of the semiconductor chip. Then, the electrode-pin forming mask is removed from the semiconductor chip while the thus shaped conductor material continues to be projected from the electrode pads of the semiconductor chip. Thus, the electrode pins are formed on the semiconductor chip.
摘要翻译：使用电极针形成掩模在半导体芯片上形成电极引脚。电极针形成掩模具有与预先形成在半导体芯片上的电极焊盘匹配的电极引脚形成孔。使用丝网印刷技术通过电极针形成掩模在半导体芯片上形成电极引脚。也就是说，在电极引脚形成掩模已经被放置在半导体芯片上并且电极引脚形成孔的位置与电极焊盘的位置相匹配的状态下，将粘贴状态的导电材料推入电极引脚形成孔的半导体芯片。因此，被推入电极针形成孔的导体材料成形为形成从半导体芯片的电极焊盘突出的电极引脚。然后，从半导体芯片去除电极针形成用掩模，同时，由此形成的导体材料继续从半导体芯片的电极焊盘突出。因此，电极引脚形成在半导体芯片上。

6. 发明授权

US5854558A Test board for testing a semiconductor device and method of testing the semiconductor device 失效
标题翻译：用于测试半导体器件的测试板和测试半导体器件的方法
公开(公告)号：US5854558A
公开(公告)日：1998-12-29
申请号：US531449
申请日：1995-09-21
申请人： Toshiyuki Motooka , Syuichirou Takahashi , Tatsuharu Matsuda , Kunio Kodama , Jouji Fujimori
发明人： Toshiyuki Motooka , Syuichirou Takahashi , Tatsuharu Matsuda , Kunio Kodama , Jouji Fujimori
IPC分类号： G01R1/067 , G01R1/073 , G01R31/28 , G01R31/02
CPC分类号： G01R1/06711 , G01R1/07314 , G01R1/06733 , G01R1/06744 , G01R1/06755 , G01R31/2863 , H01L2224/16225 , H01L2224/45144
摘要： A test board used for testing a semiconductor device provided with projection electrodes includes a main board and testing electrodes. The testing electrodes are provided on the main board, each projecting upwardly from the main board. When the semiconductor device is tested, the testing electrodes are electrically connected to the projection electrodes by insertion of the testing electrodes into the projection electrodes. The semiconductor device is mounted on the main board to test the semiconductor device through the testing electrodes.
摘要翻译：用于测试具有投影电极的半导体器件的测试板包括主板和测试电极。测试电极设置在主板上，每个从主板向上突出。当测试半导体器件时，通过将测试电极插入投影电极中，测试电极与投影电极电连接。半导体器件安装在主板上，以通过测试电极测试半导体器件。

7. 发明授权

US5843798A Method for manufacturing semiconductor device having step of forming electrode pins on semiconductor chip using electrode-pin forming mask, and method for testing semiconductor chip using electrode-pin forming mask 失效
标题翻译：一种使用电极针形成掩模在半导体芯片上形成电极引脚的步骤的半导体器件的制造方法以及使用电极引脚形成掩模测试半导体芯片的方法
公开(公告)号：US5843798A
公开(公告)日：1998-12-01
申请号：US695584
申请日：1996-08-12
申请人： Tatsuharu Matsuda
发明人： Tatsuharu Matsuda
IPC分类号： H01L21/60 , H01L21/66 , H01L23/485 , H01L23/49
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/1147 , H01L2224/13099 , H01L2224/45144 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01079 , H01L2924/014
摘要： An electrode-pin forming mask is used to form electrode pins on the semiconductor chip. The electrode-pin forming mask has electrode-pin forming holes matching electrode pads previously formed on the semiconductor chip. A screen-printing technique is used to form the electrode pins on the semiconductor chip through the electrode-pin forming mask. That is, conductive material in a paste state is pushed into the electrode-pin forming holes in a condition where the electrode-pin forming mask has been placed on the semiconductor chip and positions of the electrode-pin forming holes match positions of the electrode pads of the semiconductor chip, respectively. The conductor material thus pushed into the electrode-pin forming holes is thus shaped as to form the electrode pins projecting from the electrode pads of the semiconductor chip. Then, the electrode-pin forming mask is removed from the semiconductor chip while the thus shaped conductor material continues to be projected from the electrode pads of the semiconductor chip. Thus, the electrode pins are formed on the semiconductor chip.
摘要翻译：使用电极针形成掩模在半导体芯片上形成电极引脚。电极针形成掩模具有与预先形成在半导体芯片上的电极焊盘匹配的电极引脚形成孔。使用丝网印刷技术通过电极针形成掩模在半导体芯片上形成电极引脚。也就是说，在电极引脚形成掩模已经被放置在半导体芯片上并且电极引脚形成孔的位置与电极焊盘的位置相匹配的状态下，将粘贴状态的导电材料推入电极引脚形成孔的半导体芯片。因此，被推入电极针形成孔的导体材料成形为形成从半导体芯片的电极焊盘突出的电极引脚。然后，从半导体芯片去除电极针形成用掩模，同时，由此形成的导体材料继续从半导体芯片的电极焊盘突出。因此，电极引脚形成在半导体芯片上。

8. 发明授权

US5831441A Test board for testing a semiconductor device, method of testing the semiconductor device, contact device, test method using the contact device, and test jig for testing the semiconductor device 失效
标题翻译：用于测试半导体器件的测试板，半导体器件测试方法，接触器件，使用接触器件的测试方法以及用于测试半导体器件的测试夹具
公开(公告)号：US5831441A
公开(公告)日：1998-11-03
申请号：US612750
申请日：1996-03-08
申请人： Toshiyuki Motooka , Syuichirou Takahasi , Tatsuharu Matsuda , Kunio Kodama , Joji Fujimori , Shigeki Harada , Masataka Mizukoshi , Masashi Takenaka , Tatsuro Yamashita
发明人： Toshiyuki Motooka , Syuichirou Takahasi , Tatsuharu Matsuda , Kunio Kodama , Joji Fujimori , Shigeki Harada , Masataka Mizukoshi , Masashi Takenaka , Tatsuro Yamashita
IPC分类号： G01R1/04 , G01R1/073 , G01R31/02
CPC分类号： G01R1/0433 , G01R1/07364
摘要： A test board used for testing a semiconductor device provided with projection electrodes includes a main board and testing electrodes. The testing electrodes are provided on the main board, each projecting upwardly from the main board. When the semiconductor device is tested, the testing electrodes are electrically connected to the projection electrodes by insertion of the testing electrodes into the projection electrodes. The semiconductor device is mounted on the main board to test the semiconductor device through the testing electrodes.
摘要翻译：用于测试具有投影电极的半导体器件的测试板包括主板和测试电极。测试电极设置在主板上，每个从主板向上突出。当测试半导体器件时，通过将测试电极插入投影电极中，测试电极与投影电极电连接。半导体器件安装在主板上，以通过测试电极测试半导体器件。

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