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1. 发明授权

US08237195B2 Power MOSFET having a strained channel in a semiconductor heterostructure on metal substrate 有权
标题翻译：功率MOSFET在金属衬底上的半导体异质结构中具有应变通道
公开(公告)号：US08237195B2
公开(公告)日：2012-08-07
申请号：US12248874
申请日：2008-10-09
申请人： Tat Ngai , Qi Wang , Joelle Sharp
发明人： Tat Ngai , Qi Wang , Joelle Sharp
IPC分类号： H01L29/66
CPC分类号： H01L29/7802 , H01L21/6835 , H01L29/1054 , H01L29/165 , H01L29/407 , H01L29/41741 , H01L29/45 , H01L29/66734 , H01L29/7813 , H01L2221/6835 , H01L2924/30105 , H01L2924/3025
摘要： A field effect transistor device having a strained semiconductor channel region overlying a heterostructure-semiconductor on a metal substrate includes a first semiconductor layer overlying a first metal layer. The first semiconductor layer has a first semiconductor material and a second semiconductor material in a relaxed heterostructure and is heavily doped. A second semiconductor layer overlies the first semiconductor layer and has a first semiconductor material and a second semiconductor material in a relaxed heterostructure. The second semiconductor layer is more lightly doped than the first semiconductor layer. A trench extends into the second semiconductor layer and a channel region has a strained layer of the first semiconductor material adjacent a trench sidewall. The strained channel region provides enhanced carrier mobility and improves performance of the field effect transistor.
摘要翻译：具有覆盖金属基板上的异质结构半导体的应变半导体沟道区域的场效应晶体管器件包括覆盖第一金属层的第一半导体层。第一半导体层在松弛异质结构中具有第一半导体材料和第二半导体材料，并且是重掺杂的。第二半导体层覆盖在第一半导体层上，并且在松弛的异质结构中具有第一半导体材料和第二半导体材料。第二半导体层比第一半导体层更轻掺杂。沟槽延伸到第二半导体层中，并且沟道区具有邻近沟槽侧壁的第一半导体材料的应变层。应变通道区域提供增强的载流子迁移率并且改善场效应晶体管的性能。

2. 发明申请

US20100078682A1 POWER MOSFET HAVING A STRAINED CHANNEL IN A SEMICONDUCTOR HETEROSTRUCTURE ON METAL SUBSTRATE 有权
标题翻译：功率MOSFET在金属基板上的半导体结构中具有应变通道
公开(公告)号：US20100078682A1
公开(公告)日：2010-04-01
申请号：US12248874
申请日：2008-10-09
申请人： Tat Ngai , Qi Wang , Joelle Sharp
发明人： Tat Ngai , Qi Wang , Joelle Sharp
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L21/6835 , H01L29/1054 , H01L29/165 , H01L29/407 , H01L29/41741 , H01L29/45 , H01L29/66734 , H01L29/7813 , H01L2221/6835 , H01L2924/30105 , H01L2924/3025
摘要： A field effect transistor device having a strained semiconductor channel region overlying a heterostructure-semiconductor on a metal substrate includes a first semiconductor layer overlying a first metal layer. The first semiconductor layer has a first semiconductor material and a second semiconductor material in a relaxed heterostructure and is heavily doped. A second semiconductor layer overlies the first semiconductor layer and has a first semiconductor material and a second semiconductor material in a relaxed heterostructure. The second semiconductor layer is more lightly doped than the first semiconductor layer. A trench extends into the second semiconductor layer and a channel region has a strained layer of the first semiconductor material adjacent a trench sidewall. The strained channel region provides enhanced carrier mobility and improves performance of the field effect transistor.
摘要翻译：具有覆盖金属基板上的异质结构半导体的应变半导体沟道区域的场效应晶体管器件包括覆盖第一金属层的第一半导体层。第一半导体层在松弛异质结构中具有第一半导体材料和第二半导体材料，并且是重掺杂的。第二半导体层覆盖在第一半导体层上，并且在松弛的异质结构中具有第一半导体材料和第二半导体材料。第二半导体层比第一半导体层更轻掺杂。沟槽延伸到第二半导体层中，并且沟道区具有邻近沟槽侧壁的第一半导体材料的应变层。应变通道区域提供增强的载流子迁移率并且改善场效应晶体管的性能。

3. 发明申请

US20120196414A1 Power MOSFET Having a Strained Channel in a Semiconductor Heterostructure on Metal Substrate 审中-公开
标题翻译：功率MOSFET在金属基板上的半导体异质结构中具有应变通道
公开(公告)号：US20120196414A1
公开(公告)日：2012-08-02
申请号：US13444537
申请日：2012-04-11
申请人： Tat Ngai , Qi Wang , Joelle Sharp
发明人： Tat Ngai , Qi Wang , Joelle Sharp
IPC分类号： H01L21/336
CPC分类号： H01L29/7802 , H01L21/6835 , H01L29/1054 , H01L29/165 , H01L29/407 , H01L29/41741 , H01L29/45 , H01L29/66734 , H01L29/7813 , H01L2221/6835 , H01L2924/30105 , H01L2924/3025
摘要： A method for forming a semiconductor device includes forming a graded silicon-germanium (SiGe) layer overlying a silicon substrate, a concentration of germanium increasing with a thickness of the graded silicon germanium layer. A first relaxed SiGe layer is formed over the graded SiGe layer, and a second relaxed SiGe layer overlying the first relaxed SiGe layer. The second relaxed SiGe layer has a lower conductivity than the first relaxed SiGe layer. The method also includes forming a field effect transistor having a trench extending into the second relaxed SiGe layer and a channel region that includes a layer of strained silicon to enable enhanced carrier mobility. A top conductor layer is formed overlying the second relaxed SiGe layer, and then the silicon substrate and the graded SiGe layer are removed. A bottom conductor layer is formed underlying the first relaxed SiGe layer.
摘要翻译：一种用于形成半导体器件的方法包括形成覆盖硅衬底的梯度硅锗（SiGe）层，锗浓度随着梯度硅锗层的厚度而增加。在渐变SiGe层上形成第一弛豫SiGe层，并且覆盖第一弛豫SiGe层上的第二弛豫SiGe层。第二松弛SiGe层具有比第一弛豫SiGe层低的导电性。该方法还包括形成具有延伸到第二弛豫SiGe层中的沟槽的场效应晶体管和包括应变硅层的沟道区，以实现增强的载流子迁移率。形成覆盖第二松弛SiGe层的顶导体层，然后去除硅衬底和渐变SiGe层。底部导体层形成在第一松弛SiGe层下面。

4. 发明授权

US07564096B2 Scalable power field effect transistor with improved heavy body structure and method of manufacture 有权
标题翻译：具有改进的重体结构和制造方法的可扩展功率场效应晶体管
公开(公告)号：US07564096B2
公开(公告)日：2009-07-21
申请号：US11673487
申请日：2007-02-09
申请人： Qi Wang , Ming-Huang Huang , Joelle Sharp
发明人： Qi Wang , Ming-Huang Huang , Joelle Sharp
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L29/06 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109 , H01L29/22 , H01L33/00
CPC分类号： H01L29/66636 , H01L29/165 , H01L29/66621 , H01L29/7834
摘要： A field effect transistor (FET) includes a semiconductor region of a first conductivity type and a well region of a second conductivity type extending over the semiconductor region. A gate electrode is adjacent to but insulated from the well region, and a source region of the first conductivity type is in the well region. A heavy body region is in electrical contact with the well region, and includes a material having a lower energy gap than the well region.
摘要翻译：场效应晶体管（FET）包括在半导体区域上延伸的第一导电类型的半导体区域和第二导电类型的阱区域。栅电极与阱区相邻但绝缘，并且第一导电类型的源极区在阱区中。重体区域与阱区电接触，并且包括具有比阱区更低的能隙的材料。

5. 发明授权

US07754567B2 Scalable power field effect transistor with improved heavy body structure and method of manufacture 有权
标题翻译：具有改进的重体结构和制造方法的可扩展功率场效应晶体管
公开(公告)号：US07754567B2
公开(公告)日：2010-07-13
申请号：US12485290
申请日：2009-06-16
申请人： Qi Wang , Ming-Huang Huang , Joelle Sharp
发明人： Qi Wang , Ming-Huang Huang , Joelle Sharp
IPC分类号： H01L21/336
CPC分类号： H01L29/66636 , H01L29/165 , H01L29/66621 , H01L29/7834
摘要： A method for forming a field effect transistor (FET) includes the following steps. A well region of a first conductivity type is formed in a semiconductor region of a second conductivity type. A gate electrode is formed adjacent to but insulated from the well region. A source region of the second conductivity type is formed in the well region. A heavy body recess is formed extending into and terminating within the well region adjacent the source region. The heavy body recess is at least partially filled with a heavy body material having a lower energy gap than the well region.
摘要翻译：形成场效应晶体管（FET）的方法包括以下步骤。第一导电类型的阱区形成在第二导电类型的半导体区域中。栅极电极形成为邻近但与阱区绝缘。第二导电类型的源区形成在阱区中。形成一个沉重的身体凹陷，延伸到与源区相邻的井区内和终止。重体凹部至少部分地被具有比井区域更低的能隙的重体材料填充。

6. 发明申请

US20090302482A1 Structure and Method for Forming Hybrid Substrate 有权
标题翻译：用于形成混合基板的结构和方法
公开(公告)号：US20090302482A1
公开(公告)日：2009-12-10
申请号：US12332326
申请日：2008-12-10
申请人： Qi Wang , Joelle Sharp , Minhua Li , Hui Chen
发明人： Qi Wang , Joelle Sharp , Minhua Li , Hui Chen
IPC分类号： H01L25/16 , H01L21/78
CPC分类号： H01L29/045 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/02609 , H01L21/0262 , H01L21/02639 , H01L21/02642 , H01L29/7802 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.
摘要翻译：将第一基板和第二基板接合在一起形成单一的混合基板。去除第一衬底的预定部分以在第一衬底中形成开口，第二衬底的表面区域暴露在第一衬底中。执行相对于第一和第二衬底的晶体取向选择性的选择性外延生长工艺，从而从第二衬底的暴露表面形成外延硅，但不从第一衬底的暴露表面形成外延硅。由第二衬底的暴露表面形成的外延硅具有与第二衬底相同的晶体取向。

7. 发明授权

US08039401B2 Structure and method for forming hybrid substrate 有权
标题翻译：用于形成混合基板的结构和方法
公开(公告)号：US08039401B2
公开(公告)日：2011-10-18
申请号：US12332326
申请日：2008-12-10
申请人： Qi Wang , Joelle Sharp , Minhua Li , Hui Chen
发明人： Qi Wang , Joelle Sharp , Minhua Li , Hui Chen
IPC分类号： H01L21/30 , H01L21/46 , H01L21/20 , H01L21/36 , H01L21/311
CPC分类号： H01L29/045 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/02609 , H01L21/0262 , H01L21/02639 , H01L21/02642 , H01L29/7802 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.
摘要翻译：将第一基板和第二基板接合在一起形成单一的混合基板。去除第一衬底的预定部分，以在第一衬底中形成开口，第二衬底的表面区域暴露在第一衬底中。执行相对于第一和第二衬底的晶体取向选择性的选择性外延生长工艺，从而从第二衬底的暴露表面形成外延硅，但不从第一衬底的暴露表面形成外延硅。由第二衬底的暴露表面形成的外延硅具有与第二衬底相同的晶体取向。

8. 发明申请

US20090253237A1 Scalable Power Field Effect Transistor with Improved Heavy Body Structure and Method of Manufacture 有权
标题翻译：具有改进的重体结构和制造方法的可扩展功率场效应晶体管
公开(公告)号：US20090253237A1
公开(公告)日：2009-10-08
申请号：US12485290
申请日：2009-06-16
申请人： Qi Wang , Ming-Huang Huang , Joelle Sharp
发明人： Qi Wang , Ming-Huang Huang , Joelle Sharp
IPC分类号： H01L21/336
CPC分类号： H01L29/66636 , H01L29/165 , H01L29/66621 , H01L29/7834
摘要： A method for forming a field effect transistor (FET) includes the following steps. A well region of a first conductivity type is formed in a semiconductor region of a second conductivity type. A gate electrode is formed adjacent to but insulated from the well region. A source region of the second conductivity type is formed in the well region. A heavy body recess is formed extending into and terminating within the well region adjacent the source region. The heavy body recess is at least partially filled with a heavy body material having a lower energy gap than the well region.
摘要翻译：形成场效应晶体管（FET）的方法包括以下步骤。第一导电类型的阱区形成在第二导电类型的半导体区域中。栅极电极形成为邻近但与阱区绝缘。第二导电类型的源区形成在阱区中。形成一个沉重的身体凹陷，延伸到与源区相邻的井区内和终止。重体凹部至少部分地被具有比井区域更低的能隙的重体材料填充。

9. 发明申请

US20080191248A1 Scalable Power Field Effect Transistor with Improved Heavy Body Structure and Method of Manufacture 有权
标题翻译：具有改进的重体结构和制造方法的可扩展功率场效应晶体管
公开(公告)号：US20080191248A1
公开(公告)日：2008-08-14
申请号：US11673487
申请日：2007-02-09
申请人： Qi Wang , Ming-Huang Huang , Joelle Sharp
发明人： Qi Wang , Ming-Huang Huang , Joelle Sharp
IPC分类号： H01L29/94
CPC分类号： H01L29/66636 , H01L29/165 , H01L29/66621 , H01L29/7834
摘要： A field effect transistor (FET) includes a semiconductor region of a first conductivity type and a well region of a second conductivity type extending over the semiconductor region. A gate electrode is adjacent to but insulated from the well region, and a source region of the first conductivity type is in the well region. A heavy body region is in electrical contact with the well region, and includes a material having a lower energy gap than the well region.
摘要翻译：场效应晶体管（FET）包括在半导体区域上延伸的第一导电类型的半导体区域和第二导电类型的阱区域。栅电极与阱区相邻但绝缘，并且第一导电类型的源极区在阱区中。重体区域与阱区电接触，并且包括具有比阱区更低的能隙的材料。

10. 发明申请

US20060267088A1 Structure and method for forming a minimum pitch trench-gate FET with heavy body region 失效
公开(公告)号：US20060267088A1
公开(公告)日：2006-11-30
申请号：US11140567
申请日：2005-05-26
申请人： Joelle Sharp , Gordon Madson
发明人： Joelle Sharp , Gordon Madson
IPC分类号： H01L29/76
CPC分类号： H01L29/66727 , H01L21/26586 , H01L29/66734
摘要： A field effect transistor is formed as follows. Openings are formed in a masking layer extending over a surface of a silicon region. A trench is formed in the silicon region through each opening in the masking layer. A layer of silicon is formed along sidewalls and bottom of each trench and along masking layer sidewalls which define each opening. The masking layer is removed to expose surface areas of the silicon region underlying the masking layer and to expose sidewalls of the layer of silicon to thereby form contact openings over the surface of the silicon region. A contact layer is formed to electrically contact the exposed surface areas of the silicon region and the exposed sidewalls of the layer of silicon.

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