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1. 发明授权

US08582681B2 Signal receiver apparatus and waveform shaping method 有权
标题翻译：信号接收装置和波形整形方法
公开(公告)号：US08582681B2
公开(公告)日：2013-11-12
申请号：US12410152
申请日：2009-03-24
申请人： Akira Shimamura , Koichi Mita , Hideshi Fujishima , Takashi Arai , Shunichi Ko , Takuya Terasawa , Koji Mikami , Naoya Komada
发明人： Akira Shimamura , Koichi Mita , Hideshi Fujishima , Takashi Arai , Shunichi Ko , Takuya Terasawa , Koji Mikami , Naoya Komada
IPC分类号： H04B15/00
CPC分类号： H04L25/03834 , H04L25/03878
摘要： A signal receiver apparatus includes a waveform shaping data storage device storing waveform shaping data of a signal transmitted with a given timing from a signal transmitter device of a plurality of signal transmitter devices which are coupled to the signal receiver apparatus for each of the plurality of signal transmitter devices, and a waveform shaping device reading waveform shaping data of the signal transmitter device in the plurality of signal transmitter device from the waveform shaping data storage device when a signal from the signal transmitter device is received, and shaping a waveform of a received signal from the signal transmitter device.
摘要翻译：一种信号接收装置，包括：波形整形数据存储装置，存储从多个信号发送装置的信号发送装置以给定的定时发送的信号的波形整形数据，所述信号发送装置与多个信号中的每一个的信号接收装置发射机装置和波形整形装置，当接收到来自信号发送装置的信号时，从波形整形数据存储装置读取多个信号发送装置中的信号发送装置的波形整形数据，并对接收信号的波形进行整形从信号发射器装置。

2. 发明授权

US08311054B2 Transmitting/receiving system, node and communication method 有权
标题翻译：发送/接收系统，节点和通信方式
公开(公告)号：US08311054B2
公开(公告)日：2012-11-13
申请号：US12410086
申请日：2009-03-24
申请人： Takuya Terasawa , Takashi Arai , Shunichi Ko , Koichi Mita , Akira Shimamura , Koji Mikami , Naoya Komada
发明人： Takuya Terasawa , Takashi Arai , Shunichi Ko , Koichi Mita , Akira Shimamura , Koji Mikami , Naoya Komada
IPC分类号： H04B7/212
CPC分类号： H04L12/417 , H04J3/1682 , H04L12/40156 , H04L2012/40273
摘要： A transmitting/receiving system includes a control field controlling a transmitting priority of a dynamic slot is included in each communication cycle, and a node of the transmitting/receiving system sets control information including a preferential usage request for a dynamic slot that the node transmits in the control field and notifies all nodes in the transmitting/receiving system of the preferential usage request for the dynamic slot.
摘要翻译：发送/接收系统包括控制动态时隙的发送优先级的控制字段被包括在每个通信周期中，并且发送/接收系统的节点设置包括节点在其中发送的动态时隙的优先使用请求的控制信息控制字段，并通知发送/接收系统中的所有节点对动态时隙的优先使用请求。

3. 发明申请

US20090225901A1 SIGNAL RECEIVER APPARATUS AND WAVEFORM SHAPING METHOD 有权
标题翻译：信号接收装置和波形形成方法
公开(公告)号：US20090225901A1
公开(公告)日：2009-09-10
申请号：US12410152
申请日：2009-03-24
申请人： Akira Shimamura , Koichi Mita , Hideshi Fujishima , Takashi Arai , Shunichi Ko , Takuya Terasawa , Koji Mikami , Naoya Komada
发明人： Akira Shimamura , Koichi Mita , Hideshi Fujishima , Takashi Arai , Shunichi Ko , Takuya Terasawa , Koji Mikami , Naoya Komada
IPC分类号： H04L25/03 , H04B1/04
CPC分类号： H04L25/03834 , H04L25/03878
摘要： A signal receiver apparatus includes a waveform shaping data storage device storing waveform shaping data of a signal transmitted with a given timing from a signal transmitter device of a plurality of signal transmitter devices which are coupled to the signal receiver apparatus for each of the plurality of signal transmitter devices, and a waveform shaping device reading waveform shaping data of the signal transmitter device in the plurality of signal transmitter device from the waveform shaping data storage device when a signal from the signal transmitter device is received, and shaping a waveform of a received signal from the signal transmitter device.
摘要翻译：一种信号接收装置，包括：波形整形数据存储装置，存储从多个信号发送装置的信号发送装置以给定的定时发送的信号的波形整形数据，所述信号发送装置与多个信号中的每一个的信号接收装置发射机装置和波形整形装置，当接收到来自信号发送装置的信号时，从波形整形数据存储装置读取多个信号发送装置中的信号发送装置的波形整形数据，并对接收信号的波形进行整形从信号发射器装置。

4. 发明申请

US20090213870A1 TRANSMITTING/RECEIVING SYSTEM, NODE AND COMMUNICATION METHOD 有权
标题翻译：发送/接收系统，节点和通信方法
公开(公告)号：US20090213870A1
公开(公告)日：2009-08-27
申请号：US12410086
申请日：2009-03-24
申请人： Takuya TERASAWA , Takashi Arai , Shunichi Ko , Koichi Mita , Akira Shimamura , Koji Mikami , Naoya Komada
发明人： Takuya TERASAWA , Takashi Arai , Shunichi Ko , Koichi Mita , Akira Shimamura , Koji Mikami , Naoya Komada
IPC分类号： H04B7/212
CPC分类号： H04L12/417 , H04J3/1682 , H04L12/40156 , H04L2012/40273
摘要： A transmitting/receiving system includes a control field controlling a transmitting priority of a dynamic slot is included in each communication cycle, and a node of the transmitting/receiving system sets control information including a preferential usage request for a dynamic slot that the node transmits in the control field and notifies all nodes in the transmitting/receiving system of the preferential usage request for the dynamic slot.
摘要翻译：发送/接收系统包括控制动态时隙的发送优先级的控制字段被包括在每个通信周期中，并且发送/接收系统的节点设置包括节点在其中发送的动态时隙的优先使用请求的控制信息控制字段，并通知发送/接收系统中的所有节点对动态时隙的优先使用请求。

5. 发明授权

US07098835B2 Analog/digital conversion method and analog/digital conversion circuit 有权
标题翻译：模拟/数字转换方式和模/数转换电路
公开(公告)号：US07098835B2
公开(公告)日：2006-08-29
申请号：US11087713
申请日：2005-03-24
申请人： Shunichi Ko , Akihiro Fujisuka
发明人： Shunichi Ko , Akihiro Fujisuka
IPC分类号： H03M1/12 , H03K5/153
CPC分类号： H03M1/127
摘要： Paying attention to the difference between a subsequently inputted analog signal and a reference signal which is an analog signal converted to the digital signal immediately before for instance, changing timing dynamically for converting the analog signal to the digital signal, and converting an analog signal sampled at the timing of changing dynamically to a digital signal.
摘要翻译：注意随后输入的模拟信号和作为转换为紧接在之前的数字信号的模拟信号的参考信号之间的差异，动态地改变定时以将模拟信号转换为数字信号，以及转换在动态地改变为数字信号的定时。

6. 发明申请

US20060092068A1 Analog/digital conversion method and analog/digital conversion circuit 有权
公开(公告)号：US20060092068A1
公开(公告)日：2006-05-04
申请号：US11087713
申请日：2005-03-24
申请人： Shunichi Ko , Akihiro Fujitsuka
发明人： Shunichi Ko , Akihiro Fujitsuka
IPC分类号： H03M1/12
CPC分类号： H03M1/127
摘要： Paying attention to the difference between a subsequently inputted analog signal and a reference signal which is an analog signal converted to the digital signal immediately before for instance, changing timing dynamically for converting the analog signal to the digital signal, and converting an analog signal sampled at the timing of changing dynamically to a digital signal.

7. 发明申请

US20060071725A1 Oscillator and semiconductor device 有权
标题翻译：振荡器和半导体器件
公开(公告)号：US20060071725A1
公开(公告)日：2006-04-06
申请号：US11238954
申请日：2005-09-30
申请人： Hideo Nunokawa , Fukuji Kihara , Tomonari Morishita , Shunichi Ko , Hiroshi Ookawa
发明人： Hideo Nunokawa , Fukuji Kihara , Tomonari Morishita , Shunichi Ko , Hiroshi Ookawa
IPC分类号： H03B1/00
CPC分类号： H03B5/32 , H03K3/0307
摘要： An object is not only to contribute to reduction in current consumption but also to advance actuation of a system required in a camera, an on-vehicle electric component, etc. by shortening a waiting time for stabilization of oscillation. An oscillator having an inverting amplifier inverting and amplifying an input signal and outputting it, a resonator connected to between an input and an output terminals of the inverting amplifier, a feedback resistance connected in parallel to the resonator, and an output circuit outputting a first clock signal based on a signal of an on-load parallel resonance frequency or a parallel resonance frequency oscillated by the resonator, the inverting amplifier and the feedback resistance to a function block is provided.
摘要翻译：目的不仅在于减少电流消耗，而且通过缩短振荡的稳定等待时间来提高照相机，车载电气部件等所需的系统的动作。一种具有反相放大器的反相放大器，其反相并放大输入信号并输出;振荡器，连接到反相放大器的输入端和输出端之间，与谐振器并联连接的反馈电阻，以及输出电路，输出第一时钟基于谐振器振荡的负载并联谐振频率或并联谐振频率的信号，提供反相放大器和对功能块的反馈电阻的信号。

8. 发明授权

US07978750B2 Microcontroller 有权
标题翻译：微控制器
公开(公告)号：US07978750B2
公开(公告)日：2011-07-12
申请号：US11168448
申请日：2005-06-29
申请人： Hideo Nunokawa , Miki Suzuki , Hiroyuki Abe , Shinichi Okamoto , Shunichi Ko , Hiroshi Haibara , Nobuhiko Akasaka
发明人： Hideo Nunokawa , Miki Suzuki , Hiroyuki Abe , Shinichi Okamoto , Shunichi Ko , Hiroshi Haibara , Nobuhiko Akasaka
IPC分类号： H04B1/00
CPC分类号： H04B15/04 , H04B1/202
摘要： A microcontroller is disposed on a receiving part of a wireless system in order to process a demodulation signal generated by a receiver circuit, and includes a memory and a CPU. The memory stores a control program of the microcontroller. The control program thereof includes a dual loop routine for an operation in reception standby mode. The dual loop routine has a first loop and a second loop included in the first loop. The CPU has an instruction set consisting of a plurality of instructions, and executes the instructions according to the program stored in the memory. The CPU executes an instruction irrelevant to an operation when the microcontroller is in reception mode during the second loop a number of times. The number of times is at least such that noise caused by the repetition of the second loop is lowered below a desired level.
摘要翻译：微控制器设置在无线系统的接收部分上，以便处理由接收机电路产生的解调信号，并且包括存储器和CPU。存储器存储微控制器的控制程序。其控制程序包括用于接收待机模式下的操作的双循环程序。双循环程序具有包含在第一循环中的第一循环和第二循环。 CPU具有由多个指令组成的指令集，并且根据存储在存储器中的程序执行指令。 CPU执行与微控制器在第二次循环期间处于接收模式时的操作无关的指令。次数至少使得由第二回路的重复引起的噪声降低到期望水平以下。

9. 发明申请

US20060223452A1 Microcontroller 有权
标题翻译：微控制器
公开(公告)号：US20060223452A1
公开(公告)日：2006-10-05
申请号：US11168448
申请日：2005-06-29
申请人： Hideo Nunokawa , Miki Suzuki , Hiroyuki Abe , Shinichi Okamoto , Shunichi Ko , Hiroshi Haibara , Nobuhiko Akasaka
发明人： Hideo Nunokawa , Miki Suzuki , Hiroyuki Abe , Shinichi Okamoto , Shunichi Ko , Hiroshi Haibara , Nobuhiko Akasaka
IPC分类号： H04B1/38
CPC分类号： H04B15/04 , H04B1/202
摘要： A microcontroller is disposed on a receiving part of a wireless system in order to process a demodulation signal generated by a receiver circuit, and includes a memory and a CPU. The memory stores a control program of the microcontroller. The control program thereof includes a dual loop routine for an operation in reception standby mode. The dual loop routine has a first loop and a second loop included in the first loop. The CPU has an instruction set consisting of a plurality of instructions, and executes the instructions according to the program stored in the memory. The CPU executes an instruction irrelevant to an operation when the microcontroller is in reception mode during the second loop a number of times. The number of times is at least such that noise caused by the repetition of the second loop is lowered below a desired level.
摘要翻译：微控制器设置在无线系统的接收部分上，以便处理由接收机电路产生的解调信号，并且包括存储器和CPU。存储器存储微控制器的控制程序。其控制程序包括用于接收待机模式下的操作的双循环程序。双循环程序具有包含在第一循环中的第一循环和第二循环。 CPU具有由多个指令组成的指令集，并且根据存储在存储器中的程序执行指令。 CPU执行与微控制器在第二次循环期间处于接收模式时的操作无关的指令。次数至少使得由第二回路的重复引起的噪声降低到期望水平以下。

10. 发明授权

US06600434B2 A/D conversion device and A/D converter error correction device 有权
公开(公告)号：US06600434B2
公开(公告)日：2003-07-29
申请号：US10078359
申请日：2002-02-21
申请人： Shunichi Ko , Kiyoko Honda
发明人： Shunichi Ko , Kiyoko Honda
IPC分类号： H03M100
CPC分类号： H03M1/0845 , H03M1/12
摘要： A zero transition voltage and a full transition voltage are inputted into the A/D converter, digital converted values of these voltages are fed back to a device fluctuation correction circuit and H side and L side reference voltages AVRH and AVRL are determined so as to obtain digital outputs corresponding to the respective transition voltages. Also, the digital output of the A/D converter is fed back to a high resolution corresponding circuit and a difference between AVRL and AVRH is decreased to be half as before by changing AVRL or AVRH according to an analog input voltage applied to the A/D converter and A/D conversion is performed again. By repeating this operation, significant bit values are obtained. A merge circuit merges the significant bit values with less significant bit values outputted from the A/D converter.

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