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1. 发明申请

US20070029284A1 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus 有权
标题翻译：干式蚀刻法，半导体装置的制造方法以及干蚀刻装置
公开(公告)号：US20070029284A1
公开(公告)日：2007-02-08
申请号：US11545528
申请日：2006-10-11
申请人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
发明人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
IPC分类号： C23F1/00 , H01L21/461 , C03C15/00 , B44C1/22 , H01L21/302
CPC分类号： H01L21/67069 , H01J37/32 , H01J37/32706 , H01J2237/334 , H01L21/02057 , H01L21/02071 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/3065 , H01L21/31662 , H01L21/32137 , H01L21/76232
摘要： When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.
摘要翻译：当使用具有双电源的干蚀刻装置对含硅材料进行蚀刻时，在含硅材料的表面进行氧化之前开始施加偏压功率。具体地说，在启动源功率的应用之前启动偏置功率的应用。或者，施加源功率和偏置功率，使得在偏置功率的有效值达到第一预定值之后，源功率的有效值达到第二预定值。

2. 发明授权

US07341922B2 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus 有权
公开(公告)号：US07341922B2
公开(公告)日：2008-03-11
申请号：US11487968
申请日：2006-07-18
申请人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
发明人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
IPC分类号： H01L21/76 , H01L21/3205 , H01L21/302
CPC分类号： H01L21/67069 , H01J37/32 , H01J37/32706 , H01J2237/334 , H01L21/02057 , H01L21/02071 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/3065 , H01L21/31662 , H01L21/32137 , H01L21/76232
摘要： When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.

3. 发明授权

US07402527B2 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus 有权
标题翻译：干式蚀刻法，半导体装置的制造方法以及干蚀刻装置
公开(公告)号：US07402527B2
公开(公告)日：2008-07-22
申请号：US11545528
申请日：2006-10-11
申请人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
发明人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
IPC分类号： H01L21/302
CPC分类号： H01L21/67069 , H01J37/32 , H01J37/32706 , H01J2237/334 , H01L21/02057 , H01L21/02071 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/3065 , H01L21/31662 , H01L21/32137 , H01L21/76232
摘要： When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.
摘要翻译：当使用具有双电源的干蚀刻装置对含硅材料进行蚀刻时，在含硅材料的表面进行氧化之前开始施加偏压功率。具体地说，在启动源功率的应用之前启动偏置功率的应用。或者，施加源功率和偏置功率，使得在偏置功率的有效值达到第一预定值之后，源功率的有效值达到第二预定值。

4. 发明申请

US20060258117A1 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus 有权
标题翻译：干式蚀刻法，半导体装置的制造方法以及干蚀刻装置
公开(公告)号：US20060258117A1
公开(公告)日：2006-11-16
申请号：US11487968
申请日：2006-07-18
申请人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
发明人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
IPC分类号： H01L21/76
CPC分类号： H01L21/67069 , H01J37/32 , H01J37/32706 , H01J2237/334 , H01L21/02057 , H01L21/02071 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/3065 , H01L21/31662 , H01L21/32137 , H01L21/76232
摘要： When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.
摘要翻译：当使用具有双电源的干蚀刻装置对含硅材料进行蚀刻时，在含硅材料的表面进行氧化之前开始施加偏压功率。具体地说，在启动源功率的应用之前启动偏置功率的应用。或者，施加源功率和偏置功率，使得在偏置功率的有效值达到第一预定值之后，源功率的有效值达到第二预定值。

5. 发明授权

US06762129B2 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus 有权
公开(公告)号：US06762129B2
公开(公告)日：2004-07-13
申请号：US09826098
申请日：2001-04-05
申请人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
发明人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
IPC分类号： H01L21302
CPC分类号： H01L21/67069 , H01J37/32 , H01J37/32706 , H01J2237/334 , H01L21/02057 , H01L21/02071 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/3065 , H01L21/31662 , H01L21/32137 , H01L21/76232
摘要： When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.

6. 发明授权

US07148151B2 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus 有权
公开(公告)号：US07148151B2
公开(公告)日：2006-12-12
申请号：US10759180
申请日：2004-01-20
申请人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
发明人： Takeshi Yamashita , Takao Yamaguchi , Hideo Niko
IPC分类号： H01L21/302
CPC分类号： H01L21/67069 , H01J37/32 , H01J37/32706 , H01J2237/334 , H01L21/02057 , H01L21/02071 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/3065 , H01L21/31662 , H01L21/32137 , H01L21/76232
摘要： When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically, the application of the bias power is initiated before the application of source power is initiated. Alternatively, the source power and the bias power are applied such that the effective value of the source power reaches a second predetermined value after the effective value of the bias power reaches a first predetermined value.

7. 发明授权

US07026173B2 Method and apparatus for detecting end point 失效
标题翻译：检测终点的方法和装置
公开(公告)号：US07026173B2
公开(公告)日：2006-04-11
申请号：US10858402
申请日：2004-06-02
申请人： Takeshi Yamashita , Takao Yamaguchi
发明人： Takeshi Yamashita , Takao Yamaguchi
IPC分类号： H01L21/00
CPC分类号： G03F7/70608 , H01J37/32935
摘要： A mask layer and a to-be-processed layer are irradiated with light to measure interference light formed of reflected lights from the mask layer and reflected lights from the to-be-processed layer. Thereafter, an interference component brought by the mask layer is removed from the waveform of the measured interference light, thereby calculating the waveform of the interference light brought by the to-be-processed layer. The thickness of the remaining to-be-processed layer is determined on the basis of the calculated waveform of the interference light and the thickness of the remaining to-be-processed layer is compared with a desired thickness thereof. In this way, an end point of processing on the to-be-processed layer is detected.
摘要翻译：用光照射掩模层和待处理层，以测量由掩模层反射的光和来自待处理层的反射光形成的干涉光。然后，从测定的干涉光的波形中除去由掩模层带来的干涉成分，计算被处理层带来的干涉光的波形。基于干涉光的计算波形确定剩余待处理层的厚度，并将剩余待处理层的厚度与其期望厚度进行比较。以这种方式，检测待处理层的处理终点。

8. 发明申请

US20060189006A1 Method and apparatus for detecting end point 有权
公开(公告)号：US20060189006A1
公开(公告)日：2006-08-24
申请号：US11340540
申请日：2006-01-27
申请人： Takeshi Yamashita , Takao Yamaguchi
发明人： Takeshi Yamashita , Takao Yamaguchi
IPC分类号： H01L21/00 , H01L23/58
CPC分类号： G03F7/70608 , H01J37/32935
摘要： A mask layer and a to-be-processed layer are irradiated with light to measure interference light formed of reflected lights from the mask layer and reflected lights from the to-be-processed layer. Thereafter, an interference component brought by the mask layer is removed from the waveform of the measured interference light, thereby calculating the waveform of the interference light brought by the to-be-processed layer. The thickness of the remaining to-be-processed layer is determined on the basis of the calculated waveform of the interference light and the thickness of the remaining to-be-processed layer is compared with a desired thickness thereof. In this way, an end point of processing on the to-be-processed layer is detected.

9. 发明授权

US07377992B2 Method and apparatus for detecting end point 有权
标题翻译：检测终点的方法和装置
公开(公告)号：US07377992B2
公开(公告)日：2008-05-27
申请号：US11340540
申请日：2006-01-27
申请人： Takeshi Yamashita , Takao Yamaguchi
发明人： Takeshi Yamashita , Takao Yamaguchi
IPC分类号： C23F1/00
CPC分类号： G03F7/70608 , H01J37/32935
摘要： A mask layer and a to-be-processed layer are irradiated with light to measure interference light formed of reflected lights from the mask layer and reflected lights from the to-be-processed layer. Thereafter, an interference component brought by the mask layer is removed from the waveform of the measured interference light, thereby calculating the waveform of the interference light brought by the to-be-processed layer. The thickness of the remaining to-be-processed layer is determined on the basis of the calculated waveform of the interference light and the thickness of the remaining to-be-processed layer is compared with a desired thickness thereof. In this way, an end point of processing on the to-be-processed layer is detected.
摘要翻译：用光照射掩模层和待处理层，以测量由掩模层反射的光和来自待处理层的反射光形成的干涉光。然后，从测定的干涉光的波形中除去由掩模层带来的干涉成分，计算被处理层带来的干涉光的波形。基于干涉光的计算波形确定剩余待处理层的厚度，并将剩余待处理层的厚度与其期望厚度进行比较。以这种方式，检测待处理层的处理终点。

10. 发明申请

US20050054123A1 Method and apparatus for detecting end point 失效
标题翻译：检测终点的方法和装置
公开(公告)号：US20050054123A1
公开(公告)日：2005-03-10
申请号：US10858402
申请日：2004-06-02
申请人： Takeshi Yamashita , Takao Yamaguchi
发明人： Takeshi Yamashita , Takao Yamaguchi
IPC分类号： H01L21/3065 , C23F1/00 , G03F7/20 , H01J37/32 , H01L21/00 , H01L21/66
CPC分类号： G03F7/70608 , H01J37/32935
摘要： A mask layer and a to-be-processed layer are irradiated with light to measure interference light formed of reflected lights from the mask layer and reflected lights from the to-be-processed layer. Thereafter, an interference component brought by the mask layer is removed from the waveform of the measured interference light, thereby calculating the waveform of the interference light brought by the to-be-processed layer. The thickness of the remaining to-be-processed layer is determined on the basis of the calculated waveform of the interference light and the thickness of the remaining to-be-processed layer is compared with a desired thickness thereof. In this way, an end point of processing on the to-be-processed layer is detected.
摘要翻译：用光照射掩模层和待处理层，以测量由掩模层反射的光和来自待处理层的反射光形成的干涉光。然后，从测定的干涉光的波形中除去由掩模层带来的干涉成分，计算被处理层带来的干涉光的波形。基于干涉光的计算波形确定剩余待处理层的厚度，并将剩余待处理层的厚度与其期望厚度进行比较。以这种方式，检测待处理层的处理终点。

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