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1. 发明授权

US5699035A ZnO thin-film varistors and method of making the same 失效
标题翻译： ZnO薄膜变阻器及其制作方法
公开(公告)号：US5699035A
公开(公告)日：1997-12-16
申请号：US408723
申请日：1995-03-22
申请人： Takeshi Ito , Shuzo Hiraide , Michael C. Scott , Carlos A. Paz de Araujo , Larry D. McMillan
发明人： Takeshi Ito , Shuzo Hiraide , Michael C. Scott , Carlos A. Paz de Araujo , Larry D. McMillan
IPC分类号： C23C18/12 , C30B7/00 , H01C7/10 , H01C7/112 , H01C17/075 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/108
CPC分类号： C23C18/1216 , C23C16/45561 , C23C18/1225 , C23C18/1295 , C30B29/68 , C30B7/00 , C30B7/005 , H01C17/075 , H01C7/1013 , H01C7/112 , H01L21/31691 , H01L27/10805 , H01L28/55
摘要： A thin-film zinc oxide varistor (10) for use in integrated circuits and the like is produced by applying a polyoxyalkylated metal complex, such as a metal alkoxycarboxylate, to a substrate (12, 14, and 16) for the formation of a dried nonohmic layer (18). The method of production includes the steps of providing a substrate and a precursor solution including a polyoxyalkylated zinc complex (P22, P24), coating a portion of the substrate with the precursor solution (P26), drying the coated substrate (P32), and crystallizing the dried thin-film zinc oxide layer (P30). The resultant crystalline zinc oxide varistor layer (18) may be doped with bismuth, yttrium, praseodymium, cobalt, antimony, manganese, silicon, chromium, titanium, potassium, dysprosium, cesium, cerium, and iron to provide a non-ohmic varistor. The varistor layer (10) is annealed at a temperature ranging from about 400 to about 1000.degree. C. to provide a layer having a thickness ranging from about 50 nanometers to about 500 nanometers and an average grain size diameter less than about 200 nanometers.
摘要翻译：用于集成电路等的薄膜氧化锌变阻器（10）通过将诸如金属烷氧基羧酸盐的聚氧化烷基化金属络合物施加到基底（12,14和16）上来制备，以形成干燥非欧姆层（18）。制造方法包括以下步骤：提供包含聚氧化烷基化锌络合物（P22，P24）的基材和前体溶液，用前体溶液（P26）涂布基材的一部分，干燥涂布的基材（P32），使结晶干燥的薄膜氧化锌层（P30）。所得结晶氧化锌变阻器层（18）可掺杂铋，钇，镨，钴，锑，锰，硅，铬，钛，钾，镝，铯，铈和铁，以提供非欧姆变阻器。压敏电阻层（10）在约400至约1000℃的温度下退火，以提供厚度范围为约50纳米至约500纳米，平均粒径直径小于约200纳米的层。

2. 发明授权

US5719416A Integrated circuit with layered superlattice material compound 失效
标题翻译：集成电路与层状超晶格材料复合
公开(公告)号：US5719416A
公开(公告)日：1998-02-17
申请号：US276805
申请日：1994-07-18
申请人： Hiroyuki Yoshimori , Hitoshi Watanabe , Carlos A. Paz De Araujo , Shuzo Hiraide , Takashi Mihara , Larry D. McMillan
发明人： Hiroyuki Yoshimori , Hitoshi Watanabe , Carlos A. Paz De Araujo , Shuzo Hiraide , Takashi Mihara , Larry D. McMillan
IPC分类号： C23C18/12 , C30B7/00 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/108 , H01L27/115
CPC分类号： H01L27/11502 , C23C16/45561 , C30B29/68 , C30B7/00 , H01L21/31691 , H01L27/10805 , H01L28/56 , H01L28/60 , H01L28/55
摘要： A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layer superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.
摘要翻译：制造与常规硅CMOS技术兼容的铁电或分层超晶格DRAM的方法。在硅衬底上形成MOSFET。厚层的BPSG后面是薄的SOG层覆盖在MOSFET上。通过沉积铂层，退火，沉积包含铁电体或层超晶格材料的中间层，退火，沉积第二层铂，然后构图电容器，形成电容器。沉积另一个SOG层，MOSFET和电容器的接触孔部分打开，SOG退火，接触孔完全打开，并沉积Pt / Ti / PtSi布线层。

3. 发明授权

US5468684A Integrated circuit with layered superlattice material and method of fabricating same 失效
标题翻译：具有分层超晶格材料的集成电路及其制造方法
公开(公告)号：US5468684A
公开(公告)日：1995-11-21
申请号：US65666
申请日：1993-05-21
申请人： Hiroyuki Yoshimori , Hitoshi Watanabe , Carlos A. Paz De Araujo , Shuzo Hiraide , Takashi Mihara , Larry D. McMillan
发明人： Hiroyuki Yoshimori , Hitoshi Watanabe , Carlos A. Paz De Araujo , Shuzo Hiraide , Takashi Mihara , Larry D. McMillan
IPC分类号： C23C16/02 , C23C16/40 , C23C16/56 , C23C18/12 , C30B7/00 , C30B25/02 , H01C7/10 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/108 , H01L27/115 , H01L21/465
CPC分类号： C23C16/0218 , B05D1/00 , B05D1/60 , B05D3/0493 , C23C16/40 , C23C16/4412 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C16/56 , C23C18/1216 , C23C18/1225 , C23C26/02 , C30B25/02 , C30B29/68 , C30B7/00 , H01C7/1013 , H01L21/314 , H01L21/31691 , H01L27/10805 , H01L27/11502 , H01L28/56 , H01L28/60 , H01L41/317 , H01L28/55 , H01L41/187 , H05K3/105
摘要： A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layered superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.
摘要翻译：制造与常规硅CMOS技术兼容的铁电或分层超晶格DRAM的方法。在硅衬底上形成MOSFET。厚层的BPSG后面是薄的SOG层覆盖在MOSFET上。通过沉积铂层，退火，沉积包含铁电或层状超晶格材料的中间层，退火，沉积第二层铂，然后构图电容器，形成电容器。沉积另一个SOG层，MOSFET和电容器的接触孔部分打开，SOG退火，接触孔完全打开，并沉积Pt / Ti / PtSi布线层。

4. 发明授权

US08908026B2 Imaging method and microscope device 有权
标题翻译：成像方法和显微镜装置
公开(公告)号：US08908026B2
公开(公告)日：2014-12-09
申请号：US13238730
申请日：2011-09-21
申请人： Shuzo Hiraide
发明人： Shuzo Hiraide
IPC分类号： H04N7/18 , G02B21/24 , G02B21/36
CPC分类号： G02B21/365 , G02B21/247
摘要： An imaging method may include a first step in which light from a test specimen is guided to an imaging unit, a second step in which light from the test specimen is guided to an autofocus unit, a third step in which the light guided to an autofocus unit is split, and is guided on a third optical path and a fourth optical path, a fourth step in which a focal point of the imaging unit is adjusted such that an image of the test specimen that is created by the light from the test specimen guided on the first optical path is formed on an imaging surface of the imaging unit, a fifth step in which an image of the test specimen is acquired and image data is created, a sixth step in which spectrum information for the test specimen is detected, and a seventh step in which a color tone of the image data is corrected.
摘要翻译：成像方法可以包括第一步骤，其中来自测试样本的光被引导到成像单元，第二步骤，其中来自测试样本的光被引导到自动聚焦单元，第三步骤，光被引导到自动聚焦单元被分割并且被引导在第三光路和第四光路上，第四步骤，其中调整成像单元的焦点，使得由来自测试样本的光产生的测试样本的图像在成像单元的成像面上形成有第一光路的第一步骤，第五步骤，获取测试样本的图像并创建图像数据;第六步，检测检体的光谱信息，以及修正图像数据的色调的第七步骤。

5. 发明申请

US20110085215A1 IMAGE-CAPTURING SYSTEM 有权
标题翻译：图像捕获系统
公开(公告)号：US20110085215A1
公开(公告)日：2011-04-14
申请号：US12903602
申请日：2010-10-13
申请人： Shuzo Hiraide
发明人： Shuzo Hiraide
IPC分类号： H04N1/12 , H04N1/047
CPC分类号： G02B21/367 , G02B21/26 , H04N1/126 , H04N1/1911
摘要： An image-capturing system includes: a stage that has mounted and fixed thereon a glass slide on which at least one sample is placed and that circulates in an endless-track shape; a line sensor that scans only a part of the sample; an imaging driving mechanism that moves a relative position of the line sensor and the stage in a direction perpendicular to a scanning direction of the line sensor; and an optical system that focuses an image of the sample on the line sensor.
摘要翻译：图像捕获系统包括：台架，其安装并固定在其上放置至少一个样品并以循环轨道形状循环的载玻片; 仅扫描样品一部分的线传感器; 成像驱动机构，其使与所述线传感器的扫描方向垂直的方向移动所述线传感器和所述台的相对位置; 以及将样品的图像聚焦在线传感器上的光学系统。

6. 发明申请

US20080068583A1 Signal processing circuit for optical encoder 审中-公开
标题翻译：光学编码器信号处理电路
公开(公告)号：US20080068583A1
公开(公告)日：2008-03-20
申请号：US11898961
申请日：2007-09-18
申请人： Shuzo Hiraide
发明人： Shuzo Hiraide
IPC分类号： G01C3/08
CPC分类号： G01D5/2451 , G01D5/34715 , G01D5/36
摘要： A signal processing circuit for optical encoder, including: a plurality of photodiodes for detecting light in different phase; IV conversion circuits for providing outputs by converting photo currents outputted from a current output terminal of each photodiode respectively into voltage signals; differential amplification circuits for amplifying difference between the output voltage signals corresponding to each photodiode; a DC signal detection circuit for detecting DC components of the photo currents; and a suppressing current generation circuit for supplying suppressing currents for suppressing the DC components to the current output terminals of the photodiodes in accordance with a value of the detected DC components.
摘要翻译：一种用于光学编码器的信号处理电路，包括：用于检测不同相位光的多个光电二极管; IV转换电路，用于通过将从每个光电二极管的电流输出端子输出的光电流分别转换成电压信号来提供输出; 差分放大电路，用于放大对应于每个光电二极管的输出电压信号的差值; 用于检测光电流的DC分量的DC信号检测电路; 以及抑制电流产生电路，用于根据所检测的直流分量的值，向光电二极管的电流输出端提供用于抑制直流分量的抑制电流。

7. 发明授权

US5666305A Method of driving ferroelectric gate transistor memory cell 失效
标题翻译：驱动铁电栅晶体管存储单元的方法
公开(公告)号：US5666305A
公开(公告)日：1997-09-09
申请号：US404300
申请日：1995-03-14
申请人： Takashi Mihara , Hiroshi Nakano , Hiroyuki Yoshimori , Shuzo Hiraide
发明人： Takashi Mihara , Hiroshi Nakano , Hiroyuki Yoshimori , Shuzo Hiraide
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A ferroelectric gate transistor has a structure in which n-type source and drain regions are formed on a p-type semiconductor, a ferroelectric thin film is formed on a channel region between the source and drain regions, and a gate electrode is formed thereon. Memory information is erased by applying a voltage V.sub.g to the ferroelectric to cause poling in the first direction. The memory information is written by applying a voltage V.sub.W lower than a coercive voltage of the ferroelectric and having a polarity opposite to that of the voltage V.sub.g to the ferroelectric. The memory information is read out by applying a voltage V.sub.DR lower than the voltage V.sub.W and having a polarity opposite to that of the voltage V.sub.g to the drain to read a drain current I.sub.DS.
摘要翻译：铁电栅极晶体管具有在p型半导体上形成n型源极和漏极区域的结构，在源极和漏极区域之间的沟道区域上形成铁电薄膜，并且在其上形成栅极电极。通过向铁电体施加电压Vg以在第一方向上引起极化而擦除存储器信息。通过施加低于铁电体的矫顽电压的电压VW并将其与电压Vg的极性相反的电压写入铁电体来写入存储器信息。通过将低于电压VW的电压VDR施加到漏极以读出漏极电流IDS，读出存储器信息。

8. 发明申请

US20120075455A1 IMAGING METHOD AND MICROSCOPE DEVICE 有权
标题翻译：成像方法和显微镜装置
公开(公告)号：US20120075455A1
公开(公告)日：2012-03-29
申请号：US13238730
申请日：2011-09-21
申请人： Shuzo Hiraide
发明人： Shuzo Hiraide
IPC分类号： H04N7/18
CPC分类号： G02B21/365 , G02B21/247
摘要： An imaging method may include a first step in which light from a test specimen is guided to an imaging unit, a second step in which light from the test specimen is guided to an autofocus unit, a third step in which the light guided to an autofocus unit is split, and is guided on a third optical path and a fourth optical path, a fourth step in which a focal point of the imaging unit is adjusted such that an image of the test specimen that is created by the light from the test specimen guided on the first optical path is formed on an imaging surface of the imaging unit, a fifth step in which an image of the test specimen is acquired and image data is created, a sixth step in which spectrum information for the test specimen is detected, and a seventh step in which a color tone of the image data is corrected.
摘要翻译：成像方法可以包括第一步骤，其中来自测试样本的光被引导到成像单元，第二步骤，其中来自测试样本的光被引导到自动聚焦单元，第三步骤，光被引导到自动聚焦单元被分割并且被引导在第三光路和第四光路上，第四步骤，其中调整成像单元的焦点，使得由来自测试样本的光产生的测试样本的图像在成像单元的成像面上形成有第一光路的第一步骤，第五步骤，获取测试样本的图像并创建图像数据;第六步，检测检体的光谱信息，以及修正图像数据的色调的第七步骤。

9. 发明申请

US20110249155A1 IMAGE PICKUP DEVICE 审中-公开
标题翻译：图像拾取器件
公开(公告)号：US20110249155A1
公开(公告)日：2011-10-13
申请号：US13084068
申请日：2011-04-11
申请人： Shuzo Hiraide
发明人： Shuzo Hiraide
IPC分类号： H04N9/64
CPC分类号： H04N5/3692 , G02B21/0004 , G02B21/26 , G02B21/34 , G02B21/365 , H04N9/045
摘要： An image pickup device may include a stage moving a sample, a line sensor that comprises an imaging element including pixels arranged in a line shape, the line sensor scanning and acquiring an image of the sample, a spectrum detection unit that comprises a first light receiving element including a first color filter and a second light receiving element including a second color filter, the first color filter and the second color filter having different spectral transmittance distributions, the first light receiving element and the second light receiving element scanning a first portion of the sample so as to acquire spectrum information of the first portion, an optical system that introduces a light from the sample to the line sensor and the spectrum detection unit, and a correction device that corrects the image, which has been acquired by the line sensor, based on the spectrum information of the first portion.
摘要翻译：图像拾取装置可以包括移动样本的台，线传感器，其包括成像元件，所述成像元件包括以线状排列的像素，所述线传感器扫描并获取样本图像;频谱检测单元，包括第一光接收包括第一滤色器的元件和包括第二滤色器的第二光接收元件，所述第一滤色器和所述第二滤色器具有不同的光谱透射率分布，所述第一光接收元件和所述第二光接收元件扫描所述第一滤色器的第一部分采样，以获取第一部分的光谱信息，将来自样品的光引入线传感器和光谱检测单元的光学系统，以及校正由线传感器获取的图像的校正装置，基于第一部分的频谱信息。

10. 发明申请

US20080179500A1 PHOTOELECTRIC CURRENT INTEGRATING CIRCUIT 有权
标题翻译：光电集成电路
公开(公告)号：US20080179500A1
公开(公告)日：2008-07-31
申请号：US12020784
申请日：2008-01-28
申请人： Shuzo Hiraide
发明人： Shuzo Hiraide
IPC分类号： H03F3/16
CPC分类号： H03F3/08
摘要： A photoelectric current integrating circuit including: a first operational amplifier with a switch and an integrating capacitor connected in parallel between an input terminal and an output terminal thereof; a photodiode; and a current passing circuit provided between one terminal of the photodiode and the input terminal of the first operational amplifier, for passing a photoelectric current detected at the photodiode while blocking a connection between a parasitic capacitance of the photodiode and the integrating capacitor.
摘要翻译：一种光电流积分电路，包括：具有开关的第一运算放大器和在其输入端和输出端之间并联连接的积分电容器; 光电二极管以及设置在光电二极管的一个端子和第一运算放大器的输入端之间的电流通过电路，用于通过在光电二极管处检测到的光电流，同时阻挡光电二极管的寄生电容与积分电容器之间的连接。

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