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1. 发明授权

US08010771B2 Communication system for controlling intercommunication among a plurality of communication nodes 失效
标题翻译：用于控制多个通信节点之间的相互通信的通信系统
公开(公告)号：US08010771B2
公开(公告)日：2011-08-30
申请号：US11566307
申请日：2006-12-04
申请人： Takeshi Inagaki , Aya Minami , Yohichi Miwa
发明人： Takeshi Inagaki , Aya Minami , Yohichi Miwa
IPC分类号： G06F15/76 , G06F17/50
CPC分类号： H04L45/14
摘要： The invention provides a communication system including a plurality of communication nodes respectively arranged at predetermined lattice points in lattice space forming a three-dimensional rectangular solid, a communication link that interconnects communication nodes arranged at adjacent lattice points, and a shortcut link that connects, for at least two faces that are not an end face on the lattice space among faces formed of communication nodes of which any adjacent lattice points do not have communication nodes, a communication node constituting one face and a communication node constituting another face.
摘要翻译：本发明提供了一种通信系统，包括分别布置在形成三维矩形固体的格子空间中的预定格子点处的多个通信节点，连接布置在相邻网格点的通信节点的通信链路和连接的快捷链路，用于在通信节点形成的面之间的网格空间上不是端面的至少两个面，其中任何相邻格点不具有通信节点，构成一个面的通信节点和构成另一个面的通信节点。

2. 发明申请

US20070133580A1 Communication System For Controlling Intercommunication Among A Plurality of Communication Nodes 失效
标题翻译：用于控制多个通信节点之间的通信的通信系统
公开(公告)号：US20070133580A1
公开(公告)日：2007-06-14
申请号：US11566307
申请日：2006-12-04
申请人： Takeshi Inagaki , Aya Minami , Yohichi Miwa
发明人： Takeshi Inagaki , Aya Minami , Yohichi Miwa
IPC分类号： H04L12/56 , H04L12/28
CPC分类号： H04L45/14
摘要： The invention provides a communication system including a plurality of communication nodes respectively arranged at predetermined lattice points in lattice space forming a three-dimensional rectangular solid, a communication link that interconnects communication nodes arranged at adjacent lattice points, and a shortcut link that connects, for at least two faces that are not an end face on the lattice space among faces formed of communication nodes of which any adjacent lattice points do not have communication nodes, a communication node constituting one face and a communication node constituting another face.
摘要翻译：本发明提供了一种通信系统，包括分别布置在形成三维矩形固体的格子空间中的预定格子点处的多个通信节点，连接布置在相邻网格点的通信节点的通信链路和连接的快捷链路，用于在通信节点形成的面之间的网格空间上不是端面的至少两个面，其中任何相邻格点不具有通信节点，构成一个面的通信节点和构成另一个面的通信节点。

3. 发明授权

US07953368B2 RFIC chip, and position recognition system and security system using the same 有权
标题翻译： RFIC芯片和位置识别系统和安全系统使用相同
公开(公告)号：US07953368B2
公开(公告)日：2011-05-31
申请号：US11304848
申请日：2005-12-14
申请人： Yohichi Miwa , Aya Minami
发明人： Yohichi Miwa , Aya Minami
IPC分类号： H04B5/00
CPC分类号： G06K19/0723
摘要： Included are: a circuit unit having a non-volatile memory; a circuit unit having a volatile memory; a read-write circuit for reading data from, writing data into, the non-volatile memory, and for reading data from, writing data into, the volatile memory; an antenna and an RF amplifier which are first power supply means for receiving a first radio wave, and for supplying power to the circuit unit; and an antenna and an RF amplifier which are second power supply means for receiving a second radio wave whose frequency is different from that of the first radio wave, and for supplying power to the circuit unit.
摘要翻译：包括：具有非易失性存储器的电路单元; 具有易失性存储器的电路单元; 用于从非易失性存储器读取数据并将数据写入到非易失性存储器中的读写电路，以及从数据写入到易失性存储器中的数据; 天线和RF放大器，其是用于接收第一无线电波并用于向电路单元供电的第一电源装置; 以及作为第二电源装置的天线和RF放大器，用于接收频率与第一无线电波的频率不同的第二无线电波，并且用于向电路单元供电。

4. 发明申请

US20120305659A1 RADIO FREQUENCY INTEGRATED CIRCUIT AND IC MODULE OF THE SAME 审中-公开
标题翻译：无线电频率集成电路及其IC模块
公开(公告)号：US20120305659A1
公开(公告)日：2012-12-06
申请号：US13587763
申请日：2012-08-16
申请人： Yohichi Miwa , Aya Minami
发明人： Yohichi Miwa , Aya Minami
IPC分类号： G06K19/073
CPC分类号： G06K19/0723
摘要： A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.
摘要翻译：一种高度便利的射频集成电路，可以在多个不同的频带使用，并且可以在不同的频带执行通信，从而可以读取不同频带的数据，并且可以对读写进行限制的信息。射频集成电路中的IC模块包括多个存储器; 读写单元，用于执行从存储器读取数据和将数据写入存储器的处理; 以及用于接收从已经接收到无线电信号的天线输出的电信号的选择器。

5. 发明授权

US08285242B2 Radio frequency integrated circuit and IC module of the same 失效
标题翻译：射频集成电路和IC模块相同
公开(公告)号：US08285242B2
公开(公告)日：2012-10-09
申请号：US11227945
申请日：2005-09-15
申请人： Yohichi Miwa , Aya Minami
发明人： Yohichi Miwa , Aya Minami
IPC分类号： H04B1/28
CPC分类号： G06K19/0723
摘要： A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.
摘要翻译：一种高度便利的射频集成电路，可以在多个不同的频带使用，并且可以在不同的频带执行通信，从而可以读取不同频带的数据，并且可以对读写进行限制的信息。射频集成电路中的IC模块包括多个存储器; 读写单元，用于执行从存储器读取数据和将数据写入存储器的处理; 以及用于接收从已经接收到无线电信号的天线输出的电信号的选择器。

6. 发明申请

US20100211768A1 SYSTEM FOR PERFORMING HARDWARE CALIBRATION DURING STARTUP, AND METHOD OF CALIBRATION 失效
标题翻译：在启动期间执行硬件校准的系统和校准方法
公开(公告)号：US20100211768A1
公开(公告)日：2010-08-19
申请号：US12703841
申请日：2010-02-11
申请人： Aya Minami , Yohichi Miwa
发明人： Aya Minami , Yohichi Miwa
IPC分类号： G06F9/24
CPC分类号： G06F9/445 , G06F11/3041 , G06F11/3058
摘要： Disclosed is a system including: a calibration executing unit that performs a calibration on hardware during the system startup so as to allow the system to properly operate; and a correction data retaining unit that retains a piece of correction information in association with an environmental condition during the calibration, the correction information indicating a setting for the hardware calibrated by the calibration executing unit. If the correction data retaining unit retains the correction information associated with an environmental condition equivalent to the environmental condition at a time when the system is started up, the calibration executing unit performs the hardware setting on the basis of the retained correction information instead of calibrating the hardware.
摘要翻译：公开了一种系统，包括：校准执行单元，其在系统启动期间对硬件执行校准，以允许系统正确操作; 以及校正数据保持单元，其在校准期间保持与环境条件相关联的一条校正信息，所述校正信息指示由校准执行单元校准的硬件的设置。如果校正数据保持单元保持与系统启动时等于环境条件的环境条件相关联的校正信息，则校准执行单元基于保留的校正信息执行硬件设置，而不是校准硬件。

7. 发明申请

US20120151152A1 READING CORE DATA IN A RING BUS TYPE MULTICORE SYSTEM 有权
标题翻译：在环形总线类型多媒体系统中读取核心数据
公开(公告)号：US20120151152A1
公开(公告)日：2012-06-14
申请号：US13311349
申请日：2011-12-05
申请人： Aya Minami , Yohichi Miwa
发明人： Aya Minami , Yohichi Miwa
IPC分类号： G06F12/08
CPC分类号： G06F12/0831
摘要： The present invention provides a ring bus type multicore system including one memory, a main memory controller for connecting the memory to a ring bus; and multiple cores connected in the shape of the ring bus, wherein each of the cores further includes a cache interface and a cache controller for controlling or managing the interface, and the cache controller of each of the cores connected in the shape of the ring bus executes a step of snooping data on the request through the cache interface; and when the cache of the core holds the data, a step of controlling the core to receive the request and return the data to the requester core, or, when the cache of the core does not hold the data, the main memory controller executes a step of reading the data from the memory and sending the data to the requester core.
摘要翻译：本发明提供了一种环形总线型多核系统，包括一个存储器，用于将存储器连接到环形总线的主存储器控制器; 以及以环形总线形式连接的多个核心，其中每个核心还包括高速缓存接口和用于控制或管理接口的高速缓存控制器，并且以环形总线形式连接的每个核心的高速缓存控制器执行通过缓存界面对请求侦听数据的步骤; 并且当核心的缓存保存数据时，控制核心以接收请求并将数据返回到请求者核心的步骤，或者当核心的高速缓存不保存数据时，主存储器控制器执行从存储器读取数据并将数据发送到请求者核心的步骤。

8. 发明申请

US20090116194A1 Circuit Module and Manufacturing Method Thereof 有权
标题翻译：电路模块及其制造方法
公开(公告)号：US20090116194A1
公开(公告)日：2009-05-07
申请号：US12263558
申请日：2008-11-03
申请人： Takuji Matsushiba , Aya Minami , Yohichi Miwa , Taichiroh Nomura , Kenji Tsuboi , Takeshi Wagatsuma , Masatake Yamamoto
发明人： Takuji Matsushiba , Aya Minami , Yohichi Miwa , Taichiroh Nomura , Kenji Tsuboi , Takeshi Wagatsuma , Masatake Yamamoto
IPC分类号： H05K7/20 , H01R43/00
CPC分类号： H01L23/3677 , H01L23/13 , H01L23/4006 , H01L23/433 , H01L2023/405 , H01L2023/4062 , H01L2023/4087 , H01L2224/16 , H01L2224/73253 , H01L2924/1433 , Y10T29/49117
摘要： A circuit module includes: a thermally conductive board forming a part of a housing; a circuit board disposed above the thermally conductive board; a semiconductor chip connected to a plurality of electrode pads on a upper surface of the circuit board through solder; a heat sink connected to a upper surface of the semiconductor chip; a thermally conductive member thermally connecting the thermally conductive board to the semiconductor chip; and a plurality of fasteners passing through the thickness of the circuit board in an area surrounding the semiconductor chip to attach the heat sink to the thermally conductive board.
摘要翻译：电路模块包括：形成壳体的一部分的导热板; 布置在导热板上方的电路板; 半导体芯片，其通过焊料与所述电路板的上表面上的多个电极焊盘连接; 连接到所述半导体芯片的上表面的散热器; 将所述导热板热连接到所述半导体芯片的导热构件; 以及多个紧固件，其穿过半导体芯片周围的区域中的电路板的厚度，以将散热器附接到导热板。

9. 发明授权

US07506176B1 Encryption mechanism on multi-core processor 失效
标题翻译：多核处理器加密机制
公开(公告)号：US07506176B1
公开(公告)日：2009-03-17
申请号：US12045305
申请日：2008-03-10
申请人： Yohichi Miwa , Aya Minami
发明人： Yohichi Miwa , Aya Minami
IPC分类号： H04L9/32
CPC分类号： H04L9/0618 , H04L2209/125 , H04L2209/20
摘要： An embodiment describes a method of implementing higher level and more robust encryption by using a multi-core processor. The clear text is segmented into text segments based on predefined segment lengths by master processor. Text segments are sent to processing elements which in turn encrypted and encrypted segments are sent back to master processor which is aggregated into encrypted text. To decrypt the text, encrypted text is split into encrypted segments per predefined lengths by master processor and sent to processing elements to be decrypted. The resulted plain text segments are sent back to master processor which is aggregated into original plain text.
摘要翻译：实施例描述了通过使用多核处理器来实现更高等级和更强健的加密的方法。基于主处理器的预定义段长度将明文分割成文本段。文本段被发送到处理元件，其进而将加密和加密的段发送回主处理器，该主处理器被聚合成加密文本。为了对文本进行解密，加密的文本按主处理器的每个预定义的长度被分割成加密的段，并发送到要被解密的处理单元。所得到的纯文本段被发送回主处理器，其被聚合成原始的纯文本。

10. 发明申请

US20060063506A1 Radio frequency integrated circuit and IC module of the same 失效
标题翻译：射频集成电路和IC模块相同
公开(公告)号：US20060063506A1
公开(公告)日：2006-03-23
申请号：US11227945
申请日：2005-09-15
申请人： Yohichi Miwa , Aya Minami
发明人： Yohichi Miwa , Aya Minami
IPC分类号： H04Q5/22 , H04B1/16 , H04B1/28
CPC分类号： G06K19/0723
摘要： A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.
摘要翻译：一种高度便利的射频集成电路，可以在多个不同的频带使用，并且可以在不同的频带执行通信，从而可以读取不同频带的数据，并且可以对读写进行限制的信息。射频集成电路中的IC模块包括多个存储器; 读写单元，用于执行从存储器读取数据和将数据写入存储器的处理; 以及用于接收从已经接收到无线电信号的天线输出的电信号的选择器。

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