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1. 发明授权

US11075140B2 Heat conduction structure or semiconductor apparatus 有权
公开(公告)号：US11075140B2
公开(公告)日：2021-07-27
申请号：US16449999
申请日：2019-06-24
申请人： Takeshi Bessho , Masataka Deguchi , Nagahiro Saito , Kazuo Hashimi
发明人： Takeshi Bessho , Masataka Deguchi , Nagahiro Saito , Kazuo Hashimi
IPC分类号： H01L23/34 , H01L23/42
摘要： The disclosure provides a heat conduction structure with higher heat conductivity. This embodiment is a heat conduction structure where heat is conducted from a first member to a second member. The heat conduction structure includes at least one self-assembled monolayer and a heat dissipation grease. The self-assembled monolayer is formed on at least one surface of the first member and the second member. The heat dissipation grease is disposed between the first member and the second member. The heat dissipation grease is in contact with the self-assembled monolayer.

2. 发明授权

US08809919B2 Semiconductor device with inverted trapezoidal cross sectional profile in surface areas of substrate 有权
标题翻译：在衬底的表面区域具有倒梯形横截面轮廓的半导体器件
公开(公告)号：US08809919B2
公开(公告)日：2014-08-19
申请号：US13348487
申请日：2012-01-11
申请人： Kazuo Hashimi , Hidekazu Sato
发明人： Kazuo Hashimi , Hidekazu Sato
IPC分类号： H01L29/76 , H01L21/768 , H01L21/3065 , H01L29/66 , H01L21/02
CPC分类号： H01L29/66636 , H01L21/02063 , H01L21/02071 , H01L21/3065 , H01L21/76802 , H01L21/76805 , H01L21/76814
摘要： A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.
摘要翻译：半导体器件制造方法包括以下步骤：（a）在半导体衬底上形成电介质膜; （b）通过干法蚀刻电介质膜; 和（c）在规定的温度条件下，在半导体衬底上提供热分解的原子氢，以除去由于干法而在半导体衬底中产生的损伤层。

3. 发明授权

US5830807A Successive dry etching of alternating laminate 失效
标题翻译：交替层压板的连续干蚀刻
公开(公告)号：US5830807A
公开(公告)日：1998-11-03
申请号：US866046
申请日：1997-05-30
申请人： Daisuke Matsunaga , Kazuo Hashimi , Genichi Komuro
发明人： Daisuke Matsunaga , Kazuo Hashimi , Genichi Komuro
IPC分类号： C23F4/00 , H01L21/02 , H01L21/266 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/316 , H01L21/8242 , H01L27/10 , H01L27/108 , H01L21/00 , B44C1/22 , C23F1/00 , C23F3/00
CPC分类号： H01L21/3065 , H01L21/31116 , H01L28/87 , H01L28/88
摘要： A laminated structure formed by alternately laminating a silicon film and a silicon oxide film is successively etched in the same chamber. Two groups are selected from groups A, B, and C, the group A including NF.sub.3, CF.sub.4, and SF.sub.6, the group B including CO, CHF.sub.3, CH.sub.2 F.sub.2, C.sub.2 F.sub.6, C.sub.3 F.sub.8, and C.sub.4 F.sub.8, and the group C including Cl.sub.2, HBr, HCl and Br.sub.2. The laminated structure is etched by successively etching one of the silicon film and the silicon oxide film by a combination of gases having a first mixture ratio and the other by the combination of gases having a second mixture ratio different from the first mixture ratio, the combination of gases including at least one kind of gas selected from one group of the selected two groups and at least one kind of gas selected from the other group. A technology of manufacturing a semiconductor device is provided which can etch an alternate laminate efficiently with a simple system.
摘要翻译：通过交替层叠硅膜和氧化硅膜形成的叠层结构在相同的室中连续蚀刻。 A组，B组和C组两组，A组包括NF3，CF4和SF6，B组包括CO，CHF3，CH2F2，C2F6，C3F8和C4F8，C组包括Cl2，HBr， HCl和Br2。通过连续蚀刻硅膜和氧化硅膜之一，通过组合具有第一混合比的气体和另一个通过具有与第一混合比不同的第二混合比的气体的组合来蚀刻层压结构，该组合包括选自一组所选择的两组中的至少一种气体和选自另一组中的至少一种气体。提供了一种制造半导体器件的技术，其可以用简单的系统有效地蚀刻替代层压板。

4. 发明申请

US20120288969A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MANUFACTURING APPARATUS 有权
标题翻译：半导体器件和半导体制造设备的制造方法
公开(公告)号：US20120288969A1
公开(公告)日：2012-11-15
申请号：US13469707
申请日：2012-05-11
申请人： Yoshiyuki Nakao , Kazuo Hashimi
发明人： Yoshiyuki Nakao , Kazuo Hashimi
IPC分类号： H01L21/66 , H01L21/3065
CPC分类号： H01J37/32963 , H01J37/32972 , H01L21/32137
摘要： An etching apparatus includes a process unit and a control unit. Emission intensity of plasma inside the process unit is obtained by an OES detector, a nonlinear regression analysis is performed by an etching control device to determine a regression formula. The nonlinear regression analysis is performed by using the emission intensity of the plasma obtained until a first time when the emission intensity of the plasma passes a peak, and a second time to be an etching end point is calculated by using the regression formula. The etching end point is calculated as a time when the emission intensity decreases for a predetermined value from the first time. The etching apparatus finishes an etching when the process reaches the etching end point. It is thereby possible to control the etching end point with high-accuracy.
摘要翻译：蚀刻装置包括处理单元和控制单元。通过OES检测器获得处理单元内的等离子体的发射强度，通过蚀刻控制装置进行非线性回归分析以确定回归公式。通过使用等离子体的发射强度，直到等离子体的发射强度通过峰值为止的第一次，并且通过使用回归公式计算第二次作为蚀刻终点来进行非线性回归分析。蚀刻终点被计算为从第一次发射强度降低预定值的时间。当处理到达刻蚀终点时，蚀刻装置完成蚀刻。从而可以高精度地控制蚀刻终点。

5. 发明授权

US07691649B2 Method for evaluating impurity distribution under gate electrode without damaging silicon substrate 失效
标题翻译：评估栅极电极杂质分布而不损坏硅衬底的方法
公开(公告)号：US07691649B2
公开(公告)日：2010-04-06
申请号：US11407918
申请日：2006-04-21
申请人： Kazuo Hashimi , Hidekazu Sato
发明人： Kazuo Hashimi , Hidekazu Sato
IPC分类号： H01L21/66 , H01L29/94
CPC分类号： H01L29/66545 , H01L21/32135 , H01L22/12 , H01L29/66681 , H01L29/7836 , H01L2924/0002 , H01L2924/00
摘要： A method of stably and correctly evaluating impurities distribution under a gate of a semiconductor device without damaging a silicon substrate is disclosed. According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. Further, a processed form of the gate is evaluated by observing a form of the gate insulating film that remains on the semiconductor substrate, the gate insulating film that remains on the semiconductor substrate is removed by a wet process, and the impurities distribution under the gate is measured and evaluated.
摘要翻译：公开了一种稳定且正确地评估半导体器件的栅极下的杂质分布而不损坏硅衬底的方法。根据评价方法，通过将由热解产生的热解氢接触到包括通过栅极绝缘膜设置在半导体衬底上的栅极的半导体器件的半导体器件，除去栅极绝缘膜而除去含硅材料的栅电极，以及形成在栅电极的相应侧上的半导体衬底上的源电极和漏电极。此外，通过观察保留在半导体衬底上的栅极绝缘膜的形式来评估栅极的处理形式，通过湿法除去保留在半导体衬底上的栅极绝缘膜，并且栅极下的杂质分布被测量和评估。

6. 发明申请

US20070138561A1 Semiconductor device, a manufacturing method thereof, and an evaluation method of the semiconductor device 失效
标题翻译：半导体装置及其制造方法以及半导体装置的评价方法
公开(公告)号：US20070138561A1
公开(公告)日：2007-06-21
申请号：US11407918
申请日：2006-04-21
申请人： Kazuo Hashimi , Hidekazu Sato
发明人： Kazuo Hashimi , Hidekazu Sato
IPC分类号： H01L29/94
CPC分类号： H01L29/66545 , H01L21/32135 , H01L22/12 , H01L29/66681 , H01L29/7836 , H01L2924/0002 , H01L2924/00
摘要： A method of stably and correctly evaluating impurities distribution under a gate of a semiconductor device without damaging a silicon substrate is disclosed. According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. Further, a processed form of the gate is evaluated by observing a form of the gate insulating film that remains on the semiconductor substrate, the gate insulating film that remains on the semiconductor substrate is removed by a wet process, and the impurities distribution under the gate is measured and evaluated.
摘要翻译：公开了一种稳定且正确地评估半导体器件的栅极下的杂质分布而不损坏硅衬底的方法。根据评价方法，通过将通过热解产生的热解氢接触通过栅极绝缘膜将包含布置在半导体衬底上的栅电极的半导体器件接触而除去栅极绝缘膜而除去含硅材料的栅电极，以及形成在栅电极的相应侧上的半导体衬底上的源电极和漏电极。此外，通过观察保留在半导体衬底上的栅极绝缘膜的形式来评估栅极的处理形式，通过湿法除去保留在半导体衬底上的栅极绝缘膜，并且栅极下的杂质分布被测量和评估。

7. 发明授权

US08685265B2 Manufacturing method of semiconductor device and semiconductor manufacturing apparatus 有权
标题翻译：半导体器件和半导体制造装置的制造方法
公开(公告)号：US08685265B2
公开(公告)日：2014-04-01
申请号：US13469707
申请日：2012-05-11
申请人： Yoshiyuki Nakao , Kazuo Hashimi
发明人： Yoshiyuki Nakao , Kazuo Hashimi
IPC分类号： H01L21/302
CPC分类号： H01J37/32963 , H01J37/32972 , H01L21/32137
摘要： An etching apparatus includes a process unit and a control unit. Emission intensity of plasma inside the process unit is obtained by an OES detector, a nonlinear regression analysis is performed by an etching control device to determine a regression formula. The nonlinear regression analysis is performed by using the emission intensity of the plasma obtained until a first time when the emission intensity of the plasma passes a peak, and a second time to be an etching end point is calculated by using the regression formula. The etching end point is calculated as a time when the emission intensity decreases for a predetermined value from the first time. The etching apparatus finishes an etching when the process reaches the etching end point. It is thereby possible to control the etching end point with high-accuracy.
摘要翻译：蚀刻装置包括处理单元和控制单元。通过OES检测器获得处理单元内的等离子体的发射强度，通过蚀刻控制装置进行非线性回归分析以确定回归公式。通过使用等离子体的发射强度，直到等离子体的发射强度通过峰值为止的第一次，并且通过使用回归公式计算第二次作为蚀刻终点来进行非线性回归分析。蚀刻终点被计算为从第一次发射强度降低预定值的时间。当处理到达刻蚀终点时，蚀刻装置完成蚀刻。从而可以高精度地控制蚀刻终点。

8. 发明申请

US20120181671A1 METHOD FOR EVALUATING IMPURITY DISTRIBUTION UNDER GATE ELECTRODE WITHOUT DAMAGING SILICON SUBSTRATE 失效
标题翻译：在不损坏硅基板的情况下评估栅极电极下的污染物分布的方法
公开(公告)号：US20120181671A1
公开(公告)日：2012-07-19
申请号：US13429804
申请日：2012-03-26
申请人： Kazuo Hashimi , Hidekazu Sato
发明人： Kazuo Hashimi , Hidekazu Sato
IPC分类号： H01L23/544
CPC分类号： H01L29/66545 , H01L21/32135 , H01L22/12 , H01L29/66681 , H01L29/7836 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device forms the semiconductor device in a device region of a semiconductor substrate simultaneously with forming a monitor semiconductor device that includes a gate electrode made of silicon containing material arranged on a gate insulating film in a monitor region of the semiconductor substrate, a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. The gate electrode is removed without removing a gate insulating film by applying pyrolysis hydrogen generated by pyrolysis on the monitor semiconductor device in the monitor region, and the gate insulating film is removed by a wet process. Impurities distribution of a silicon active region appearing after the gate electrode is removed is measured and fed back to a semiconductor manufacturing process.
摘要翻译：半导体器件的制造方法同时形成半导体衬底的器件区域中的半导体器件，同时形成监测半导体器件，该监控半导体器件包括在半导体衬底的监视器区域中布置在栅极绝缘膜上的由含硅材料制成的栅电极，形成在栅电极的相应侧上的半导体衬底上的源电极和漏电极。通过在监视器区域中的监视器半导体器件上施加由热解产生的热解氢，除去栅极绝缘膜，去除栅电极，并通过湿法去除栅极绝缘膜。测量在去除栅电极之后出现的硅有源区的杂质分布并将其反馈到半导体制造工艺。

9. 发明申请

US20060006477A1 Semiconductor device and fabrication method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20060006477A1
公开(公告)日：2006-01-12
申请号：US11114111
申请日：2005-04-26
申请人： Kazuo Hashimi , Hidekazu Sato
发明人： Kazuo Hashimi , Hidekazu Sato
IPC分类号： H01L29/76 , H01L21/302 , H01L21/26
CPC分类号： H01L29/66636 , H01L21/02063 , H01L21/02071 , H01L21/3065 , H01L21/76802 , H01L21/76805 , H01L21/76814
摘要： A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.
摘要翻译：半导体器件制造方法包括以下步骤：（a）在半导体衬底上形成电介质膜; （b）通过干法蚀刻电介质膜; 和（c）在规定的温度条件下，在半导体衬底上提供热分解的原子氢，以除去由于干法而在半导体衬底中产生的损伤层。

10. 发明申请

US20120104477A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120104477A1
公开(公告)日：2012-05-03
申请号：US13348487
申请日：2012-01-11
申请人： Kazuo Hashimi , Hidekazu Sato
发明人： Kazuo Hashimi , Hidekazu Sato
IPC分类号： H01L29/78
CPC分类号： H01L29/66636 , H01L21/02063 , H01L21/02071 , H01L21/3065 , H01L21/76802 , H01L21/76805 , H01L21/76814
摘要： A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.
摘要翻译：半导体器件制造方法包括以下步骤：（a）在半导体衬底上形成电介质膜; （b）通过干法蚀刻电介质膜; 和（c）在规定的温度条件下，在半导体衬底上提供热分解的原子氢，以除去由于干法而在半导体衬底中产生的损伤层。

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